Struct stm32ral::stm32mp::peripherals::tzc::ResetValues [−][src]
pub struct ResetValues {Show 79 fields
pub TZC_BUILD_CONFIG: u32,
pub TZC_ACTION: u32,
pub TZC_GATE_KEEPER: u32,
pub TZC_SPECULATION_CTRL: u32,
pub TZC_INT_STATUS: u32,
pub TZC_INT_CLEAR: u32,
pub TZC_FAIL_ADDRESS_LOW0: u32,
pub TZC_FAIL_ADDRESS_HIGH0: u32,
pub TZC_FAIL_CONTROL0: u32,
pub TZC_FAIL_ID0: u32,
pub TZC_FAIL_ADDRESS_LOW1: u32,
pub TZC_FAIL_ADDRESS_HIGH1: u32,
pub TZC_FAIL_CONTROL1: u32,
pub TZC_FAIL_ID1: u32,
pub TZC_REGION_BASE_HIGH0: u32,
pub TZC_REGION_TOP_LOW0: u32,
pub TZC_REGION_TOP_HIGH0: u32,
pub TZC_REGION_ATTRIBUTE0: u32,
pub TZC_REGION_ID_ACCESS0: u32,
pub TZC_REGION_BASE_LOW1: u32,
pub TZC_REGION_BASE_HIGH1: u32,
pub TZC_REGION_TOP_LOW1: u32,
pub TZC_REGION_TOP_HIGH1: u32,
pub TZC_REGION_ATTRIBUTE1: u32,
pub TZC_REGION_ID_ACCESS1: u32,
pub TZC_REGION_BASE_LOW2: u32,
pub TZC_REGION_BASE_HIGH2: u32,
pub TZC_REGION_TOP_LOW2: u32,
pub TZC_REGION_TOP_HIGH2: u32,
pub TZC_REGION_ATTRIBUTE2: u32,
pub TZC_REGION_ID_ACCESS2: u32,
pub TZC_REGION_BASE_LOW3: u32,
pub TZC_REGION_BASE_HIGH3: u32,
pub TZC_REGION_TOP_LOW3: u32,
pub TZC_REGION_TOP_HIGH3: u32,
pub TZC_REGION_ATTRIBUTE3: u32,
pub TZC_REGION_ID_ACCESS3: u32,
pub TZC_REGION_BASE_LOW4: u32,
pub TZC_REGION_BASE_HIGH4: u32,
pub TZC_REGION_TOP_LOW4: u32,
pub TZC_REGION_TOP_HIGH4: u32,
pub TZC_REGION_ATTRIBUTE4: u32,
pub TZC_REGION_ID_ACCESS4: u32,
pub TZC_REGION_BASE_LOW5: u32,
pub TZC_REGION_BASE_HIGH5: u32,
pub TZC_REGION_TOP_LOW5: u32,
pub TZC_REGION_TOP_HIGH5: u32,
pub TZC_REGION_ATTRIBUTE5: u32,
pub TZC_REGION_ID_ACCESS5: u32,
pub TZC_REGION_BASE_LOW6: u32,
pub TZC_REGION_BASE_HIGH6: u32,
pub TZC_REGION_TOP_LOW6: u32,
pub TZC_REGION_TOP_HIGH6: u32,
pub TZC_REGION_ATTRIBUTE6: u32,
pub TZC_REGION_ID_ACCESS6: u32,
pub TZC_REGION_TOP_LOW7: u32,
pub TZC_REGION_ATTRIBUTE7: u32,
pub TZC_REGION_BASE_LOW8: u32,
pub TZC_REGION_BASE_HIGH8: u32,
pub TZC_REGION_ATTRIBUTE8: u32,
pub TZC_REGION_BASE_LOW7: u32,
pub TZC_REGION_BASE_HIGH7: u32,
pub TZC_REGION_TOP_HIGH7: u32,
pub TZC_REGION_ID_ACCESS7: u32,
pub TZC_REGION_TOP_LOW8: u32,
pub TZC_REGION_TOP_HIGH8: u32,
pub TZC_REGION_ID_ACCESS8: u32,
pub TZC_PID4: u32,
pub TZC_PID5: u32,
pub TZC_PID6: u32,
pub TZC_PID7: u32,
pub TZC_PID0: u32,
pub TZC_PID1: u32,
pub TZC_PID2: u32,
pub TZC_PID3: u32,
pub TZC_CID0: u32,
pub TZC_CID1: u32,
pub TZC_CID2: u32,
pub TZC_CID3: u32,
}Fields
TZC_BUILD_CONFIG: u32TZC_ACTION: u32TZC_GATE_KEEPER: u32TZC_SPECULATION_CTRL: u32TZC_INT_STATUS: u32TZC_INT_CLEAR: u32TZC_FAIL_ADDRESS_LOW0: u32TZC_FAIL_ADDRESS_HIGH0: u32TZC_FAIL_CONTROL0: u32TZC_FAIL_ID0: u32TZC_FAIL_ADDRESS_LOW1: u32TZC_FAIL_ADDRESS_HIGH1: u32TZC_FAIL_CONTROL1: u32TZC_FAIL_ID1: u32TZC_REGION_BASE_HIGH0: u32TZC_REGION_TOP_LOW0: u32TZC_REGION_TOP_HIGH0: u32TZC_REGION_ATTRIBUTE0: u32TZC_REGION_ID_ACCESS0: u32TZC_REGION_BASE_LOW1: u32TZC_REGION_BASE_HIGH1: u32TZC_REGION_TOP_LOW1: u32TZC_REGION_TOP_HIGH1: u32TZC_REGION_ATTRIBUTE1: u32TZC_REGION_ID_ACCESS1: u32TZC_REGION_BASE_LOW2: u32TZC_REGION_BASE_HIGH2: u32TZC_REGION_TOP_LOW2: u32TZC_REGION_TOP_HIGH2: u32TZC_REGION_ATTRIBUTE2: u32TZC_REGION_ID_ACCESS2: u32TZC_REGION_BASE_LOW3: u32TZC_REGION_BASE_HIGH3: u32TZC_REGION_TOP_LOW3: u32TZC_REGION_TOP_HIGH3: u32TZC_REGION_ATTRIBUTE3: u32TZC_REGION_ID_ACCESS3: u32TZC_REGION_BASE_LOW4: u32TZC_REGION_BASE_HIGH4: u32TZC_REGION_TOP_LOW4: u32TZC_REGION_TOP_HIGH4: u32TZC_REGION_ATTRIBUTE4: u32TZC_REGION_ID_ACCESS4: u32TZC_REGION_BASE_LOW5: u32TZC_REGION_BASE_HIGH5: u32TZC_REGION_TOP_LOW5: u32TZC_REGION_TOP_HIGH5: u32TZC_REGION_ATTRIBUTE5: u32TZC_REGION_ID_ACCESS5: u32TZC_REGION_BASE_LOW6: u32TZC_REGION_BASE_HIGH6: u32TZC_REGION_TOP_LOW6: u32TZC_REGION_TOP_HIGH6: u32TZC_REGION_ATTRIBUTE6: u32TZC_REGION_ID_ACCESS6: u32TZC_REGION_TOP_LOW7: u32TZC_REGION_ATTRIBUTE7: u32TZC_REGION_BASE_LOW8: u32TZC_REGION_BASE_HIGH8: u32TZC_REGION_ATTRIBUTE8: u32TZC_REGION_BASE_LOW7: u32TZC_REGION_BASE_HIGH7: u32TZC_REGION_TOP_HIGH7: u32TZC_REGION_ID_ACCESS7: u32TZC_REGION_TOP_LOW8: u32TZC_REGION_TOP_HIGH8: u32TZC_REGION_ID_ACCESS8: u32TZC_PID4: u32TZC_PID5: u32TZC_PID6: u32TZC_PID7: u32TZC_PID0: u32TZC_PID1: u32TZC_PID2: u32TZC_PID3: u32TZC_CID0: u32TZC_CID1: u32TZC_CID2: u32TZC_CID3: u32