Struct stm32ral::stm32mp::peripherals::tzc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 79 fields
pub TZC_BUILD_CONFIG: RORegister<u32>,
pub TZC_ACTION: RWRegister<u32>,
pub TZC_GATE_KEEPER: RWRegister<u32>,
pub TZC_SPECULATION_CTRL: RWRegister<u32>,
pub TZC_INT_STATUS: RORegister<u32>,
pub TZC_INT_CLEAR: RWRegister<u32>,
pub TZC_FAIL_ADDRESS_LOW0: RORegister<u32>,
pub TZC_FAIL_ADDRESS_HIGH0: RORegister<u32>,
pub TZC_FAIL_CONTROL0: RORegister<u32>,
pub TZC_FAIL_ID0: RORegister<u32>,
pub TZC_FAIL_ADDRESS_LOW1: RORegister<u32>,
pub TZC_FAIL_ADDRESS_HIGH1: RORegister<u32>,
pub TZC_FAIL_CONTROL1: RORegister<u32>,
pub TZC_FAIL_ID1: RORegister<u32>,
pub TZC_REGION_BASE_HIGH0: RORegister<u32>,
pub TZC_REGION_TOP_LOW0: RORegister<u32>,
pub TZC_REGION_TOP_HIGH0: RORegister<u32>,
pub TZC_REGION_ATTRIBUTE0: RWRegister<u32>,
pub TZC_REGION_ID_ACCESS0: RWRegister<u32>,
pub TZC_REGION_BASE_LOW1: RWRegister<u32>,
pub TZC_REGION_BASE_HIGH1: RORegister<u32>,
pub TZC_REGION_TOP_LOW1: RWRegister<u32>,
pub TZC_REGION_TOP_HIGH1: RORegister<u32>,
pub TZC_REGION_ATTRIBUTE1: RWRegister<u32>,
pub TZC_REGION_ID_ACCESS1: RWRegister<u32>,
pub TZC_REGION_BASE_LOW2: RWRegister<u32>,
pub TZC_REGION_BASE_HIGH2: RORegister<u32>,
pub TZC_REGION_TOP_LOW2: RWRegister<u32>,
pub TZC_REGION_TOP_HIGH2: RORegister<u32>,
pub TZC_REGION_ATTRIBUTE2: RWRegister<u32>,
pub TZC_REGION_ID_ACCESS2: RWRegister<u32>,
pub TZC_REGION_BASE_LOW3: RWRegister<u32>,
pub TZC_REGION_BASE_HIGH3: RORegister<u32>,
pub TZC_REGION_TOP_LOW3: RWRegister<u32>,
pub TZC_REGION_TOP_HIGH3: RORegister<u32>,
pub TZC_REGION_ATTRIBUTE3: RWRegister<u32>,
pub TZC_REGION_ID_ACCESS3: RWRegister<u32>,
pub TZC_REGION_BASE_LOW4: RWRegister<u32>,
pub TZC_REGION_BASE_HIGH4: RORegister<u32>,
pub TZC_REGION_TOP_LOW4: RWRegister<u32>,
pub TZC_REGION_TOP_HIGH4: RORegister<u32>,
pub TZC_REGION_ATTRIBUTE4: RWRegister<u32>,
pub TZC_REGION_ID_ACCESS4: RWRegister<u32>,
pub TZC_REGION_BASE_LOW5: RWRegister<u32>,
pub TZC_REGION_BASE_HIGH5: RORegister<u32>,
pub TZC_REGION_TOP_LOW5: RWRegister<u32>,
pub TZC_REGION_TOP_HIGH5: RORegister<u32>,
pub TZC_REGION_ATTRIBUTE5: RWRegister<u32>,
pub TZC_REGION_ID_ACCESS5: RWRegister<u32>,
pub TZC_REGION_BASE_LOW6: RWRegister<u32>,
pub TZC_REGION_BASE_HIGH6: RORegister<u32>,
pub TZC_REGION_TOP_LOW6: RWRegister<u32>,
pub TZC_REGION_TOP_HIGH6: RORegister<u32>,
pub TZC_REGION_ATTRIBUTE6: RWRegister<u32>,
pub TZC_REGION_ID_ACCESS6: RWRegister<u32>,
pub TZC_REGION_TOP_LOW7: RWRegister<u32>,
pub TZC_REGION_ATTRIBUTE7: RWRegister<u32>,
pub TZC_REGION_BASE_LOW8: RWRegister<u32>,
pub TZC_REGION_BASE_HIGH8: RORegister<u32>,
pub TZC_REGION_ATTRIBUTE8: RWRegister<u32>,
pub TZC_REGION_BASE_LOW7: RWRegister<u32>,
pub TZC_REGION_BASE_HIGH7: RORegister<u32>,
pub TZC_REGION_TOP_HIGH7: RORegister<u32>,
pub TZC_REGION_ID_ACCESS7: RWRegister<u32>,
pub TZC_REGION_TOP_LOW8: RWRegister<u32>,
pub TZC_REGION_TOP_HIGH8: RORegister<u32>,
pub TZC_REGION_ID_ACCESS8: RWRegister<u32>,
pub TZC_PID4: RORegister<u32>,
pub TZC_PID5: RORegister<u32>,
pub TZC_PID6: RORegister<u32>,
pub TZC_PID7: RORegister<u32>,
pub TZC_PID0: RORegister<u32>,
pub TZC_PID1: RORegister<u32>,
pub TZC_PID2: RORegister<u32>,
pub TZC_PID3: RORegister<u32>,
pub TZC_CID0: RORegister<u32>,
pub TZC_CID1: RORegister<u32>,
pub TZC_CID2: RORegister<u32>,
pub TZC_CID3: RORegister<u32>,
// some fields omitted
}Fields
TZC_BUILD_CONFIG: RORegister<u32>Provides information about TZC configuration.
TZC_ACTION: RWRegister<u32>Controls interrupt and bus error response behavior when regions permission failures occur.
TZC_GATE_KEEPER: RWRegister<u32>Provides control and status for the gate keeper in each filter unit implemented.
TZC_SPECULATION_CTRL: RWRegister<u32>Controls read and write access speculation.
TZC_INT_STATUS: RORegister<u32>Contains the status of the interrupt signal, TZCINT, that reports access security violations or region overlap errors.
TZC_INT_CLEAR: RWRegister<u32>Interrupt clear for each filter.
TZC_FAIL_ADDRESS_LOW0: RORegister<u32>Address low bits of the first failed access in the associated filter (0 to 1).
TZC_FAIL_ADDRESS_HIGH0: RORegister<u32>Address high bit of the first failed access in the associated filter (0 to 1). Not used with 32bit address.
TZC_FAIL_CONTROL0: RORegister<u32>Status information about the first access that failed a region permission check in the associated filter (0 to 1).
TZC_FAIL_ID0: RORegister<u32>Contains the master AXI ARID or AWID of the first access that failed a region permission check in the associated filter unit. This occurs even if the ACTION register is set to not drive the interrupt signal. AXI ID mapping is described in Table4: NSAID definition table (TBD).
TZC_FAIL_ADDRESS_LOW1: RORegister<u32>Address low bits of the first failed access in the associated filter (0 to 1).
TZC_FAIL_ADDRESS_HIGH1: RORegister<u32>Address high bit of the first failed access in the associated filter (0 to 1). Not used with 32bit address.
TZC_FAIL_CONTROL1: RORegister<u32>Status information about the first access that failed a region permission check in the associated filter (0 to 1).
TZC_FAIL_ID1: RORegister<u32>Contains the master AXI ARID or AWID of the first access that failed a region permission check in the associated filter unit. This occurs even if the ACTION register is set to not drive the interrupt signal. AXI ID mapping is described in Table4: NSAID definition table (TBD).
TZC_REGION_BASE_HIGH0: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_TOP_LOW0: RORegister<u32>Top address bits [31:12] for region 0.
TZC_REGION_TOP_HIGH0: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ATTRIBUTE0: RWRegister<u32>Region 0 attributes.
TZC_REGION_ID_ACCESS0: RWRegister<u32>Region non-secure access based on NSAID.
TZC_REGION_BASE_LOW1: RWRegister<u32>Base address low for regions 1 to 8.
TZC_REGION_BASE_HIGH1: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_TOP_LOW1: RWRegister<u32>Top address bits [31:12] for region x.
TZC_REGION_TOP_HIGH1: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ATTRIBUTE1: RWRegister<u32>Region x attributes.
TZC_REGION_ID_ACCESS1: RWRegister<u32>Region non-secure access based on NSAID.
TZC_REGION_BASE_LOW2: RWRegister<u32>Base address low for regions 1 to 8.
TZC_REGION_BASE_HIGH2: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_TOP_LOW2: RWRegister<u32>Top address bits [31:12] for region x.
TZC_REGION_TOP_HIGH2: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ATTRIBUTE2: RWRegister<u32>Region x attributes.
TZC_REGION_ID_ACCESS2: RWRegister<u32>Region non-secure access based on NSAID.
TZC_REGION_BASE_LOW3: RWRegister<u32>Base address low for regions 1 to 8.
TZC_REGION_BASE_HIGH3: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_TOP_LOW3: RWRegister<u32>Top address bits [31:12] for region x.
TZC_REGION_TOP_HIGH3: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ATTRIBUTE3: RWRegister<u32>Region x attributes.
TZC_REGION_ID_ACCESS3: RWRegister<u32>Region non-secure access based on NSAID.
TZC_REGION_BASE_LOW4: RWRegister<u32>Base address low for regions 1 to 8.
TZC_REGION_BASE_HIGH4: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_TOP_LOW4: RWRegister<u32>Top address bits [31:12] for region x.
TZC_REGION_TOP_HIGH4: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ATTRIBUTE4: RWRegister<u32>Region x attributes.
TZC_REGION_ID_ACCESS4: RWRegister<u32>Region non-secure access based on NSAID.
TZC_REGION_BASE_LOW5: RWRegister<u32>Base address low for regions 1 to 8.
TZC_REGION_BASE_HIGH5: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_TOP_LOW5: RWRegister<u32>Top address bits [31:12] for region x.
TZC_REGION_TOP_HIGH5: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ATTRIBUTE5: RWRegister<u32>Region x attributes.
TZC_REGION_ID_ACCESS5: RWRegister<u32>Region non-secure access based on NSAID.
TZC_REGION_BASE_LOW6: RWRegister<u32>Base address low for regions 1 to 8.
TZC_REGION_BASE_HIGH6: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_TOP_LOW6: RWRegister<u32>Top address bits [31:12] for region x.
TZC_REGION_TOP_HIGH6: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ATTRIBUTE6: RWRegister<u32>Region x attributes.
TZC_REGION_ID_ACCESS6: RWRegister<u32>Region non-secure access based on NSAID.
TZC_REGION_TOP_LOW7: RWRegister<u32>Top address bits [31:12] for region x.
TZC_REGION_ATTRIBUTE7: RWRegister<u32>Region x attributes.
TZC_REGION_BASE_LOW8: RWRegister<u32>Base address low for regions 1 to 8.
TZC_REGION_BASE_HIGH8: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_ATTRIBUTE8: RWRegister<u32>Region x attributes.
TZC_REGION_BASE_LOW7: RWRegister<u32>Base address low for regions 1 to 8.
TZC_REGION_BASE_HIGH7: RORegister<u32>Base address high are not used with 32-bit address.
TZC_REGION_TOP_HIGH7: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ID_ACCESS7: RWRegister<u32>Region non-secure access based on NSAID.
TZC_REGION_TOP_LOW8: RWRegister<u32>Top address bits [31:12] for region x.
TZC_REGION_TOP_HIGH8: RORegister<u32>Top address high of region are not used with 32-bit address.
TZC_REGION_ID_ACCESS8: RWRegister<u32>Region non-secure access based on NSAID.
TZC_PID4: RORegister<u32>Peripheral ID 4.
TZC_PID5: RORegister<u32>Peripheral ID 5.
TZC_PID6: RORegister<u32>Peripheral ID 6.
TZC_PID7: RORegister<u32>Peripheral ID 7.
TZC_PID0: RORegister<u32>Peripheral ID 0.
TZC_PID1: RORegister<u32>Peripheral ID 1.
TZC_PID2: RORegister<u32>Peripheral ID 2.
TZC_PID3: RORegister<u32>Peripheral ID 3.
TZC_CID0: RORegister<u32>Component ID 0.
TZC_CID1: RORegister<u32>Component ID 1.
TZC_CID2: RORegister<u32>Component ID 2.
TZC_CID3: RORegister<u32>Component ID 3.