Struct stm32ral::stm32mp::peripherals::mdma::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 418 fields
pub MDMA_GISR0: RORegister<u32>,
pub MDMA_SGISR0: RORegister<u32>,
pub MDMA_C0ISR: RORegister<u32>,
pub MDMA_C0IFCR: WORegister<u32>,
pub MDMA_C0ESR: RORegister<u32>,
pub MDMA_C0CR: RWRegister<u32>,
pub MDMA_C0TCR: RWRegister<u32>,
pub MDMA_C0BNDTR: RWRegister<u32>,
pub MDMA_C0SAR: RWRegister<u32>,
pub MDMA_C0DAR: RWRegister<u32>,
pub MDMA_C0BRUR: RWRegister<u32>,
pub MDMA_C0LAR: RWRegister<u32>,
pub MDMA_C0TBR: RWRegister<u32>,
pub MDMA_C0MAR: RWRegister<u32>,
pub MDMA_C0MDR: RWRegister<u32>,
pub MDMA_C1ISR: RORegister<u32>,
pub MDMA_C1IFCR: WORegister<u32>,
pub MDMA_C1ESR: RORegister<u32>,
pub MDMA_C1CR: RWRegister<u32>,
pub MDMA_C1TCR: RWRegister<u32>,
pub MDMA_C1BNDTR: RWRegister<u32>,
pub MDMA_C1SAR: RWRegister<u32>,
pub MDMA_C1DAR: RWRegister<u32>,
pub MDMA_C1BRUR: RWRegister<u32>,
pub MDMA_C1LAR: RWRegister<u32>,
pub MDMA_C1TBR: RWRegister<u32>,
pub MDMA_C1MAR: RWRegister<u32>,
pub MDMA_C1MDR: RWRegister<u32>,
pub MDMA_C2ISR: RORegister<u32>,
pub MDMA_C2IFCR: WORegister<u32>,
pub MDMA_C2ESR: RORegister<u32>,
pub MDMA_C2CR: RWRegister<u32>,
pub MDMA_C2TCR: RWRegister<u32>,
pub MDMA_C2BNDTR: RWRegister<u32>,
pub MDMA_C2SAR: RWRegister<u32>,
pub MDMA_C2DAR: RWRegister<u32>,
pub MDMA_C2BRUR: RWRegister<u32>,
pub MDMA_C2LAR: RWRegister<u32>,
pub MDMA_C2TBR: RWRegister<u32>,
pub MDMA_C2MAR: RWRegister<u32>,
pub MDMA_C2MDR: RWRegister<u32>,
pub MDMA_C3ISR: RORegister<u32>,
pub MDMA_C3IFCR: WORegister<u32>,
pub MDMA_C3ESR: RORegister<u32>,
pub MDMA_C3CR: RWRegister<u32>,
pub MDMA_C3TCR: RWRegister<u32>,
pub MDMA_C3BNDTR: RWRegister<u32>,
pub MDMA_C3SAR: RWRegister<u32>,
pub MDMA_C3DAR: RWRegister<u32>,
pub MDMA_C3BRUR: RWRegister<u32>,
pub MDMA_C3LAR: RWRegister<u32>,
pub MDMA_C3TBR: RWRegister<u32>,
pub MDMA_C3MAR: RWRegister<u32>,
pub MDMA_C3MDR: RWRegister<u32>,
pub MDMA_C4ISR: RORegister<u32>,
pub MDMA_C4IFCR: WORegister<u32>,
pub MDMA_C4ESR: RORegister<u32>,
pub MDMA_C4CR: RWRegister<u32>,
pub MDMA_C4TCR: RWRegister<u32>,
pub MDMA_C4BNDTR: RWRegister<u32>,
pub MDMA_C4SAR: RWRegister<u32>,
pub MDMA_C4DAR: RWRegister<u32>,
pub MDMA_C4BRUR: RWRegister<u32>,
pub MDMA_C4LAR: RWRegister<u32>,
pub MDMA_C4TBR: RWRegister<u32>,
pub MDMA_C4MAR: RWRegister<u32>,
pub MDMA_C4MDR: RWRegister<u32>,
pub MDMA_C5ISR: RORegister<u32>,
pub MDMA_C5IFCR: WORegister<u32>,
pub MDMA_C5ESR: RORegister<u32>,
pub MDMA_C5CR: RWRegister<u32>,
pub MDMA_C5TCR: RWRegister<u32>,
pub MDMA_C5BNDTR: RWRegister<u32>,
pub MDMA_C5SAR: RWRegister<u32>,
pub MDMA_C5DAR: RWRegister<u32>,
pub MDMA_C5BRUR: RWRegister<u32>,
pub MDMA_C5LAR: RWRegister<u32>,
pub MDMA_C5TBR: RWRegister<u32>,
pub MDMA_C5MAR: RWRegister<u32>,
pub MDMA_C5MDR: RWRegister<u32>,
pub MDMA_C6ISR: RORegister<u32>,
pub MDMA_C6IFCR: WORegister<u32>,
pub MDMA_C6ESR: RORegister<u32>,
pub MDMA_C6CR: RWRegister<u32>,
pub MDMA_C6TCR: RWRegister<u32>,
pub MDMA_C6BNDTR: RWRegister<u32>,
pub MDMA_C6SAR: RWRegister<u32>,
pub MDMA_C6DAR: RWRegister<u32>,
pub MDMA_C6BRUR: RWRegister<u32>,
pub MDMA_C6LAR: RWRegister<u32>,
pub MDMA_C6TBR: RWRegister<u32>,
pub MDMA_C6MAR: RWRegister<u32>,
pub MDMA_C6MDR: RWRegister<u32>,
pub MDMA_C7ISR: RORegister<u32>,
pub MDMA_C7IFCR: WORegister<u32>,
pub MDMA_C7ESR: RORegister<u32>,
pub MDMA_C7CR: RWRegister<u32>,
pub MDMA_C7TCR: RWRegister<u32>,
pub MDMA_C7BNDTR: RWRegister<u32>,
pub MDMA_C7SAR: RWRegister<u32>,
pub MDMA_C7DAR: RWRegister<u32>,
pub MDMA_C7BRUR: RWRegister<u32>,
pub MDMA_C7LAR: RWRegister<u32>,
pub MDMA_C7TBR: RWRegister<u32>,
pub MDMA_C7MAR: RWRegister<u32>,
pub MDMA_C7MDR: RWRegister<u32>,
pub MDMA_C8ISR: RORegister<u32>,
pub MDMA_C8IFCR: WORegister<u32>,
pub MDMA_C8ESR: RORegister<u32>,
pub MDMA_C8CR: RWRegister<u32>,
pub MDMA_C8TCR: RWRegister<u32>,
pub MDMA_C8BNDTR: RWRegister<u32>,
pub MDMA_C8SAR: RWRegister<u32>,
pub MDMA_C8DAR: RWRegister<u32>,
pub MDMA_C8BRUR: RWRegister<u32>,
pub MDMA_C8LAR: RWRegister<u32>,
pub MDMA_C8TBR: RWRegister<u32>,
pub MDMA_C8MAR: RWRegister<u32>,
pub MDMA_C8MDR: RWRegister<u32>,
pub MDMA_C9ISR: RORegister<u32>,
pub MDMA_C9IFCR: WORegister<u32>,
pub MDMA_C9ESR: RORegister<u32>,
pub MDMA_C9CR: RWRegister<u32>,
pub MDMA_C9TCR: RWRegister<u32>,
pub MDMA_C9BNDTR: RWRegister<u32>,
pub MDMA_C9SAR: RWRegister<u32>,
pub MDMA_C9DAR: RWRegister<u32>,
pub MDMA_C9BRUR: RWRegister<u32>,
pub MDMA_C9LAR: RWRegister<u32>,
pub MDMA_C9TBR: RWRegister<u32>,
pub MDMA_C9MAR: RWRegister<u32>,
pub MDMA_C9MDR: RWRegister<u32>,
pub MDMA_C10ISR: RORegister<u32>,
pub MDMA_C10IFCR: WORegister<u32>,
pub MDMA_C10ESR: RORegister<u32>,
pub MDMA_C10CR: RWRegister<u32>,
pub MDMA_C10TCR: RWRegister<u32>,
pub MDMA_C10BNDTR: RWRegister<u32>,
pub MDMA_C10SAR: RWRegister<u32>,
pub MDMA_C10DAR: RWRegister<u32>,
pub MDMA_C10BRUR: RWRegister<u32>,
pub MDMA_C10LAR: RWRegister<u32>,
pub MDMA_C10TBR: RWRegister<u32>,
pub MDMA_C10MAR: RWRegister<u32>,
pub MDMA_C10MDR: RWRegister<u32>,
pub MDMA_C11ISR: RORegister<u32>,
pub MDMA_C11IFCR: WORegister<u32>,
pub MDMA_C11ESR: RORegister<u32>,
pub MDMA_C11CR: RWRegister<u32>,
pub MDMA_C11TCR: RWRegister<u32>,
pub MDMA_C11BNDTR: RWRegister<u32>,
pub MDMA_C11SAR: RWRegister<u32>,
pub MDMA_C11DAR: RWRegister<u32>,
pub MDMA_C11BRUR: RWRegister<u32>,
pub MDMA_C11LAR: RWRegister<u32>,
pub MDMA_C11TBR: RWRegister<u32>,
pub MDMA_C11MAR: RWRegister<u32>,
pub MDMA_C11MDR: RWRegister<u32>,
pub MDMA_C12ISR: RORegister<u32>,
pub MDMA_C12IFCR: WORegister<u32>,
pub MDMA_C12ESR: RORegister<u32>,
pub MDMA_C12CR: RWRegister<u32>,
pub MDMA_C12TCR: RWRegister<u32>,
pub MDMA_C12BNDTR: RWRegister<u32>,
pub MDMA_C12SAR: RWRegister<u32>,
pub MDMA_C12DAR: RWRegister<u32>,
pub MDMA_C12BRUR: RWRegister<u32>,
pub MDMA_C12LAR: RWRegister<u32>,
pub MDMA_C12TBR: RWRegister<u32>,
pub MDMA_C12MAR: RWRegister<u32>,
pub MDMA_C12MDR: RWRegister<u32>,
pub MDMA_C13ISR: RORegister<u32>,
pub MDMA_C13IFCR: WORegister<u32>,
pub MDMA_C13ESR: RORegister<u32>,
pub MDMA_C13CR: RWRegister<u32>,
pub MDMA_C13TCR: RWRegister<u32>,
pub MDMA_C13BNDTR: RWRegister<u32>,
pub MDMA_C13SAR: RWRegister<u32>,
pub MDMA_C13DAR: RWRegister<u32>,
pub MDMA_C13BRUR: RWRegister<u32>,
pub MDMA_C13LAR: RWRegister<u32>,
pub MDMA_C13TBR: RWRegister<u32>,
pub MDMA_C13MAR: RWRegister<u32>,
pub MDMA_C13MDR: RWRegister<u32>,
pub MDMA_C14ISR: RORegister<u32>,
pub MDMA_C14IFCR: WORegister<u32>,
pub MDMA_C14ESR: RORegister<u32>,
pub MDMA_C14CR: RWRegister<u32>,
pub MDMA_C14TCR: RWRegister<u32>,
pub MDMA_C14BNDTR: RWRegister<u32>,
pub MDMA_C14SAR: RWRegister<u32>,
pub MDMA_C14DAR: RWRegister<u32>,
pub MDMA_C14BRUR: RWRegister<u32>,
pub MDMA_C14LAR: RWRegister<u32>,
pub MDMA_C14TBR: RWRegister<u32>,
pub MDMA_C14MAR: RWRegister<u32>,
pub MDMA_C14MDR: RWRegister<u32>,
pub MDMA_C15ISR: RORegister<u32>,
pub MDMA_C15IFCR: WORegister<u32>,
pub MDMA_C15ESR: RORegister<u32>,
pub MDMA_C15CR: RWRegister<u32>,
pub MDMA_C15TCR: RWRegister<u32>,
pub MDMA_C15BNDTR: RWRegister<u32>,
pub MDMA_C15SAR: RWRegister<u32>,
pub MDMA_C15DAR: RWRegister<u32>,
pub MDMA_C15BRUR: RWRegister<u32>,
pub MDMA_C15LAR: RWRegister<u32>,
pub MDMA_C15TBR: RWRegister<u32>,
pub MDMA_C15MAR: RWRegister<u32>,
pub MDMA_C15MDR: RWRegister<u32>,
pub MDMA_C16ISR: RORegister<u32>,
pub MDMA_C16IFCR: WORegister<u32>,
pub MDMA_C16ESR: RORegister<u32>,
pub MDMA_C16CR: RWRegister<u32>,
pub MDMA_C16TCR: RWRegister<u32>,
pub MDMA_C16BNDTR: RWRegister<u32>,
pub MDMA_C16SAR: RWRegister<u32>,
pub MDMA_C16DAR: RWRegister<u32>,
pub MDMA_C16BRUR: RWRegister<u32>,
pub MDMA_C16LAR: RWRegister<u32>,
pub MDMA_C16TBR: RWRegister<u32>,
pub MDMA_C16MAR: RWRegister<u32>,
pub MDMA_C16MDR: RWRegister<u32>,
pub MDMA_C17ISR: RORegister<u32>,
pub MDMA_C17IFCR: WORegister<u32>,
pub MDMA_C17ESR: RORegister<u32>,
pub MDMA_C17CR: RWRegister<u32>,
pub MDMA_C17TCR: RWRegister<u32>,
pub MDMA_C17BNDTR: RWRegister<u32>,
pub MDMA_C17SAR: RWRegister<u32>,
pub MDMA_C17DAR: RWRegister<u32>,
pub MDMA_C17BRUR: RWRegister<u32>,
pub MDMA_C17LAR: RWRegister<u32>,
pub MDMA_C17TBR: RWRegister<u32>,
pub MDMA_C17MAR: RWRegister<u32>,
pub MDMA_C17MDR: RWRegister<u32>,
pub MDMA_C18ISR: RORegister<u32>,
pub MDMA_C18IFCR: WORegister<u32>,
pub MDMA_C18ESR: RORegister<u32>,
pub MDMA_C18CR: RWRegister<u32>,
pub MDMA_C18TCR: RWRegister<u32>,
pub MDMA_C18BNDTR: RWRegister<u32>,
pub MDMA_C18SAR: RWRegister<u32>,
pub MDMA_C18DAR: RWRegister<u32>,
pub MDMA_C18BRUR: RWRegister<u32>,
pub MDMA_C18LAR: RWRegister<u32>,
pub MDMA_C18TBR: RWRegister<u32>,
pub MDMA_C18MAR: RWRegister<u32>,
pub MDMA_C18MDR: RWRegister<u32>,
pub MDMA_C19ISR: RORegister<u32>,
pub MDMA_C19IFCR: WORegister<u32>,
pub MDMA_C19ESR: RORegister<u32>,
pub MDMA_C19CR: RWRegister<u32>,
pub MDMA_C19TCR: RWRegister<u32>,
pub MDMA_C19BNDTR: RWRegister<u32>,
pub MDMA_C19SAR: RWRegister<u32>,
pub MDMA_C19DAR: RWRegister<u32>,
pub MDMA_C19BRUR: RWRegister<u32>,
pub MDMA_C19LAR: RWRegister<u32>,
pub MDMA_C19TBR: RWRegister<u32>,
pub MDMA_C19MAR: RWRegister<u32>,
pub MDMA_C19MDR: RWRegister<u32>,
pub MDMA_C20ISR: RORegister<u32>,
pub MDMA_C20IFCR: WORegister<u32>,
pub MDMA_C20ESR: RORegister<u32>,
pub MDMA_C20CR: RWRegister<u32>,
pub MDMA_C20TCR: RWRegister<u32>,
pub MDMA_C20BNDTR: RWRegister<u32>,
pub MDMA_C20SAR: RWRegister<u32>,
pub MDMA_C20DAR: RWRegister<u32>,
pub MDMA_C20BRUR: RWRegister<u32>,
pub MDMA_C20LAR: RWRegister<u32>,
pub MDMA_C20TBR: RWRegister<u32>,
pub MDMA_C20MAR: RWRegister<u32>,
pub MDMA_C20MDR: RWRegister<u32>,
pub MDMA_C21ISR: RORegister<u32>,
pub MDMA_C21IFCR: WORegister<u32>,
pub MDMA_C21ESR: RORegister<u32>,
pub MDMA_C21CR: RWRegister<u32>,
pub MDMA_C21TCR: RWRegister<u32>,
pub MDMA_C21BNDTR: RWRegister<u32>,
pub MDMA_C21SAR: RWRegister<u32>,
pub MDMA_C21DAR: RWRegister<u32>,
pub MDMA_C21BRUR: RWRegister<u32>,
pub MDMA_C21LAR: RWRegister<u32>,
pub MDMA_C21TBR: RWRegister<u32>,
pub MDMA_C21MAR: RWRegister<u32>,
pub MDMA_C21MDR: RWRegister<u32>,
pub MDMA_C22ISR: RORegister<u32>,
pub MDMA_C22IFCR: WORegister<u32>,
pub MDMA_C22ESR: RORegister<u32>,
pub MDMA_C22CR: RWRegister<u32>,
pub MDMA_C22TCR: RWRegister<u32>,
pub MDMA_C22BNDTR: RWRegister<u32>,
pub MDMA_C22SAR: RWRegister<u32>,
pub MDMA_C22DAR: RWRegister<u32>,
pub MDMA_C22BRUR: RWRegister<u32>,
pub MDMA_C22LAR: RWRegister<u32>,
pub MDMA_C22TBR: RWRegister<u32>,
pub MDMA_C22MAR: RWRegister<u32>,
pub MDMA_C22MDR: RWRegister<u32>,
pub MDMA_C23ISR: RORegister<u32>,
pub MDMA_C23IFCR: WORegister<u32>,
pub MDMA_C23ESR: RORegister<u32>,
pub MDMA_C23CR: RWRegister<u32>,
pub MDMA_C23TCR: RWRegister<u32>,
pub MDMA_C23BNDTR: RWRegister<u32>,
pub MDMA_C23SAR: RWRegister<u32>,
pub MDMA_C23DAR: RWRegister<u32>,
pub MDMA_C23BRUR: RWRegister<u32>,
pub MDMA_C23LAR: RWRegister<u32>,
pub MDMA_C23TBR: RWRegister<u32>,
pub MDMA_C23MAR: RWRegister<u32>,
pub MDMA_C23MDR: RWRegister<u32>,
pub MDMA_C24ISR: RORegister<u32>,
pub MDMA_C24IFCR: WORegister<u32>,
pub MDMA_C24ESR: RORegister<u32>,
pub MDMA_C24CR: RWRegister<u32>,
pub MDMA_C24TCR: RWRegister<u32>,
pub MDMA_C24BNDTR: RWRegister<u32>,
pub MDMA_C24SAR: RWRegister<u32>,
pub MDMA_C24DAR: RWRegister<u32>,
pub MDMA_C24BRUR: RWRegister<u32>,
pub MDMA_C24LAR: RWRegister<u32>,
pub MDMA_C24TBR: RWRegister<u32>,
pub MDMA_C24MAR: RWRegister<u32>,
pub MDMA_C24MDR: RWRegister<u32>,
pub MDMA_C25ISR: RORegister<u32>,
pub MDMA_C25IFCR: WORegister<u32>,
pub MDMA_C25ESR: RORegister<u32>,
pub MDMA_C25CR: RWRegister<u32>,
pub MDMA_C25TCR: RWRegister<u32>,
pub MDMA_C25BNDTR: RWRegister<u32>,
pub MDMA_C25SAR: RWRegister<u32>,
pub MDMA_C25DAR: RWRegister<u32>,
pub MDMA_C25BRUR: RWRegister<u32>,
pub MDMA_C25LAR: RWRegister<u32>,
pub MDMA_C25TBR: RWRegister<u32>,
pub MDMA_C25MAR: RWRegister<u32>,
pub MDMA_C25MDR: RWRegister<u32>,
pub MDMA_C26ISR: RORegister<u32>,
pub MDMA_C26IFCR: WORegister<u32>,
pub MDMA_C26ESR: RORegister<u32>,
pub MDMA_C26CR: RWRegister<u32>,
pub MDMA_C26TCR: RWRegister<u32>,
pub MDMA_C26BNDTR: RWRegister<u32>,
pub MDMA_C26SAR: RWRegister<u32>,
pub MDMA_C26DAR: RWRegister<u32>,
pub MDMA_C26BRUR: RWRegister<u32>,
pub MDMA_C26LAR: RWRegister<u32>,
pub MDMA_C26TBR: RWRegister<u32>,
pub MDMA_C26MAR: RWRegister<u32>,
pub MDMA_C26MDR: RWRegister<u32>,
pub MDMA_C27ISR: RORegister<u32>,
pub MDMA_C27IFCR: WORegister<u32>,
pub MDMA_C27ESR: RORegister<u32>,
pub MDMA_C27CR: RWRegister<u32>,
pub MDMA_C27TCR: RWRegister<u32>,
pub MDMA_C27BNDTR: RWRegister<u32>,
pub MDMA_C27SAR: RWRegister<u32>,
pub MDMA_C27DAR: RWRegister<u32>,
pub MDMA_C27BRUR: RWRegister<u32>,
pub MDMA_C27LAR: RWRegister<u32>,
pub MDMA_C27TBR: RWRegister<u32>,
pub MDMA_C27MAR: RWRegister<u32>,
pub MDMA_C27MDR: RWRegister<u32>,
pub MDMA_C28ISR: RORegister<u32>,
pub MDMA_C28IFCR: WORegister<u32>,
pub MDMA_C28ESR: RORegister<u32>,
pub MDMA_C28CR: RWRegister<u32>,
pub MDMA_C28TCR: RWRegister<u32>,
pub MDMA_C28BNDTR: RWRegister<u32>,
pub MDMA_C28SAR: RWRegister<u32>,
pub MDMA_C28DAR: RWRegister<u32>,
pub MDMA_C28BRUR: RWRegister<u32>,
pub MDMA_C28LAR: RWRegister<u32>,
pub MDMA_C28TBR: RWRegister<u32>,
pub MDMA_C28MAR: RWRegister<u32>,
pub MDMA_C28MDR: RWRegister<u32>,
pub MDMA_C29ISR: RORegister<u32>,
pub MDMA_C29IFCR: WORegister<u32>,
pub MDMA_C29ESR: RORegister<u32>,
pub MDMA_C29CR: RWRegister<u32>,
pub MDMA_C29TCR: RWRegister<u32>,
pub MDMA_C29BNDTR: RWRegister<u32>,
pub MDMA_C29SAR: RWRegister<u32>,
pub MDMA_C29DAR: RWRegister<u32>,
pub MDMA_C29BRUR: RWRegister<u32>,
pub MDMA_C29LAR: RWRegister<u32>,
pub MDMA_C29TBR: RWRegister<u32>,
pub MDMA_C29MAR: RWRegister<u32>,
pub MDMA_C29MDR: RWRegister<u32>,
pub MDMA_C30ISR: RORegister<u32>,
pub MDMA_C30IFCR: WORegister<u32>,
pub MDMA_C30ESR: RORegister<u32>,
pub MDMA_C30CR: RWRegister<u32>,
pub MDMA_C30TCR: RWRegister<u32>,
pub MDMA_C30BNDTR: RWRegister<u32>,
pub MDMA_C30SAR: RWRegister<u32>,
pub MDMA_C30DAR: RWRegister<u32>,
pub MDMA_C30BRUR: RWRegister<u32>,
pub MDMA_C30LAR: RWRegister<u32>,
pub MDMA_C30TBR: RWRegister<u32>,
pub MDMA_C30MAR: RWRegister<u32>,
pub MDMA_C30MDR: RWRegister<u32>,
pub MDMA_C31ISR: RORegister<u32>,
pub MDMA_C31IFCR: WORegister<u32>,
pub MDMA_C31ESR: RORegister<u32>,
pub MDMA_C31CR: RWRegister<u32>,
pub MDMA_C31TCR: RWRegister<u32>,
pub MDMA_C31BNDTR: RWRegister<u32>,
pub MDMA_C31SAR: RWRegister<u32>,
pub MDMA_C31DAR: RWRegister<u32>,
pub MDMA_C31BRUR: RWRegister<u32>,
pub MDMA_C31LAR: RWRegister<u32>,
pub MDMA_C31TBR: RWRegister<u32>,
pub MDMA_C31MAR: RWRegister<u32>,
pub MDMA_C31MDR: RWRegister<u32>,
// some fields omitted
}Fields
MDMA_GISR0: RORegister<u32>MDMA global interrupt/status register
MDMA_SGISR0: RORegister<u32>MDMA secure global interrupt/status register
MDMA_C0ISR: RORegister<u32>MDMA channel 0 interrupt/status register
MDMA_C0IFCR: WORegister<u32>MDMA channel 0 interrupt flag clear register
MDMA_C0ESR: RORegister<u32>MDMA channel 0 error status register
MDMA_C0CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C0TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C0BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C0SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C0DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C0BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C0LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C0TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C0MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C0MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C1ISR: RORegister<u32>MDMA channel 1 interrupt/status register
MDMA_C1IFCR: WORegister<u32>MDMA channel 1 interrupt flag clear register
MDMA_C1ESR: RORegister<u32>MDMA channel 1 error status register
MDMA_C1CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C1TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C1BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C1SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C1DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C1BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C1LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C1TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C1MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C1MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C2ISR: RORegister<u32>MDMA channel 2 interrupt/status register
MDMA_C2IFCR: WORegister<u32>MDMA channel 2 interrupt flag clear register
MDMA_C2ESR: RORegister<u32>MDMA channel 2 error status register
MDMA_C2CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C2TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C2BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C2SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C2DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C2BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C2LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C2TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C2MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C2MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C3ISR: RORegister<u32>MDMA channel 3 interrupt/status register
MDMA_C3IFCR: WORegister<u32>MDMA channel 3 interrupt flag clear register
MDMA_C3ESR: RORegister<u32>MDMA channel 3 error status register
MDMA_C3CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C3TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C3BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C3SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C3DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C3BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C3LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C3TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C3MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C3MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C4ISR: RORegister<u32>MDMA channel 4 interrupt/status register
MDMA_C4IFCR: WORegister<u32>MDMA channel 4 interrupt flag clear register
MDMA_C4ESR: RORegister<u32>MDMA channel 4 error status register
MDMA_C4CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C4TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C4BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C4SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C4DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C4BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C4LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C4TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C4MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C4MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C5ISR: RORegister<u32>MDMA channel 5 interrupt/status register
MDMA_C5IFCR: WORegister<u32>MDMA channel 5 interrupt flag clear register
MDMA_C5ESR: RORegister<u32>MDMA channel 5 error status register
MDMA_C5CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C5TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C5BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C5SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C5DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C5BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C5LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C5TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C5MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C5MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C6ISR: RORegister<u32>MDMA channel 6 interrupt/status register
MDMA_C6IFCR: WORegister<u32>MDMA channel 6 interrupt flag clear register
MDMA_C6ESR: RORegister<u32>MDMA channel 6 error status register
MDMA_C6CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C6TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C6BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C6SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C6DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C6BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C6LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C6TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C6MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C6MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C7ISR: RORegister<u32>MDMA channel 7 interrupt/status register
MDMA_C7IFCR: WORegister<u32>MDMA channel 7 interrupt flag clear register
MDMA_C7ESR: RORegister<u32>MDMA channel 7 error status register
MDMA_C7CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C7TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C7BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C7SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C7DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C7BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C7LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C7TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C7MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C7MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C8ISR: RORegister<u32>MDMA channel 8 interrupt/status register
MDMA_C8IFCR: WORegister<u32>MDMA channel 8 interrupt flag clear register
MDMA_C8ESR: RORegister<u32>MDMA channel 8 error status register
MDMA_C8CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C8TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C8BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C8SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C8DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C8BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C8LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C8TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C8MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C8MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C9ISR: RORegister<u32>MDMA channel 9 interrupt/status register
MDMA_C9IFCR: WORegister<u32>MDMA channel 9 interrupt flag clear register
MDMA_C9ESR: RORegister<u32>MDMA channel 9 error status register
MDMA_C9CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C9TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C9BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C9SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C9DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C9BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C9LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C9TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C9MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C9MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C10ISR: RORegister<u32>MDMA channel 10 interrupt/status register
MDMA_C10IFCR: WORegister<u32>MDMA channel 10 interrupt flag clear register
MDMA_C10ESR: RORegister<u32>MDMA channel 10 error status register
MDMA_C10CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C10TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C10BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C10SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C10DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C10BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C10LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C10TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C10MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C10MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C11ISR: RORegister<u32>MDMA channel 11 interrupt/status register
MDMA_C11IFCR: WORegister<u32>MDMA channel 11 interrupt flag clear register
MDMA_C11ESR: RORegister<u32>MDMA channel 11 error status register
MDMA_C11CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C11TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C11BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C11SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C11DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C11BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C11LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C11TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C11MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C11MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C12ISR: RORegister<u32>MDMA channel 12 interrupt/status register
MDMA_C12IFCR: WORegister<u32>MDMA channel 12 interrupt flag clear register
MDMA_C12ESR: RORegister<u32>MDMA channel 12 error status register
MDMA_C12CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C12TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C12BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C12SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C12DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C12BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C12LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C12TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C12MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C12MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C13ISR: RORegister<u32>MDMA channel 13 interrupt/status register
MDMA_C13IFCR: WORegister<u32>MDMA channel 13 interrupt flag clear register
MDMA_C13ESR: RORegister<u32>MDMA channel 13 error status register
MDMA_C13CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C13TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C13BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C13SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C13DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C13BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C13LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C13TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C13MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C13MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C14ISR: RORegister<u32>MDMA channel 14 interrupt/status register
MDMA_C14IFCR: WORegister<u32>MDMA channel 14 interrupt flag clear register
MDMA_C14ESR: RORegister<u32>MDMA channel 14 error status register
MDMA_C14CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C14TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C14BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C14SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C14DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C14BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C14LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C14TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C14MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C14MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C15ISR: RORegister<u32>MDMA channel 15 interrupt/status register
MDMA_C15IFCR: WORegister<u32>MDMA channel 15 interrupt flag clear register
MDMA_C15ESR: RORegister<u32>MDMA channel 15 error status register
MDMA_C15CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C15TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C15BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C15SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C15DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C15BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C15LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C15TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C15MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C15MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C16ISR: RORegister<u32>MDMA channel 16 interrupt/status register
MDMA_C16IFCR: WORegister<u32>MDMA channel 16 interrupt flag clear register
MDMA_C16ESR: RORegister<u32>MDMA channel 16 error status register
MDMA_C16CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C16TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C16BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C16SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C16DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C16BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C16LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C16TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C16MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C16MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C17ISR: RORegister<u32>MDMA channel 17 interrupt/status register
MDMA_C17IFCR: WORegister<u32>MDMA channel 17 interrupt flag clear register
MDMA_C17ESR: RORegister<u32>MDMA channel 17 error status register
MDMA_C17CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C17TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C17BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C17SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C17DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C17BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C17LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C17TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C17MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C17MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C18ISR: RORegister<u32>MDMA channel 18 interrupt/status register
MDMA_C18IFCR: WORegister<u32>MDMA channel 18 interrupt flag clear register
MDMA_C18ESR: RORegister<u32>MDMA channel 18 error status register
MDMA_C18CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C18TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C18BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C18SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C18DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C18BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C18LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C18TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C18MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C18MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C19ISR: RORegister<u32>MDMA channel 19 interrupt/status register
MDMA_C19IFCR: WORegister<u32>MDMA channel 19 interrupt flag clear register
MDMA_C19ESR: RORegister<u32>MDMA channel 19 error status register
MDMA_C19CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C19TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C19BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C19SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C19DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C19BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C19LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C19TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C19MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C19MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C20ISR: RORegister<u32>MDMA channel 20 interrupt/status register
MDMA_C20IFCR: WORegister<u32>MDMA channel 20 interrupt flag clear register
MDMA_C20ESR: RORegister<u32>MDMA channel 20 error status register
MDMA_C20CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C20TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C20BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C20SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C20DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C20BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C20LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C20TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C20MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C20MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C21ISR: RORegister<u32>MDMA channel 21 interrupt/status register
MDMA_C21IFCR: WORegister<u32>MDMA channel 21 interrupt flag clear register
MDMA_C21ESR: RORegister<u32>MDMA channel 21 error status register
MDMA_C21CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C21TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C21BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C21SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C21DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C21BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C21LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C21TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C21MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C21MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C22ISR: RORegister<u32>MDMA channel 22 interrupt/status register
MDMA_C22IFCR: WORegister<u32>MDMA channel 22 interrupt flag clear register
MDMA_C22ESR: RORegister<u32>MDMA channel 22 error status register
MDMA_C22CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C22TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C22BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C22SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C22DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C22BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C22LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C22TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C22MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C22MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C23ISR: RORegister<u32>MDMA channel 23 interrupt/status register
MDMA_C23IFCR: WORegister<u32>MDMA channel 23 interrupt flag clear register
MDMA_C23ESR: RORegister<u32>MDMA channel 23 error status register
MDMA_C23CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C23TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C23BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C23SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C23DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C23BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C23LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C23TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C23MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C23MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C24ISR: RORegister<u32>MDMA channel 24 interrupt/status register
MDMA_C24IFCR: WORegister<u32>MDMA channel 24 interrupt flag clear register
MDMA_C24ESR: RORegister<u32>MDMA channel 24 error status register
MDMA_C24CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C24TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C24BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C24SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C24DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C24BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C24LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C24TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C24MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C24MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C25ISR: RORegister<u32>MDMA channel 25 interrupt/status register
MDMA_C25IFCR: WORegister<u32>MDMA channel 25 interrupt flag clear register
MDMA_C25ESR: RORegister<u32>MDMA channel 25 error status register
MDMA_C25CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C25TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C25BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C25SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C25DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C25BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C25LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C25TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C25MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C25MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C26ISR: RORegister<u32>MDMA channel 26 interrupt/status register
MDMA_C26IFCR: WORegister<u32>MDMA channel 26 interrupt flag clear register
MDMA_C26ESR: RORegister<u32>MDMA channel 26 error status register
MDMA_C26CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C26TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C26BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C26SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C26DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C26BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C26LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C26TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C26MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C26MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C27ISR: RORegister<u32>MDMA channel 27 interrupt/status register
MDMA_C27IFCR: WORegister<u32>MDMA channel 27 interrupt flag clear register
MDMA_C27ESR: RORegister<u32>MDMA channel 27 error status register
MDMA_C27CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C27TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C27BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C27SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C27DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C27BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C27LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C27TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C27MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C27MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C28ISR: RORegister<u32>MDMA channel 28 interrupt/status register
MDMA_C28IFCR: WORegister<u32>MDMA channel 28 interrupt flag clear register
MDMA_C28ESR: RORegister<u32>MDMA channel 28 error status register
MDMA_C28CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C28TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C28BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C28SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C28DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C28BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C28LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C28TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C28MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C28MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C29ISR: RORegister<u32>MDMA channel 29 interrupt/status register
MDMA_C29IFCR: WORegister<u32>MDMA channel 29 interrupt flag clear register
MDMA_C29ESR: RORegister<u32>MDMA channel 29 error status register
MDMA_C29CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C29TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C29BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C29SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C29DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C29BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C29LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C29TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C29MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C29MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C30ISR: RORegister<u32>MDMA channel 30 interrupt/status register
MDMA_C30IFCR: WORegister<u32>MDMA channel 30 interrupt flag clear register
MDMA_C30ESR: RORegister<u32>MDMA channel 30 error status register
MDMA_C30CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C30TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C30BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C30SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C30DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C30BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C30LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C30TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C30MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C30MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).
MDMA_C31ISR: RORegister<u32>MDMA channel 31 interrupt/status register
MDMA_C31IFCR: WORegister<u32>MDMA channel 31 interrupt flag clear register
MDMA_C31ESR: RORegister<u32>MDMA channel 31 error status register
MDMA_C31CR: RWRegister<u32>This register is used to control the concerned channel.
MDMA_C31TCR: RWRegister<u32>This register is used to configure the concerned channel. In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x00).
MDMA_C31BNDTR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x04).
MDMA_C31SAR: RWRegister<u32>In Linked List mode, at the end of a Block (single or last Block in repeated Block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x08).
MDMA_C31DAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x0C). M
MDMA_C31BRUR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x10).
MDMA_C31LAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x14). The new value is only taken into account after all registers are updated, for the next end of block.
MDMA_C31TBR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x18).
MDMA_C31MAR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x20).
MDMA_C31MDR: RWRegister<u32>In Linked List mode, at the end of a block (single or last block in repeated block transfer mode), this register will be loaded from memory (from address given by current LAR[31:0] + 0x24).