Struct stm32ral::stm32mp::peripherals::gpioz::ResetValues[][src]

pub struct ResetValues {
Show 26 fields pub GPIOZ_MODER: u32, pub GPIOZ_OTYPER: u32, pub GPIOZ_OSPEEDR: u32, pub GPIOZ_PUPDR: u32, pub GPIOZ_IDR: u32, pub GPIOZ_ODR: u32, pub GPIOZ_BSRR: u32, pub GPIOZ_LCKR: u32, pub GPIOZ_AFRL: u32, pub GPIOZ_AFRH: u32, pub GPIOZ_BRR: u32, pub GPIOZ_SECCFGR: u32, pub GPIOZ_HWCFGR10: u32, pub GPIOZ_HWCFGR9: u32, pub GPIOZ_HWCFGR8: u32, pub GPIOZ_HWCFGR7: u32, pub GPIOZ_HWCFGR6: u32, pub GPIOZ_HWCFGR5: u32, pub GPIOZ_HWCFGR4: u32, pub GPIOZ_HWCFGR3: u32, pub GPIOZ_HWCFGR2: u32, pub GPIOZ_HWCFGR1: u32, pub GPIOZ_HWCFGR0: u32, pub GPIOZ_VERR: u32, pub GPIOZ_IPIDR: u32, pub GPIOZ_SIDR: u32,
}

Fields

GPIOZ_MODER: u32GPIOZ_OTYPER: u32GPIOZ_OSPEEDR: u32GPIOZ_PUPDR: u32GPIOZ_IDR: u32GPIOZ_ODR: u32GPIOZ_BSRR: u32GPIOZ_LCKR: u32GPIOZ_AFRL: u32GPIOZ_AFRH: u32GPIOZ_BRR: u32GPIOZ_SECCFGR: u32GPIOZ_HWCFGR10: u32GPIOZ_HWCFGR9: u32GPIOZ_HWCFGR8: u32GPIOZ_HWCFGR7: u32GPIOZ_HWCFGR6: u32GPIOZ_HWCFGR5: u32GPIOZ_HWCFGR4: u32GPIOZ_HWCFGR3: u32GPIOZ_HWCFGR2: u32GPIOZ_HWCFGR1: u32GPIOZ_HWCFGR0: u32GPIOZ_VERR: u32GPIOZ_IPIDR: u32GPIOZ_SIDR: u32

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