Struct stm32ral::stm32mp::peripherals::gich::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {
pub GICH_HCR: RWRegister<u32>,
pub GICH_VTR: RORegister<u32>,
pub GICH_VMCR: RWRegister<u32>,
pub GICH_MISR: RORegister<u32>,
pub GICH_EISR0: RORegister<u32>,
pub GICH_ELSR0: RORegister<u32>,
pub GICH_APR0: RWRegister<u32>,
pub GICH_LR0: RWRegister<u32>,
pub GICH_LR1: RWRegister<u32>,
pub GICH_LR2: RWRegister<u32>,
pub GICH_LR3: RWRegister<u32>,
// some fields omitted
}
Fields
GICH_HCR: RWRegister<u32>
GICH hypervisor control register
GICH_VTR: RORegister<u32>
GICH VGIC type register
GICH_VMCR: RWRegister<u32>
GICH virtual machine control register
GICH_MISR: RORegister<u32>
GICH maintenance interrupt status register
GICH_EISR0: RORegister<u32>
GICH end of interrupt status register
GICH_ELSR0: RORegister<u32>
GICH empty list status register
GICH_APR0: RWRegister<u32>
GICH active priority register
GICH_LR0: RWRegister<u32>
GICH list register 0
GICH_LR1: RWRegister<u32>
GICH list register 1
GICH_LR2: RWRegister<u32>
GICH list register 2
GICH_LR3: RWRegister<u32>
GICH list register 3