Struct stm32ral::stm32mp::peripherals::eth_mtl::ResetValues[][src]

pub struct ResetValues {
Show 25 fields pub ETH_MTLOMR: u32, pub ETH_MTLISR: u32, pub ETH_MTLTxQ0OMR: u32, pub ETH_MTLTxQ0UR: u32, pub ETH_MTLTxQ0DR: u32, pub ETH_MTLTxQ0ESR: u32, pub ETH_MTLQ0ICSR: u32, pub ETH_MTLRxQ0OMR: u32, pub ETH_MTLRxQ0MPOCR: u32, pub ETH_MTLRxQ0DR: u32, pub ETH_MTLRxQ0CR: u32, pub ETH_MTLTxQ1OMR: u32, pub ETH_MTLTxQ1UR: u32, pub ETH_MTLTxQ1DR: u32, pub ETH_MTLTxQ1ECR: u32, pub ETH_MTLTxQ1ESR: u32, pub ETH_MTLTxQ1QWR: u32, pub ETH_MTLTxQ1SSCR: u32, pub ETH_MTLTxQ1HCR: u32, pub ETH_MTLTxQ1LCR: u32, pub ETH_MTLQ1ICSR: u32, pub ETH_MTLRxQ1OMR: u32, pub ETH_MTLRxQ1MPOCR: u32, pub ETH_MTLRxQ1DR: u32, pub ETH_MTLRxQ1CR: u32,
}

Fields

ETH_MTLOMR: u32ETH_MTLISR: u32ETH_MTLTxQ0OMR: u32ETH_MTLTxQ0UR: u32ETH_MTLTxQ0DR: u32ETH_MTLTxQ0ESR: u32ETH_MTLQ0ICSR: u32ETH_MTLRxQ0OMR: u32ETH_MTLRxQ0MPOCR: u32ETH_MTLRxQ0DR: u32ETH_MTLRxQ0CR: u32ETH_MTLTxQ1OMR: u32ETH_MTLTxQ1UR: u32ETH_MTLTxQ1DR: u32ETH_MTLTxQ1ECR: u32ETH_MTLTxQ1ESR: u32ETH_MTLTxQ1QWR: u32ETH_MTLTxQ1SSCR: u32ETH_MTLTxQ1HCR: u32ETH_MTLTxQ1LCR: u32ETH_MTLQ1ICSR: u32ETH_MTLRxQ1OMR: u32ETH_MTLRxQ1MPOCR: u32ETH_MTLRxQ1DR: u32ETH_MTLRxQ1CR: u32

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