Struct stm32ral::stm32mp::peripherals::dma::RegisterBlock[−][src]

#[repr(C)]
pub struct RegisterBlock {Show 57 fields
    pub DMA_LISR: RORegister<u32>,
    pub DMA_HISR: RORegister<u32>,
    pub DMA_LIFCR: WORegister<u32>,
    pub DMA_HIFCR: WORegister<u32>,
    pub DMA_S0CR: RWRegister<u32>,
    pub DMA_S0NDTR: RWRegister<u32>,
    pub DMA_S0PAR: RWRegister<u32>,
    pub DMA_S0M0AR: RWRegister<u32>,
    pub DMA_S0M1AR: RWRegister<u32>,
    pub DMA_S0FCR: RWRegister<u32>,
    pub DMA_S1CR: RWRegister<u32>,
    pub DMA_S1NDTR: RWRegister<u32>,
    pub DMA_S1PAR: RWRegister<u32>,
    pub DMA_S1M0AR: RWRegister<u32>,
    pub DMA_S1M1AR: RWRegister<u32>,
    pub DMA_S1FCR: RWRegister<u32>,
    pub DMA_S2CR: RWRegister<u32>,
    pub DMA_S2NDTR: RWRegister<u32>,
    pub DMA_S2PAR: RWRegister<u32>,
    pub DMA_S2M0AR: RWRegister<u32>,
    pub DMA_S2M1AR: RWRegister<u32>,
    pub DMA_S2FCR: RWRegister<u32>,
    pub DMA_S3CR: RWRegister<u32>,
    pub DMA_S3NDTR: RWRegister<u32>,
    pub DMA_S3PAR: RWRegister<u32>,
    pub DMA_S3M0AR: RWRegister<u32>,
    pub DMA_S3M1AR: RWRegister<u32>,
    pub DMA_S3FCR: RWRegister<u32>,
    pub DMA_S4CR: RWRegister<u32>,
    pub DMA_S4NDTR: RWRegister<u32>,
    pub DMA_S4PAR: RWRegister<u32>,
    pub DMA_S4M0AR: RWRegister<u32>,
    pub DMA_S4M1AR: RWRegister<u32>,
    pub DMA_S4FCR: RWRegister<u32>,
    pub DMA_S5CR: RWRegister<u32>,
    pub DMA_S5NDTR: RWRegister<u32>,
    pub DMA_S5PAR: RWRegister<u32>,
    pub DMA_S5M0AR: RWRegister<u32>,
    pub DMA_S5M1AR: RWRegister<u32>,
    pub DMA_S5FCR: RWRegister<u32>,
    pub DMA_S6CR: RWRegister<u32>,
    pub DMA_S6NDTR: RWRegister<u32>,
    pub DMA_S6PAR: RWRegister<u32>,
    pub DMA_S6M0AR: RWRegister<u32>,
    pub DMA_S6M1AR: RWRegister<u32>,
    pub DMA_S6FCR: RWRegister<u32>,
    pub DMA_S7CR: RWRegister<u32>,
    pub DMA_S7NDTR: RWRegister<u32>,
    pub DMA_S7PAR: RWRegister<u32>,
    pub DMA_S7M0AR: RWRegister<u32>,
    pub DMA_S7M1AR: RWRegister<u32>,
    pub DMA_S7FCR: RWRegister<u32>,
    pub DMA_HWCFGR2: RORegister<u32>,
    pub DMA_HWCFGR1: RORegister<u32>,
    pub DMA_VERR: RORegister<u32>,
    pub DMA_IPDR: RORegister<u32>,
    pub DMA_SIDR: RORegister<u32>,
    // some fields omitted
}

Fields

DMA_LISR: RORegister<u32>

DMA low interrupt status register

DMA_HISR: RORegister<u32>

DMA high interrupt status register

DMA_LIFCR: WORegister<u32>

DMA low interrupt flag clear register

DMA_HIFCR: WORegister<u32>

DMA high interrupt flag clear register

DMA_S0CR: RWRegister<u32>

This register is used to configure the concerned stream.

DMA_S0NDTR: RWRegister<u32>

DMA stream 0 number of data register

DMA_S0PAR: RWRegister<u32>

DMA stream 0 peripheral address register

DMA_S0M0AR: RWRegister<u32>

DMA stream 0 memory 0 address register

DMA_S0M1AR: RWRegister<u32>

DMA stream 0 memory 1 address register

DMA_S0FCR: RWRegister<u32>

DMA stream 0 FIFO control register

DMA_S1CR: RWRegister<u32>

This register is used to configure the concerned stream.

DMA_S1NDTR: RWRegister<u32>

DMA stream 1 number of data register

DMA_S1PAR: RWRegister<u32>

DMA stream 1 peripheral address register

DMA_S1M0AR: RWRegister<u32>

DMA stream 1 memory 0 address register

DMA_S1M1AR: RWRegister<u32>

DMA stream 1 memory 1 address register

DMA_S1FCR: RWRegister<u32>

DMA stream 1 FIFO control register

DMA_S2CR: RWRegister<u32>

This register is used to configure the concerned stream.

DMA_S2NDTR: RWRegister<u32>

DMA stream 2 number of data register

DMA_S2PAR: RWRegister<u32>

DMA stream 2 peripheral address register

DMA_S2M0AR: RWRegister<u32>

DMA stream 2 memory 0 address register

DMA_S2M1AR: RWRegister<u32>

DMA stream 2 memory 1 address register

DMA_S2FCR: RWRegister<u32>

DMA stream 2 FIFO control register

DMA_S3CR: RWRegister<u32>

This register is used to configure the concerned stream.

DMA_S3NDTR: RWRegister<u32>

DMA stream 3 number of data register

DMA_S3PAR: RWRegister<u32>

DMA stream 3 peripheral address register

DMA_S3M0AR: RWRegister<u32>

DMA stream 3 memory 0 address register

DMA_S3M1AR: RWRegister<u32>

DMA stream 3 memory 1 address register

DMA_S3FCR: RWRegister<u32>

DMA stream 3 FIFO control register

DMA_S4CR: RWRegister<u32>

This register is used to configure the concerned stream.

DMA_S4NDTR: RWRegister<u32>

DMA stream 4 number of data register

DMA_S4PAR: RWRegister<u32>

DMA stream 4 peripheral address register

DMA_S4M0AR: RWRegister<u32>

DMA stream 4 memory 0 address register

DMA_S4M1AR: RWRegister<u32>

DMA stream 4 memory 1 address register

DMA_S4FCR: RWRegister<u32>

DMA stream 4 FIFO control register

DMA_S5CR: RWRegister<u32>

This register is used to configure the concerned stream.

DMA_S5NDTR: RWRegister<u32>

DMA stream 5 number of data register

DMA_S5PAR: RWRegister<u32>

DMA stream 5 peripheral address register

DMA_S5M0AR: RWRegister<u32>

DMA stream 5 memory 0 address register

DMA_S5M1AR: RWRegister<u32>

DMA stream 5 memory 1 address register

DMA_S5FCR: RWRegister<u32>

DMA stream 5 FIFO control register

DMA_S6CR: RWRegister<u32>

This register is used to configure the concerned stream.

DMA_S6NDTR: RWRegister<u32>

DMA stream 6 number of data register

DMA_S6PAR: RWRegister<u32>

DMA stream 6 peripheral address register

DMA_S6M0AR: RWRegister<u32>

DMA stream 6 memory 0 address register

DMA_S6M1AR: RWRegister<u32>

DMA stream 6 memory 1 address register

DMA_S6FCR: RWRegister<u32>

DMA stream 6 FIFO control register

DMA_S7CR: RWRegister<u32>

This register is used to configure the concerned stream.

DMA_S7NDTR: RWRegister<u32>

DMA stream 7 number of data register

DMA_S7PAR: RWRegister<u32>

DMA stream 7 peripheral address register

DMA_S7M0AR: RWRegister<u32>

DMA stream 7 memory 0 address register

DMA_S7M1AR: RWRegister<u32>

DMA stream 7 memory 1 address register

DMA_S7FCR: RWRegister<u32>

DMA stream 7 FIFO control register

DMA_HWCFGR2: RORegister<u32>

DMA hardware configuration 2register

DMA_HWCFGR1: RORegister<u32>

DMA hardware configuration 1 register

DMA_VERR: RORegister<u32>

This register identifies the version of the IP.

DMA_IPDR: RORegister<u32>

DMA IP identification register

DMA_SIDR: RORegister<u32>

DMA size identification register

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

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impl<T> Any for T where
T: 'static + ?Sized,

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pub fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

[src]

impl<T> Borrow<T> for T where
T: ?Sized,

[src]

pub fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

[src]

impl<T> BorrowMut<T> for T where
T: ?Sized,

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pub fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

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impl<T> From<T> for T

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pub fn from(t: T) -> T

Performs the conversion.

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impl<T, U> Into for T where
U: From<T>,

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pub fn into(self) -> U

Performs the conversion.

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impl<T, U> TryFrom for T where
U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

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pub fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

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impl<T, U> TryInto for T where
U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.

[src]

pub fn try_into(self) -> Result<U, >::Error>

Performs the conversion.

Struct stm32ral::stm32mp::peripherals::dma::RegisterBlock[−][src]

Fields

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for T where
T: 'static + ?Sized,

pub fn type_id(&self) -> TypeId

impl<T> Borrow<T> for T where
T: ?Sized,

pub fn borrow(&self) -> &T

impl<T> BorrowMut<T> for T where
T: ?Sized,

pub fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

pub fn from(t: T) -> T

impl<T, U> Into<U> for T where
U: From<T>,

pub fn into(self) -> U

impl<T, U> TryFrom<U> for T where
U: Into<T>,

type Error = Infallible

pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for T where
U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Struct stm32ral::stm32mp::peripherals::dma::RegisterBlock[−][src]

Fields

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for T where T: 'static + ?Sized,

pub fn type_id(&self) -> TypeId

impl<T> Borrow<T> for T where T: ?Sized,

pub fn borrow(&self) -> &T

impl<T> BorrowMut<T> for T where T: ?Sized,

pub fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

pub fn from(t: T) -> T

impl<T, U> Into<U> for T where U: From<T>,

pub fn into(self) -> U

impl<T, U> TryFrom<U> for T where U: Into<T>,

type Error = Infallible

pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for T where U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

impl<T> Any for T where
T: 'static + ?Sized,

impl<T> Borrow<T> for T where
T: ?Sized,

impl<T> BorrowMut<T> for T where
T: ?Sized,

impl<T, U> Into<U> for T where
U: From<T>,

impl<T, U> TryFrom<U> for T where
U: Into<T>,

impl<T, U> TryInto<U> for T where
U: TryFrom<T>,