Struct stm32ral::stm32mp::peripherals::dfsdm1::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 142 fields
pub DFSDM_CH0CFGR1: RWRegister<u32>,
pub DFSDM_CH0CFGR2: RWRegister<u32>,
pub DFSDM_CH0AWSCDR: RWRegister<u32>,
pub DFSDM_CH0WDATR: RORegister<u32>,
pub DFSDM_CH0DATINR: RWRegister<u32>,
pub DFSDM_CH0DLYR: RWRegister<u32>,
pub DFSDM_CH1CFGR1: RWRegister<u32>,
pub DFSDM_CH1CFGR2: RWRegister<u32>,
pub DFSDM_CH1AWSCDR: RWRegister<u32>,
pub DFSDM_CH1WDATR: RORegister<u32>,
pub DFSDM_CH1DATINR: RWRegister<u32>,
pub DFSDM_CH1DLYR: RWRegister<u32>,
pub DFSDM_CH2CFGR1: RWRegister<u32>,
pub DFSDM_CH2CFGR2: RWRegister<u32>,
pub DFSDM_CH2AWSCDR: RWRegister<u32>,
pub DFSDM_CH2WDATR: RORegister<u32>,
pub DFSDM_CH2DATINR: RWRegister<u32>,
pub DFSDM_CH2DLYR: RWRegister<u32>,
pub DFSDM_CH3CFGR1: RWRegister<u32>,
pub DFSDM_CH3CFGR2: RWRegister<u32>,
pub DFSDM_CH3AWSCDR: RWRegister<u32>,
pub DFSDM_CH3WDATR: RORegister<u32>,
pub DFSDM_CH3DATINR: RWRegister<u32>,
pub DFSDM_CH3DLYR: RWRegister<u32>,
pub DFSDM_CH4CFGR1: RWRegister<u32>,
pub DFSDM_CH4CFGR2: RWRegister<u32>,
pub DFSDM_CH4AWSCDR: RWRegister<u32>,
pub DFSDM_CH4WDATR: RORegister<u32>,
pub DFSDM_CH4DATINR: RWRegister<u32>,
pub DFSDM_CH4DLYR: RWRegister<u32>,
pub DFSDM_CH5CFGR1: RWRegister<u32>,
pub DFSDM_CH5CFGR2: RWRegister<u32>,
pub DFSDM_CH5AWSCDR: RWRegister<u32>,
pub DFSDM_CH5WDATR: RORegister<u32>,
pub DFSDM_CH5DATINR: RWRegister<u32>,
pub DFSDM_CH5DLYR: RWRegister<u32>,
pub DFSDM_CH6CFGR1: RWRegister<u32>,
pub DFSDM_CH6CFGR2: RWRegister<u32>,
pub DFSDM_CH6AWSCDR: RWRegister<u32>,
pub DFSDM_CH6WDATR: RORegister<u32>,
pub DFSDM_CH6DATINR: RWRegister<u32>,
pub DFSDM_CH6DLYR: RWRegister<u32>,
pub DFSDM_CH7CFGR1: RWRegister<u32>,
pub DFSDM_CH7CFGR2: RWRegister<u32>,
pub DFSDM_CH7AWSCDR: RWRegister<u32>,
pub DFSDM_CH7WDATR: RORegister<u32>,
pub DFSDM_CH7DATINR: RWRegister<u32>,
pub DFSDM_CH7DLYR: RWRegister<u32>,
pub DFSDM_FLT0CR1: RWRegister<u32>,
pub DFSDM_FLT0CR2: RWRegister<u32>,
pub DFSDM_FLT0ISR: RORegister<u32>,
pub DFSDM_FLT0ICR: RWRegister<u32>,
pub DFSDM_FLT0JCHGR: RWRegister<u32>,
pub DFSDM_FLT0FCR: RWRegister<u32>,
pub DFSDM_FLT0JDATAR: RORegister<u32>,
pub DFSDM_FLT0RDATAR: RORegister<u32>,
pub DFSDM_FLT0AWHTR: RWRegister<u32>,
pub DFSDM_FLT0AWLTR: RWRegister<u32>,
pub DFSDM_FLT0AWSR: RORegister<u32>,
pub DFSDM_FLT0AWCFR: RWRegister<u32>,
pub DFSDM_FLT0EXMAX: RORegister<u32>,
pub DFSDM_FLT0EXMIN: RWRegister<u32>,
pub DFSDM_FLT0CNVTIMR: RORegister<u32>,
pub DFSDM_FLT1CR1: RWRegister<u32>,
pub DFSDM_FLT1CR2: RWRegister<u32>,
pub DFSDM_FLT1ISR: RORegister<u32>,
pub DFSDM_FLT1ICR: RWRegister<u32>,
pub DFSDM_FLT1JCHGR: RWRegister<u32>,
pub DFSDM_FLT1FCR: RWRegister<u32>,
pub DFSDM_FLT1JDATAR: RORegister<u32>,
pub DFSDM_FLT1RDATAR: RORegister<u32>,
pub DFSDM_FLT1AWHTR: RWRegister<u32>,
pub DFSDM_FLT1AWLTR: RWRegister<u32>,
pub DFSDM_FLT1AWSR: RORegister<u32>,
pub DFSDM_FLT1AWCFR: RWRegister<u32>,
pub DFSDM_FLT1EXMAX: RORegister<u32>,
pub DFSDM_FLT1EXMIN: RWRegister<u32>,
pub DFSDM_FLT1CNVTIMR: RORegister<u32>,
pub DFSDM_FLT2CR1: RWRegister<u32>,
pub DFSDM_FLT2CR2: RWRegister<u32>,
pub DFSDM_FLT2ISR: RORegister<u32>,
pub DFSDM_FLT2ICR: RWRegister<u32>,
pub DFSDM_FLT2JCHGR: RWRegister<u32>,
pub DFSDM_FLT2FCR: RWRegister<u32>,
pub DFSDM_FLT2JDATAR: RORegister<u32>,
pub DFSDM_FLT2RDATAR: RORegister<u32>,
pub DFSDM_FLT2AWHTR: RWRegister<u32>,
pub DFSDM_FLT2AWLTR: RWRegister<u32>,
pub DFSDM_FLT2AWSR: RORegister<u32>,
pub DFSDM_FLT2AWCFR: RWRegister<u32>,
pub DFSDM_FLT2EXMAX: RORegister<u32>,
pub DFSDM_FLT2EXMIN: RWRegister<u32>,
pub DFSDM_FLT2CNVTIMR: RORegister<u32>,
pub DFSDM_FLT3CR1: RWRegister<u32>,
pub DFSDM_FLT3CR2: RWRegister<u32>,
pub DFSDM_FLT3ISR: RORegister<u32>,
pub DFSDM_FLT3ICR: RWRegister<u32>,
pub DFSDM_FLT3JCHGR: RWRegister<u32>,
pub DFSDM_FLT3FCR: RWRegister<u32>,
pub DFSDM_FLT3JDATAR: RORegister<u32>,
pub DFSDM_FLT3RDATAR: RORegister<u32>,
pub DFSDM_FLT3AWHTR: RWRegister<u32>,
pub DFSDM_FLT3AWLTR: RWRegister<u32>,
pub DFSDM_FLT3AWSR: RORegister<u32>,
pub DFSDM_FLT3AWCFR: RWRegister<u32>,
pub DFSDM_FLT3EXMAX: RORegister<u32>,
pub DFSDM_FLT3EXMIN: RWRegister<u32>,
pub DFSDM_FLT3CNVTIMR: RORegister<u32>,
pub DFSDM_FLT4CR1: RWRegister<u32>,
pub DFSDM_FLT4CR2: RWRegister<u32>,
pub DFSDM_FLT4ISR: RORegister<u32>,
pub DFSDM_FLT4ICR: RWRegister<u32>,
pub DFSDM_FLT4JCHGR: RWRegister<u32>,
pub DFSDM_FLT4FCR: RWRegister<u32>,
pub DFSDM_FLT4JDATAR: RORegister<u32>,
pub DFSDM_FLT4RDATAR: RORegister<u32>,
pub DFSDM_FLT4AWHTR: RWRegister<u32>,
pub DFSDM_FLT4AWLTR: RWRegister<u32>,
pub DFSDM_FLT4AWSR: RORegister<u32>,
pub DFSDM_FLT4AWCFR: RWRegister<u32>,
pub DFSDM_FLT4EXMAX: RORegister<u32>,
pub DFSDM_FLT4EXMIN: RWRegister<u32>,
pub DFSDM_FLT4CNVTIMR: RORegister<u32>,
pub DFSDM_FLT5CR1: RWRegister<u32>,
pub DFSDM_FLT5CR2: RWRegister<u32>,
pub DFSDM_FLT5ISR: RORegister<u32>,
pub DFSDM_FLT5ICR: RWRegister<u32>,
pub DFSDM_FLT5JCHGR: RWRegister<u32>,
pub DFSDM_FLT5FCR: RWRegister<u32>,
pub DFSDM_FLT5JDATAR: RORegister<u32>,
pub DFSDM_FLT5RDATAR: RORegister<u32>,
pub DFSDM_FLT5AWHTR: RWRegister<u32>,
pub DFSDM_FLT5AWLTR: RWRegister<u32>,
pub DFSDM_FLT5AWSR: RORegister<u32>,
pub DFSDM_FLT5AWCFR: RWRegister<u32>,
pub DFSDM_FLT5EXMAX: RORegister<u32>,
pub DFSDM_FLT5EXMIN: RWRegister<u32>,
pub DFSDM_FLT5CNVTIMR: RORegister<u32>,
pub DFSDM_HWCFGR: RORegister<u32>,
pub DFSDM_VERR: RORegister<u32>,
pub DFSDM_IPIDR: RORegister<u32>,
pub DFSDM_SIDR: RORegister<u32>,
// some fields omitted
}Fields
DFSDM_CH0CFGR1: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH0CFGR2: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH0AWSCDR: RWRegister<u32>Short-circuit detector and analog watchdog settings for channel y.
DFSDM_CH0WDATR: RORegister<u32>This register contains the data resulting from the analog watchdog filter associated to the input channel y.
DFSDM_CH0DATINR: RWRegister<u32>This register contains 16-bit input data to be processed by DFSDM filter module.
DFSDM_CH0DLYR: RWRegister<u32>DFSDM channel 0 delay register
DFSDM_CH1CFGR1: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH1CFGR2: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH1AWSCDR: RWRegister<u32>Short-circuit detector and analog watchdog settings for channel y.
DFSDM_CH1WDATR: RORegister<u32>This register contains the data resulting from the analog watchdog filter associated to the input channel y.
DFSDM_CH1DATINR: RWRegister<u32>This register contains 16-bit input data to be processed by DFSDM filter module.
DFSDM_CH1DLYR: RWRegister<u32>DFSDM channel 1 delay register
DFSDM_CH2CFGR1: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH2CFGR2: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH2AWSCDR: RWRegister<u32>Short-circuit detector and analog watchdog settings for channel y.
DFSDM_CH2WDATR: RORegister<u32>This register contains the data resulting from the analog watchdog filter associated to the input channel y.
DFSDM_CH2DATINR: RWRegister<u32>This register contains 16-bit input data to be processed by DFSDM filter module.
DFSDM_CH2DLYR: RWRegister<u32>DFSDM channel 2 delay register
DFSDM_CH3CFGR1: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH3CFGR2: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH3AWSCDR: RWRegister<u32>Short-circuit detector and analog watchdog settings for channel y.
DFSDM_CH3WDATR: RORegister<u32>This register contains the data resulting from the analog watchdog filter associated to the input channel y.
DFSDM_CH3DATINR: RWRegister<u32>This register contains 16-bit input data to be processed by DFSDM filter module.
DFSDM_CH3DLYR: RWRegister<u32>DFSDM channel 3 delay register
DFSDM_CH4CFGR1: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH4CFGR2: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH4AWSCDR: RWRegister<u32>Short-circuit detector and analog watchdog settings for channel y.
DFSDM_CH4WDATR: RORegister<u32>This register contains the data resulting from the analog watchdog filter associated to the input channel y.
DFSDM_CH4DATINR: RWRegister<u32>This register contains 16-bit input data to be processed by DFSDM filter module.
DFSDM_CH4DLYR: RWRegister<u32>DFSDM channel 4 delay register
DFSDM_CH5CFGR1: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH5CFGR2: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH5AWSCDR: RWRegister<u32>Short-circuit detector and analog watchdog settings for channel y.
DFSDM_CH5WDATR: RORegister<u32>This register contains the data resulting from the analog watchdog filter associated to the input channel y.
DFSDM_CH5DATINR: RWRegister<u32>This register contains 16-bit input data to be processed by DFSDM filter module.
DFSDM_CH5DLYR: RWRegister<u32>DFSDM channel 5 delay register
DFSDM_CH6CFGR1: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH6CFGR2: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH6AWSCDR: RWRegister<u32>Short-circuit detector and analog watchdog settings for channel y.
DFSDM_CH6WDATR: RORegister<u32>This register contains the data resulting from the analog watchdog filter associated to the input channel y.
DFSDM_CH6DATINR: RWRegister<u32>This register contains 16-bit input data to be processed by DFSDM filter module.
DFSDM_CH6DLYR: RWRegister<u32>DFSDM channel 6 delay register
DFSDM_CH7CFGR1: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH7CFGR2: RWRegister<u32>This register specifies the parameters used by channel y.
DFSDM_CH7AWSCDR: RWRegister<u32>Short-circuit detector and analog watchdog settings for channel y.
DFSDM_CH7WDATR: RORegister<u32>This register contains the data resulting from the analog watchdog filter associated to the input channel y.
DFSDM_CH7DATINR: RWRegister<u32>This register contains 16-bit input data to be processed by DFSDM filter module.
DFSDM_CH7DLYR: RWRegister<u32>DFSDM channel 7 delay register
DFSDM_FLT0CR1: RWRegister<u32>DFSDM filter 0 control register 1
DFSDM_FLT0CR2: RWRegister<u32>DFSDM filter 0 control register 2
DFSDM_FLT0ISR: RORegister<u32>DFSDM filter 0 interrupt and status register
DFSDM_FLT0ICR: RWRegister<u32>DFSDM filter 0 interrupt flag clear register
DFSDM_FLT0JCHGR: RWRegister<u32>DFSDM filter 0 injected channel group selection register
DFSDM_FLT0FCR: RWRegister<u32>DFSDM filter 0 control register
DFSDM_FLT0JDATAR: RORegister<u32>DFSDM filter 0 data register for injected group
DFSDM_FLT0RDATAR: RORegister<u32>DFSDM filter 0 data register for the regular channel
DFSDM_FLT0AWHTR: RWRegister<u32>DFSDM filter 0 analog watchdog high threshold register
DFSDM_FLT0AWLTR: RWRegister<u32>DFSDM filter 0 analog watchdog low threshold register
DFSDM_FLT0AWSR: RORegister<u32>DFSDM filter 0 analog watchdog status register
DFSDM_FLT0AWCFR: RWRegister<u32>DFSDM filter 0 analog watchdog clear flag register
DFSDM_FLT0EXMAX: RORegister<u32>DFSDM filter 0 extremes detector maximum register
DFSDM_FLT0EXMIN: RWRegister<u32>DFSDM filter 0 extremes detector minimum register
DFSDM_FLT0CNVTIMR: RORegister<u32>DFSDM filter 0 conversion timer register
DFSDM_FLT1CR1: RWRegister<u32>DFSDM filter 1 control register 1
DFSDM_FLT1CR2: RWRegister<u32>DFSDM filter 1 control register 2
DFSDM_FLT1ISR: RORegister<u32>DFSDM filter 1 interrupt and status register
DFSDM_FLT1ICR: RWRegister<u32>DFSDM filter 1 interrupt flag clear register
DFSDM_FLT1JCHGR: RWRegister<u32>DFSDM filter 1 injected channel group selection register
DFSDM_FLT1FCR: RWRegister<u32>DFSDM filter 1 control register
DFSDM_FLT1JDATAR: RORegister<u32>DFSDM filter 1 data register for injected group
DFSDM_FLT1RDATAR: RORegister<u32>DFSDM filter 1 data register for the regular channel
DFSDM_FLT1AWHTR: RWRegister<u32>DFSDM filter 1 analog watchdog high threshold register
DFSDM_FLT1AWLTR: RWRegister<u32>DFSDM filter 1 analog watchdog low threshold register
DFSDM_FLT1AWSR: RORegister<u32>DFSDM filter 1 analog watchdog status register
DFSDM_FLT1AWCFR: RWRegister<u32>DFSDM filter 1 analog watchdog clear flag register
DFSDM_FLT1EXMAX: RORegister<u32>DFSDM filter 1 extremes detector maximum register
DFSDM_FLT1EXMIN: RWRegister<u32>DFSDM filter 1 extremes detector minimum register
DFSDM_FLT1CNVTIMR: RORegister<u32>DFSDM filter 1 conversion timer register
DFSDM_FLT2CR1: RWRegister<u32>DFSDM filter 2 control register 1
DFSDM_FLT2CR2: RWRegister<u32>DFSDM filter 2 control register 2
DFSDM_FLT2ISR: RORegister<u32>DFSDM filter 2 interrupt and status register
DFSDM_FLT2ICR: RWRegister<u32>DFSDM filter 2 interrupt flag clear register
DFSDM_FLT2JCHGR: RWRegister<u32>DFSDM filter 2 injected channel group selection register
DFSDM_FLT2FCR: RWRegister<u32>DFSDM filter 2 control register
DFSDM_FLT2JDATAR: RORegister<u32>DFSDM filter 2 data register for injected group
DFSDM_FLT2RDATAR: RORegister<u32>DFSDM filter 2 data register for the regular channel
DFSDM_FLT2AWHTR: RWRegister<u32>DFSDM filter 2 analog watchdog high threshold register
DFSDM_FLT2AWLTR: RWRegister<u32>DFSDM filter 2 analog watchdog low threshold register
DFSDM_FLT2AWSR: RORegister<u32>DFSDM filter 2 analog watchdog status register
DFSDM_FLT2AWCFR: RWRegister<u32>DFSDM filter 2 analog watchdog clear flag register
DFSDM_FLT2EXMAX: RORegister<u32>DFSDM filter 2 extremes detector maximum register
DFSDM_FLT2EXMIN: RWRegister<u32>DFSDM filter 2 extremes detector minimum register
DFSDM_FLT2CNVTIMR: RORegister<u32>DFSDM filter 2 conversion timer register
DFSDM_FLT3CR1: RWRegister<u32>DFSDM filter 3 control register 1
DFSDM_FLT3CR2: RWRegister<u32>DFSDM filter 3 control register 2
DFSDM_FLT3ISR: RORegister<u32>DFSDM filter 3 interrupt and status register
DFSDM_FLT3ICR: RWRegister<u32>DFSDM filter 3 interrupt flag clear register
DFSDM_FLT3JCHGR: RWRegister<u32>DFSDM filter 3 injected channel group selection register
DFSDM_FLT3FCR: RWRegister<u32>DFSDM filter 3 control register
DFSDM_FLT3JDATAR: RORegister<u32>DFSDM filter 3 data register for injected group
DFSDM_FLT3RDATAR: RORegister<u32>DFSDM filter 3 data register for the regular channel
DFSDM_FLT3AWHTR: RWRegister<u32>DFSDM filter 3 analog watchdog high threshold register
DFSDM_FLT3AWLTR: RWRegister<u32>DFSDM filter 3 analog watchdog low threshold register
DFSDM_FLT3AWSR: RORegister<u32>DFSDM filter 3 analog watchdog status register
DFSDM_FLT3AWCFR: RWRegister<u32>DFSDM filter 3 analog watchdog clear flag register
DFSDM_FLT3EXMAX: RORegister<u32>DFSDM filter 3 extremes detector maximum register
DFSDM_FLT3EXMIN: RWRegister<u32>DFSDM filter 3 extremes detector minimum register
DFSDM_FLT3CNVTIMR: RORegister<u32>DFSDM filter 3 conversion timer register
DFSDM_FLT4CR1: RWRegister<u32>DFSDM filter 4 control register 1
DFSDM_FLT4CR2: RWRegister<u32>DFSDM filter 4 control register 2
DFSDM_FLT4ISR: RORegister<u32>DFSDM filter 4 interrupt and status register
DFSDM_FLT4ICR: RWRegister<u32>DFSDM filter 4 interrupt flag clear register
DFSDM_FLT4JCHGR: RWRegister<u32>DFSDM filter 4 injected channel group selection register
DFSDM_FLT4FCR: RWRegister<u32>DFSDM filter 4 control register
DFSDM_FLT4JDATAR: RORegister<u32>DFSDM filter 4 data register for injected group
DFSDM_FLT4RDATAR: RORegister<u32>DFSDM filter 4 data register for the regular channel
DFSDM_FLT4AWHTR: RWRegister<u32>DFSDM filter 4 analog watchdog high threshold register
DFSDM_FLT4AWLTR: RWRegister<u32>DFSDM filter 4 analog watchdog low threshold register
DFSDM_FLT4AWSR: RORegister<u32>DFSDM filter 4 analog watchdog status register
DFSDM_FLT4AWCFR: RWRegister<u32>DFSDM filter 4 analog watchdog clear flag register
DFSDM_FLT4EXMAX: RORegister<u32>DFSDM filter 4 extremes detector maximum register
DFSDM_FLT4EXMIN: RWRegister<u32>DFSDM filter 4 extremes detector minimum register
DFSDM_FLT4CNVTIMR: RORegister<u32>DFSDM filter 4 conversion timer register
DFSDM_FLT5CR1: RWRegister<u32>DFSDM filter 5 control register 1
DFSDM_FLT5CR2: RWRegister<u32>DFSDM filter 5 control register 2
DFSDM_FLT5ISR: RORegister<u32>DFSDM filter 5 interrupt and status register
DFSDM_FLT5ICR: RWRegister<u32>DFSDM filter 5 interrupt flag clear register
DFSDM_FLT5JCHGR: RWRegister<u32>DFSDM filter 5 injected channel group selection register
DFSDM_FLT5FCR: RWRegister<u32>DFSDM filter 5 control register
DFSDM_FLT5JDATAR: RORegister<u32>DFSDM filter 5 data register for injected group
DFSDM_FLT5RDATAR: RORegister<u32>DFSDM filter 5 data register for the regular channel
DFSDM_FLT5AWHTR: RWRegister<u32>DFSDM filter 5 analog watchdog high threshold register
DFSDM_FLT5AWLTR: RWRegister<u32>DFSDM filter 5 analog watchdog low threshold register
DFSDM_FLT5AWSR: RORegister<u32>DFSDM filter 5 analog watchdog status register
DFSDM_FLT5AWCFR: RWRegister<u32>DFSDM filter 5 analog watchdog clear flag register
DFSDM_FLT5EXMAX: RORegister<u32>DFSDM filter 5 extremes detector maximum register
DFSDM_FLT5EXMIN: RWRegister<u32>DFSDM filter 5 extremes detector minimum register
DFSDM_FLT5CNVTIMR: RORegister<u32>DFSDM filter 5 conversion timer register
DFSDM_HWCFGR: RORegister<u32>This register specifies the hardware configuration of DFSDM peripheral.
DFSDM_VERR: RORegister<u32>This register specifies the version of DFSDM peripheral.
DFSDM_IPIDR: RORegister<u32>This register specifies the identification of DFSDM peripheral.
DFSDM_SIDR: RORegister<u32>This register specifies the size allocated to DFSDM registers.