Struct stm32ral::stm32mp::peripherals::dcmi::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub DCMI_CR: RWRegister<u32>,
    pub DCMI_SR: RORegister<u32>,
    pub DCMI_RIS: RORegister<u32>,
    pub DCMI_IER: RWRegister<u32>,
    pub DCMI_MIS: RORegister<u32>,
    pub DCMI_ICR: WORegister<u32>,
    pub DCMI_ESCR: RWRegister<u32>,
    pub DCMI_ESUR: RWRegister<u32>,
    pub DCMI_CWSTRT: RWRegister<u32>,
    pub DCMI_CWSIZE: RWRegister<u32>,
    pub DCMI_DR: RORegister<u32>,
}

Fields

DCMI_CR: RWRegister<u32>

DCMI control register

DCMI_SR: RORegister<u32>

DCMI status register

DCMI_RIS: RORegister<u32>

DCMI_RIS gives the raw interrupt status and is accessible in read only. When read, this register returns the status of the corresponding interrupt before masking with the DCMI_IER register value.

DCMI_IER: RWRegister<u32>

The DCMI_IER register is used to enable interrupts. When one of the DCMI_IER bits is set, the corresponding interrupt is enabled. This register is accessible in both read and write.

DCMI_MIS: RORegister<u32>

This DCMI_MIS register is a read-only register. When read, it returns the current masked status value (depending on the value in DCMI_IER) of the corresponding interrupt. A bit in this register is set if the corresponding enable bit in DCMI_IER is set and the corresponding bit in DCMI_RIS is set.

DCMI_ICR: WORegister<u32>

The DCMI_ICR register is write-only.

DCMI_ESCR: RWRegister<u32>

DCMI embedded synchronization code register

DCMI_ESUR: RWRegister<u32>

DCMI embedded synchronization unmask register

DCMI_CWSTRT: RWRegister<u32>

DCMI crop window start

DCMI_CWSIZE: RWRegister<u32>

DCMI crop window size

DCMI_DR: RORegister<u32>

DCMI data register