Struct stm32ral::stm32l5::peripherals::rtc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 23 fields
pub TR: RWRegister<u32>,
pub DR: RWRegister<u32>,
pub SSR: RORegister<u32>,
pub ICSR: RWRegister<u32>,
pub PRER: RWRegister<u32>,
pub WUTR: RWRegister<u32>,
pub CR: RWRegister<u32>,
pub PRIVCR: RWRegister<u32>,
pub SMCR: RWRegister<u32>,
pub WPR: WORegister<u32>,
pub CALR: RWRegister<u32>,
pub SHIFTR: WORegister<u32>,
pub TSTR: RORegister<u32>,
pub TSDR: RORegister<u32>,
pub TSSSR: RORegister<u32>,
pub ALRMAR: RWRegister<u32>,
pub ALRMASSR: RWRegister<u32>,
pub ALRMBR: RWRegister<u32>,
pub ALRMBSSR: RWRegister<u32>,
pub SR: RORegister<u32>,
pub MISR: RORegister<u32>,
pub SMISR: RORegister<u32>,
pub SCR: WORegister<u32>,
// some fields omitted
}
Fields
TR: RWRegister<u32>
time register
DR: RWRegister<u32>
date register
SSR: RORegister<u32>
RTC sub second register
ICSR: RWRegister<u32>
RTC initialization control and status register
PRER: RWRegister<u32>
prescaler register
WUTR: RWRegister<u32>
wakeup timer register
CR: RWRegister<u32>
RTC control register
PRIVCR: RWRegister<u32>
RTC privilege mode control register
SMCR: RWRegister<u32>
RTC secure mode control register
WPR: WORegister<u32>
write protection register
CALR: RWRegister<u32>
calibration register
SHIFTR: WORegister<u32>
shift control register
TSTR: RORegister<u32>
time stamp time register
TSDR: RORegister<u32>
time stamp date register
TSSSR: RORegister<u32>
timestamp sub second register
ALRMAR: RWRegister<u32>
alarm A register
ALRMASSR: RWRegister<u32>
alarm A sub second register
ALRMBR: RWRegister<u32>
alarm B register
ALRMBSSR: RWRegister<u32>
alarm B sub second register
SR: RORegister<u32>
RTC status register
MISR: RORegister<u32>
RTC non-secure masked interrupt status register
SMISR: RORegister<u32>
RTC secure masked interrupt status register
SCR: WORegister<u32>
RTC status clear register