Struct stm32ral::stm32h7::peripherals::mdma::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 209 fields
pub GISR0: RORegister<u32>,
pub ISR0: RORegister<u32>,
pub IFCR0: WORegister<u32>,
pub ESR0: RORegister<u32>,
pub CR0: RWRegister<u32>,
pub TCR0: RWRegister<u32>,
pub BNDTR0: RWRegister<u32>,
pub SAR0: RWRegister<u32>,
pub DAR0: RWRegister<u32>,
pub BRUR0: RWRegister<u32>,
pub LAR0: RWRegister<u32>,
pub TBR0: RWRegister<u32>,
pub MAR0: RWRegister<u32>,
pub MDR0: RWRegister<u32>,
pub ISR1: RORegister<u32>,
pub IFCR1: WORegister<u32>,
pub ESR1: RORegister<u32>,
pub CR1: RWRegister<u32>,
pub TCR1: RWRegister<u32>,
pub BNDTR1: RWRegister<u32>,
pub SAR1: RWRegister<u32>,
pub DAR1: RWRegister<u32>,
pub BRUR1: RWRegister<u32>,
pub LAR1: RWRegister<u32>,
pub TBR1: RWRegister<u32>,
pub MAR1: RWRegister<u32>,
pub MDR1: RWRegister<u32>,
pub ISR2: RORegister<u32>,
pub IFCR2: WORegister<u32>,
pub ESR2: RORegister<u32>,
pub CR2: RWRegister<u32>,
pub TCR2: RWRegister<u32>,
pub BNDTR2: RWRegister<u32>,
pub SAR2: RWRegister<u32>,
pub DAR2: RWRegister<u32>,
pub BRUR2: RWRegister<u32>,
pub LAR2: RWRegister<u32>,
pub TBR2: RWRegister<u32>,
pub MAR2: RWRegister<u32>,
pub MDR2: RWRegister<u32>,
pub ISR3: RORegister<u32>,
pub IFCR3: WORegister<u32>,
pub ESR3: RORegister<u32>,
pub CR3: RWRegister<u32>,
pub TCR3: RWRegister<u32>,
pub BNDTR3: RWRegister<u32>,
pub SAR3: RWRegister<u32>,
pub DAR3: RWRegister<u32>,
pub BRUR3: RWRegister<u32>,
pub LAR3: RWRegister<u32>,
pub TBR3: RWRegister<u32>,
pub MAR3: RWRegister<u32>,
pub MDR3: RWRegister<u32>,
pub ISR4: RORegister<u32>,
pub IFCR4: WORegister<u32>,
pub ESR4: RORegister<u32>,
pub CR4: RWRegister<u32>,
pub TCR4: RWRegister<u32>,
pub BNDTR4: RWRegister<u32>,
pub SAR4: RWRegister<u32>,
pub DAR4: RWRegister<u32>,
pub BRUR4: RWRegister<u32>,
pub LAR4: RWRegister<u32>,
pub TBR4: RWRegister<u32>,
pub MAR4: RWRegister<u32>,
pub MDR4: RWRegister<u32>,
pub ISR5: RORegister<u32>,
pub IFCR5: WORegister<u32>,
pub ESR5: RORegister<u32>,
pub CR5: RWRegister<u32>,
pub TCR5: RWRegister<u32>,
pub BNDTR5: RWRegister<u32>,
pub SAR5: RWRegister<u32>,
pub DAR5: RWRegister<u32>,
pub BRUR5: RWRegister<u32>,
pub LAR5: RWRegister<u32>,
pub TBR5: RWRegister<u32>,
pub MAR5: RWRegister<u32>,
pub MDR5: RWRegister<u32>,
pub ISR6: RORegister<u32>,
pub IFCR6: WORegister<u32>,
pub ESR6: RORegister<u32>,
pub CR6: RWRegister<u32>,
pub TCR6: RWRegister<u32>,
pub BNDTR6: RWRegister<u32>,
pub SAR6: RWRegister<u32>,
pub DAR6: RWRegister<u32>,
pub BRUR6: RWRegister<u32>,
pub LAR6: RWRegister<u32>,
pub TBR6: RWRegister<u32>,
pub MAR6: RWRegister<u32>,
pub MDR6: RWRegister<u32>,
pub ISR7: RORegister<u32>,
pub IFCR7: WORegister<u32>,
pub ESR7: RORegister<u32>,
pub CR7: RWRegister<u32>,
pub TCR7: RWRegister<u32>,
pub BNDTR7: RWRegister<u32>,
pub SAR7: RWRegister<u32>,
pub DAR7: RWRegister<u32>,
pub BRUR7: RWRegister<u32>,
pub LAR7: RWRegister<u32>,
pub TBR7: RWRegister<u32>,
pub MAR7: RWRegister<u32>,
pub MDR7: RWRegister<u32>,
pub ISR8: RORegister<u32>,
pub IFCR8: WORegister<u32>,
pub ESR8: RORegister<u32>,
pub CR8: RWRegister<u32>,
pub TCR8: RWRegister<u32>,
pub BNDTR8: RWRegister<u32>,
pub SAR8: RWRegister<u32>,
pub DAR8: RWRegister<u32>,
pub BRUR8: RWRegister<u32>,
pub LAR8: RWRegister<u32>,
pub TBR8: RWRegister<u32>,
pub MAR8: RWRegister<u32>,
pub MDR8: RWRegister<u32>,
pub ISR9: RORegister<u32>,
pub IFCR9: WORegister<u32>,
pub ESR9: RORegister<u32>,
pub CR9: RWRegister<u32>,
pub TCR9: RWRegister<u32>,
pub BNDTR9: RWRegister<u32>,
pub SAR9: RWRegister<u32>,
pub DAR9: RWRegister<u32>,
pub BRUR9: RWRegister<u32>,
pub LAR9: RWRegister<u32>,
pub TBR9: RWRegister<u32>,
pub MAR9: RWRegister<u32>,
pub MDR9: RWRegister<u32>,
pub ISR10: RORegister<u32>,
pub IFCR10: WORegister<u32>,
pub ESR10: RORegister<u32>,
pub CR10: RWRegister<u32>,
pub TCR10: RWRegister<u32>,
pub BNDTR10: RWRegister<u32>,
pub SAR10: RWRegister<u32>,
pub DAR10: RWRegister<u32>,
pub BRUR10: RWRegister<u32>,
pub LAR10: RWRegister<u32>,
pub TBR10: RWRegister<u32>,
pub MAR10: RWRegister<u32>,
pub MDR10: RWRegister<u32>,
pub ISR11: RORegister<u32>,
pub IFCR11: WORegister<u32>,
pub ESR11: RORegister<u32>,
pub CR11: RWRegister<u32>,
pub TCR11: RWRegister<u32>,
pub BNDTR11: RWRegister<u32>,
pub SAR11: RWRegister<u32>,
pub DAR11: RWRegister<u32>,
pub BRUR11: RWRegister<u32>,
pub LAR11: RWRegister<u32>,
pub TBR11: RWRegister<u32>,
pub MAR11: RWRegister<u32>,
pub MDR11: RWRegister<u32>,
pub ISR12: RORegister<u32>,
pub IFCR12: WORegister<u32>,
pub ESR12: RORegister<u32>,
pub CR12: RWRegister<u32>,
pub TCR12: RWRegister<u32>,
pub BNDTR12: RWRegister<u32>,
pub SAR12: RWRegister<u32>,
pub DAR12: RWRegister<u32>,
pub BRUR12: RWRegister<u32>,
pub LAR12: RWRegister<u32>,
pub TBR12: RWRegister<u32>,
pub MAR12: RWRegister<u32>,
pub MDR12: RWRegister<u32>,
pub ISR13: RORegister<u32>,
pub IFCR13: WORegister<u32>,
pub ESR13: RORegister<u32>,
pub CR13: RWRegister<u32>,
pub TCR13: RWRegister<u32>,
pub BNDTR13: RWRegister<u32>,
pub SAR13: RWRegister<u32>,
pub DAR13: RWRegister<u32>,
pub BRUR13: RWRegister<u32>,
pub LAR13: RWRegister<u32>,
pub TBR13: RWRegister<u32>,
pub MAR13: RWRegister<u32>,
pub MDR13: RWRegister<u32>,
pub ISR14: RORegister<u32>,
pub IFCR14: WORegister<u32>,
pub ESR14: RORegister<u32>,
pub CR14: RWRegister<u32>,
pub TCR14: RWRegister<u32>,
pub BNDTR14: RWRegister<u32>,
pub SAR14: RWRegister<u32>,
pub DAR14: RWRegister<u32>,
pub BRUR14: RWRegister<u32>,
pub LAR14: RWRegister<u32>,
pub TBR14: RWRegister<u32>,
pub MAR14: RWRegister<u32>,
pub MDR14: RWRegister<u32>,
pub ISR15: RORegister<u32>,
pub IFCR15: WORegister<u32>,
pub ESR15: RORegister<u32>,
pub CR15: RWRegister<u32>,
pub TCR15: RWRegister<u32>,
pub BNDTR15: RWRegister<u32>,
pub SAR15: RWRegister<u32>,
pub DAR15: RWRegister<u32>,
pub BRUR15: RWRegister<u32>,
pub LAR15: RWRegister<u32>,
pub TBR15: RWRegister<u32>,
pub MAR15: RWRegister<u32>,
pub MDR15: RWRegister<u32>,
// some fields omitted
}Fields
GISR0: RORegister<u32>MDMA Global Interrupt/Status Register
ISR0: RORegister<u32>MDMA channel x interrupt/status register
IFCR0: WORegister<u32>MDMA channel x interrupt flag clear register
ESR0: RORegister<u32>MDMA Channel x error status register
CR0: RWRegister<u32>This register is used to control the concerned channel.
TCR0: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR0: RWRegister<u32>MDMA Channel x block number of data register
SAR0: RWRegister<u32>MDMA channel x source address register
DAR0: RWRegister<u32>MDMA channel x destination address register
BRUR0: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR0: RWRegister<u32>MDMA channel x Link Address register
TBR0: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR0: RWRegister<u32>MDMA channel x Mask address register
MDR0: RWRegister<u32>MDMA channel x Mask Data register
ISR1: RORegister<u32>MDMA channel x interrupt/status register
IFCR1: WORegister<u32>MDMA channel x interrupt flag clear register
ESR1: RORegister<u32>MDMA Channel x error status register
CR1: RWRegister<u32>This register is used to control the concerned channel.
TCR1: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR1: RWRegister<u32>MDMA Channel x block number of data register
SAR1: RWRegister<u32>MDMA channel x source address register
DAR1: RWRegister<u32>MDMA channel x destination address register
BRUR1: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR1: RWRegister<u32>MDMA channel x Link Address register
TBR1: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR1: RWRegister<u32>MDMA channel x Mask address register
MDR1: RWRegister<u32>MDMA channel x Mask Data register
ISR2: RORegister<u32>MDMA channel x interrupt/status register
IFCR2: WORegister<u32>MDMA channel x interrupt flag clear register
ESR2: RORegister<u32>MDMA Channel x error status register
CR2: RWRegister<u32>This register is used to control the concerned channel.
TCR2: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR2: RWRegister<u32>MDMA Channel x block number of data register
SAR2: RWRegister<u32>MDMA channel x source address register
DAR2: RWRegister<u32>MDMA channel x destination address register
BRUR2: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR2: RWRegister<u32>MDMA channel x Link Address register
TBR2: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR2: RWRegister<u32>MDMA channel x Mask address register
MDR2: RWRegister<u32>MDMA channel x Mask Data register
ISR3: RORegister<u32>MDMA channel x interrupt/status register
IFCR3: WORegister<u32>MDMA channel x interrupt flag clear register
ESR3: RORegister<u32>MDMA Channel x error status register
CR3: RWRegister<u32>This register is used to control the concerned channel.
TCR3: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR3: RWRegister<u32>MDMA Channel x block number of data register
SAR3: RWRegister<u32>MDMA channel x source address register
DAR3: RWRegister<u32>MDMA channel x destination address register
BRUR3: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR3: RWRegister<u32>MDMA channel x Link Address register
TBR3: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR3: RWRegister<u32>MDMA channel x Mask address register
MDR3: RWRegister<u32>MDMA channel x Mask Data register
ISR4: RORegister<u32>MDMA channel x interrupt/status register
IFCR4: WORegister<u32>MDMA channel x interrupt flag clear register
ESR4: RORegister<u32>MDMA Channel x error status register
CR4: RWRegister<u32>This register is used to control the concerned channel.
TCR4: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR4: RWRegister<u32>MDMA Channel x block number of data register
SAR4: RWRegister<u32>MDMA channel x source address register
DAR4: RWRegister<u32>MDMA channel x destination address register
BRUR4: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR4: RWRegister<u32>MDMA channel x Link Address register
TBR4: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR4: RWRegister<u32>MDMA channel x Mask address register
MDR4: RWRegister<u32>MDMA channel x Mask Data register
ISR5: RORegister<u32>MDMA channel x interrupt/status register
IFCR5: WORegister<u32>MDMA channel x interrupt flag clear register
ESR5: RORegister<u32>MDMA Channel x error status register
CR5: RWRegister<u32>This register is used to control the concerned channel.
TCR5: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR5: RWRegister<u32>MDMA Channel x block number of data register
SAR5: RWRegister<u32>MDMA channel x source address register
DAR5: RWRegister<u32>MDMA channel x destination address register
BRUR5: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR5: RWRegister<u32>MDMA channel x Link Address register
TBR5: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR5: RWRegister<u32>MDMA channel x Mask address register
MDR5: RWRegister<u32>MDMA channel x Mask Data register
ISR6: RORegister<u32>MDMA channel x interrupt/status register
IFCR6: WORegister<u32>MDMA channel x interrupt flag clear register
ESR6: RORegister<u32>MDMA Channel x error status register
CR6: RWRegister<u32>This register is used to control the concerned channel.
TCR6: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR6: RWRegister<u32>MDMA Channel x block number of data register
SAR6: RWRegister<u32>MDMA channel x source address register
DAR6: RWRegister<u32>MDMA channel x destination address register
BRUR6: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR6: RWRegister<u32>MDMA channel x Link Address register
TBR6: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR6: RWRegister<u32>MDMA channel x Mask address register
MDR6: RWRegister<u32>MDMA channel x Mask Data register
ISR7: RORegister<u32>MDMA channel x interrupt/status register
IFCR7: WORegister<u32>MDMA channel x interrupt flag clear register
ESR7: RORegister<u32>MDMA Channel x error status register
CR7: RWRegister<u32>This register is used to control the concerned channel.
TCR7: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR7: RWRegister<u32>MDMA Channel x block number of data register
SAR7: RWRegister<u32>MDMA channel x source address register
DAR7: RWRegister<u32>MDMA channel x destination address register
BRUR7: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR7: RWRegister<u32>MDMA channel x Link Address register
TBR7: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR7: RWRegister<u32>MDMA channel x Mask address register
MDR7: RWRegister<u32>MDMA channel x Mask Data register
ISR8: RORegister<u32>MDMA channel x interrupt/status register
IFCR8: WORegister<u32>MDMA channel x interrupt flag clear register
ESR8: RORegister<u32>MDMA Channel x error status register
CR8: RWRegister<u32>This register is used to control the concerned channel.
TCR8: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR8: RWRegister<u32>MDMA Channel x block number of data register
SAR8: RWRegister<u32>MDMA channel x source address register
DAR8: RWRegister<u32>MDMA channel x destination address register
BRUR8: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR8: RWRegister<u32>MDMA channel x Link Address register
TBR8: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR8: RWRegister<u32>MDMA channel x Mask address register
MDR8: RWRegister<u32>MDMA channel x Mask Data register
ISR9: RORegister<u32>MDMA channel x interrupt/status register
IFCR9: WORegister<u32>MDMA channel x interrupt flag clear register
ESR9: RORegister<u32>MDMA Channel x error status register
CR9: RWRegister<u32>This register is used to control the concerned channel.
TCR9: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR9: RWRegister<u32>MDMA Channel x block number of data register
SAR9: RWRegister<u32>MDMA channel x source address register
DAR9: RWRegister<u32>MDMA channel x destination address register
BRUR9: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR9: RWRegister<u32>MDMA channel x Link Address register
TBR9: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR9: RWRegister<u32>MDMA channel x Mask address register
MDR9: RWRegister<u32>MDMA channel x Mask Data register
ISR10: RORegister<u32>MDMA channel x interrupt/status register
IFCR10: WORegister<u32>MDMA channel x interrupt flag clear register
ESR10: RORegister<u32>MDMA Channel x error status register
CR10: RWRegister<u32>This register is used to control the concerned channel.
TCR10: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR10: RWRegister<u32>MDMA Channel x block number of data register
SAR10: RWRegister<u32>MDMA channel x source address register
DAR10: RWRegister<u32>MDMA channel x destination address register
BRUR10: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR10: RWRegister<u32>MDMA channel x Link Address register
TBR10: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR10: RWRegister<u32>MDMA channel x Mask address register
MDR10: RWRegister<u32>MDMA channel x Mask Data register
ISR11: RORegister<u32>MDMA channel x interrupt/status register
IFCR11: WORegister<u32>MDMA channel x interrupt flag clear register
ESR11: RORegister<u32>MDMA Channel x error status register
CR11: RWRegister<u32>This register is used to control the concerned channel.
TCR11: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR11: RWRegister<u32>MDMA Channel x block number of data register
SAR11: RWRegister<u32>MDMA channel x source address register
DAR11: RWRegister<u32>MDMA channel x destination address register
BRUR11: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR11: RWRegister<u32>MDMA channel x Link Address register
TBR11: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR11: RWRegister<u32>MDMA channel x Mask address register
MDR11: RWRegister<u32>MDMA channel x Mask Data register
ISR12: RORegister<u32>MDMA channel x interrupt/status register
IFCR12: WORegister<u32>MDMA channel x interrupt flag clear register
ESR12: RORegister<u32>MDMA Channel x error status register
CR12: RWRegister<u32>This register is used to control the concerned channel.
TCR12: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR12: RWRegister<u32>MDMA Channel x block number of data register
SAR12: RWRegister<u32>MDMA channel x source address register
DAR12: RWRegister<u32>MDMA channel x destination address register
BRUR12: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR12: RWRegister<u32>MDMA channel x Link Address register
TBR12: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR12: RWRegister<u32>MDMA channel x Mask address register
MDR12: RWRegister<u32>MDMA channel x Mask Data register
ISR13: RORegister<u32>MDMA channel x interrupt/status register
IFCR13: WORegister<u32>MDMA channel x interrupt flag clear register
ESR13: RORegister<u32>MDMA Channel x error status register
CR13: RWRegister<u32>This register is used to control the concerned channel.
TCR13: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR13: RWRegister<u32>MDMA Channel x block number of data register
SAR13: RWRegister<u32>MDMA channel x source address register
DAR13: RWRegister<u32>MDMA channel x destination address register
BRUR13: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR13: RWRegister<u32>MDMA channel x Link Address register
TBR13: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR13: RWRegister<u32>MDMA channel x Mask address register
MDR13: RWRegister<u32>MDMA channel x Mask Data register
ISR14: RORegister<u32>MDMA channel x interrupt/status register
IFCR14: WORegister<u32>MDMA channel x interrupt flag clear register
ESR14: RORegister<u32>MDMA Channel x error status register
CR14: RWRegister<u32>This register is used to control the concerned channel.
TCR14: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR14: RWRegister<u32>MDMA Channel x block number of data register
SAR14: RWRegister<u32>MDMA channel x source address register
DAR14: RWRegister<u32>MDMA channel x destination address register
BRUR14: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR14: RWRegister<u32>MDMA channel x Link Address register
TBR14: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR14: RWRegister<u32>MDMA channel x Mask address register
MDR14: RWRegister<u32>MDMA channel x Mask Data register
ISR15: RORegister<u32>MDMA channel x interrupt/status register
IFCR15: WORegister<u32>MDMA channel x interrupt flag clear register
ESR15: RORegister<u32>MDMA Channel x error status register
CR15: RWRegister<u32>This register is used to control the concerned channel.
TCR15: RWRegister<u32>This register is used to configure the concerned channel.
BNDTR15: RWRegister<u32>MDMA Channel x block number of data register
SAR15: RWRegister<u32>MDMA channel x source address register
DAR15: RWRegister<u32>MDMA channel x destination address register
BRUR15: RWRegister<u32>MDMA channel x Block Repeat address Update register
LAR15: RWRegister<u32>MDMA channel x Link Address register
TBR15: RWRegister<u32>MDMA channel x Trigger and Bus selection Register
MAR15: RWRegister<u32>MDMA channel x Mask address register
MDR15: RWRegister<u32>MDMA channel x Mask Data register