Struct stm32ral::stm32h7::peripherals::hsem::RegisterBlock[][src]

#[repr(C)]
pub struct RegisterBlock {
Show 70 fields pub R0: RWRegister<u32>, pub R1: RWRegister<u32>, pub R2: RWRegister<u32>, pub R3: RWRegister<u32>, pub R4: RWRegister<u32>, pub R5: RWRegister<u32>, pub R6: RWRegister<u32>, pub R7: RWRegister<u32>, pub R8: RWRegister<u32>, pub R9: RWRegister<u32>, pub R10: RWRegister<u32>, pub R11: RWRegister<u32>, pub R12: RWRegister<u32>, pub R13: RWRegister<u32>, pub R14: RWRegister<u32>, pub R15: RWRegister<u32>, pub R16: RWRegister<u32>, pub R17: RWRegister<u32>, pub R18: RWRegister<u32>, pub R19: RWRegister<u32>, pub R20: RWRegister<u32>, pub R21: RWRegister<u32>, pub R22: RWRegister<u32>, pub R23: RWRegister<u32>, pub R24: RWRegister<u32>, pub R25: RWRegister<u32>, pub R26: RWRegister<u32>, pub R27: RWRegister<u32>, pub R28: RWRegister<u32>, pub R29: RWRegister<u32>, pub R30: RWRegister<u32>, pub R31: RWRegister<u32>, pub RLR0: RORegister<u32>, pub RLR1: RORegister<u32>, pub RLR2: RORegister<u32>, pub RLR3: RORegister<u32>, pub RLR4: RORegister<u32>, pub RLR5: RORegister<u32>, pub RLR6: RORegister<u32>, pub RLR7: RORegister<u32>, pub RLR8: RORegister<u32>, pub RLR9: RORegister<u32>, pub RLR10: RORegister<u32>, pub RLR11: RORegister<u32>, pub RLR12: RORegister<u32>, pub RLR13: RORegister<u32>, pub RLR14: RORegister<u32>, pub RLR15: RORegister<u32>, pub RLR16: RORegister<u32>, pub RLR17: RORegister<u32>, pub RLR18: RORegister<u32>, pub RLR19: RORegister<u32>, pub RLR20: RORegister<u32>, pub RLR21: RORegister<u32>, pub RLR22: RORegister<u32>, pub RLR23: RORegister<u32>, pub RLR24: RORegister<u32>, pub RLR25: RORegister<u32>, pub RLR26: RORegister<u32>, pub RLR27: RORegister<u32>, pub RLR28: RORegister<u32>, pub RLR29: RORegister<u32>, pub RLR30: RORegister<u32>, pub RLR31: RORegister<u32>, pub IER: RWRegister<u32>, pub ICR: RORegister<u32>, pub ISR: RORegister<u32>, pub MISR: RORegister<u32>, pub CR: RWRegister<u32>, pub KEYR: RWRegister<u32>, // some fields omitted
}

Fields

R0: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R1: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R2: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R3: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R4: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R5: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R6: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R7: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R8: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R9: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R10: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R11: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R12: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R13: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R14: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R15: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R16: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R17: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R18: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R19: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R20: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R21: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R22: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R23: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R24: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R25: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R26: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R27: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R28: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R29: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R30: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

R31: RWRegister<u32>

HSEM register HSEM_R0 HSEM_R31

RLR0: RORegister<u32>

HSEM Read lock register

RLR1: RORegister<u32>

HSEM Read lock register

RLR2: RORegister<u32>

HSEM Read lock register

RLR3: RORegister<u32>

HSEM Read lock register

RLR4: RORegister<u32>

HSEM Read lock register

RLR5: RORegister<u32>

HSEM Read lock register

RLR6: RORegister<u32>

HSEM Read lock register

RLR7: RORegister<u32>

HSEM Read lock register

RLR8: RORegister<u32>

HSEM Read lock register

RLR9: RORegister<u32>

HSEM Read lock register

RLR10: RORegister<u32>

HSEM Read lock register

RLR11: RORegister<u32>

HSEM Read lock register

RLR12: RORegister<u32>

HSEM Read lock register

RLR13: RORegister<u32>

HSEM Read lock register

RLR14: RORegister<u32>

HSEM Read lock register

RLR15: RORegister<u32>

HSEM Read lock register

RLR16: RORegister<u32>

HSEM Read lock register

RLR17: RORegister<u32>

HSEM Read lock register

RLR18: RORegister<u32>

HSEM Read lock register

RLR19: RORegister<u32>

HSEM Read lock register

RLR20: RORegister<u32>

HSEM Read lock register

RLR21: RORegister<u32>

HSEM Read lock register

RLR22: RORegister<u32>

HSEM Read lock register

RLR23: RORegister<u32>

HSEM Read lock register

RLR24: RORegister<u32>

HSEM Read lock register

RLR25: RORegister<u32>

HSEM Read lock register

RLR26: RORegister<u32>

HSEM Read lock register

RLR27: RORegister<u32>

HSEM Read lock register

RLR28: RORegister<u32>

HSEM Read lock register

RLR29: RORegister<u32>

HSEM Read lock register

RLR30: RORegister<u32>

HSEM Read lock register

RLR31: RORegister<u32>

HSEM Read lock register

IER: RWRegister<u32>

HSEM Interrupt enable register

ICR: RORegister<u32>

HSEM Interrupt clear register

ISR: RORegister<u32>

HSEM Interrupt status register

MISR: RORegister<u32>

HSEM Masked interrupt status register

CR: RWRegister<u32>

HSEM Clear register

KEYR: RWRegister<u32>

HSEM Interrupt clear register

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Performs the conversion.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.