Struct stm32ral::stm32h7::peripherals::fdcan::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 64 fields
pub CREL: RORegister<u32>,
pub ENDN: RORegister<u32>,
pub DBTP: RWRegister<u32>,
pub TEST: RWRegister<u32>,
pub RWD: RORegister<u32>,
pub CCCR: RWRegister<u32>,
pub NBTP: RWRegister<u32>,
pub TSCC: RWRegister<u32>,
pub TSCV: RWRegister<u32>,
pub TOCC: RWRegister<u32>,
pub TOCV: RWRegister<u32>,
pub ECR: RWRegister<u32>,
pub PSR: RWRegister<u32>,
pub TDCR: RWRegister<u32>,
pub IR: RWRegister<u32>,
pub IE: RWRegister<u32>,
pub ILS: RWRegister<u32>,
pub ILE: RWRegister<u32>,
pub GFC: RWRegister<u32>,
pub SIDFC: RWRegister<u32>,
pub XIDFC: RWRegister<u32>,
pub XIDAM: RWRegister<u32>,
pub HPMS: RORegister<u32>,
pub NDAT1: RWRegister<u32>,
pub NDAT2: RWRegister<u32>,
pub RXF0C: RWRegister<u32>,
pub RXF0S: RWRegister<u32>,
pub RXF0A: RWRegister<u32>,
pub RXBC: RWRegister<u32>,
pub RXF1C: RWRegister<u32>,
pub RXF1S: RWRegister<u32>,
pub RXF1A: RWRegister<u32>,
pub RXESC: RWRegister<u32>,
pub TXBC: RWRegister<u32>,
pub TXFQS: RORegister<u32>,
pub TXESC: RWRegister<u32>,
pub TXBRP: RORegister<u32>,
pub TXBAR: RWRegister<u32>,
pub TXBCR: RWRegister<u32>,
pub TXBTO: RWRegister<u32>,
pub TXBCF: RORegister<u32>,
pub TXBTIE: RWRegister<u32>,
pub TXBCIE: RWRegister<u32>,
pub TXEFC: RWRegister<u32>,
pub TXEFS: RWRegister<u32>,
pub TXEFA: RWRegister<u32>,
pub TTTMC: RWRegister<u32>,
pub TTRMC: RWRegister<u32>,
pub TTOCF: RWRegister<u32>,
pub TTMLM: RWRegister<u32>,
pub TURCF: RWRegister<u32>,
pub TTOCN: RWRegister<u32>,
pub TTGTP: RWRegister<u32>,
pub TTTMK: RWRegister<u32>,
pub TTIR: RWRegister<u32>,
pub TTIE: RWRegister<u32>,
pub TTILS: RWRegister<u32>,
pub TTOST: RWRegister<u32>,
pub TURNA: RORegister<u32>,
pub TTLGT: RORegister<u32>,
pub TTCTC: RORegister<u32>,
pub TTCPT: RORegister<u32>,
pub TTCSM: RORegister<u32>,
pub TTTS: RWRegister<u32>,
// some fields omitted
}
Fields
CREL: RORegister<u32>
FDCAN Core Release Register
ENDN: RORegister<u32>
FDCAN Core Release Register
DBTP: RWRegister<u32>
FDCAN Data Bit Timing and Prescaler Register
TEST: RWRegister<u32>
FDCAN Test Register
RWD: RORegister<u32>
FDCAN RAM Watchdog Register
CCCR: RWRegister<u32>
FDCAN CC Control Register
NBTP: RWRegister<u32>
FDCAN Nominal Bit Timing and Prescaler Register
TSCC: RWRegister<u32>
FDCAN Timestamp Counter Configuration Register
TSCV: RWRegister<u32>
FDCAN Timestamp Counter Value Register
TOCC: RWRegister<u32>
FDCAN Timeout Counter Configuration Register
TOCV: RWRegister<u32>
FDCAN Timeout Counter Value Register
ECR: RWRegister<u32>
FDCAN Error Counter Register
PSR: RWRegister<u32>
FDCAN Protocol Status Register
TDCR: RWRegister<u32>
FDCAN Transmitter Delay Compensation Register
IR: RWRegister<u32>
FDCAN Interrupt Register
IE: RWRegister<u32>
FDCAN Interrupt Enable Register
ILS: RWRegister<u32>
FDCAN Interrupt Line Select Register
ILE: RWRegister<u32>
FDCAN Interrupt Line Enable Register
GFC: RWRegister<u32>
FDCAN Global Filter Configuration Register
SIDFC: RWRegister<u32>
FDCAN Standard ID Filter Configuration Register
XIDFC: RWRegister<u32>
FDCAN Extended ID Filter Configuration Register
XIDAM: RWRegister<u32>
FDCAN Extended ID and Mask Register
HPMS: RORegister<u32>
FDCAN High Priority Message Status Register
NDAT1: RWRegister<u32>
FDCAN New Data 1 Register
NDAT2: RWRegister<u32>
FDCAN New Data 2 Register
RXF0C: RWRegister<u32>
FDCAN Rx FIFO 0 Configuration Register
RXF0S: RWRegister<u32>
FDCAN Rx FIFO 0 Status Register
RXF0A: RWRegister<u32>
CAN Rx FIFO 0 Acknowledge Register
RXBC: RWRegister<u32>
FDCAN Rx Buffer Configuration Register
RXF1C: RWRegister<u32>
FDCAN Rx FIFO 1 Configuration Register
RXF1S: RWRegister<u32>
FDCAN Rx FIFO 1 Status Register
RXF1A: RWRegister<u32>
FDCAN Rx FIFO 1 Acknowledge Register
RXESC: RWRegister<u32>
FDCAN Rx Buffer Element Size Configuration Register
TXBC: RWRegister<u32>
FDCAN Tx Buffer Configuration Register
TXFQS: RORegister<u32>
FDCAN Tx FIFO/Queue Status Register
TXESC: RWRegister<u32>
FDCAN Tx Buffer Element Size Configuration Register
TXBRP: RORegister<u32>
FDCAN Tx Buffer Request Pending Register
TXBAR: RWRegister<u32>
FDCAN Tx Buffer Add Request Register
TXBCR: RWRegister<u32>
FDCAN Tx Buffer Cancellation Request Register
TXBTO: RWRegister<u32>
FDCAN Tx Buffer Transmission Occurred Register
TXBCF: RORegister<u32>
FDCAN Tx Buffer Cancellation Finished Register
TXBTIE: RWRegister<u32>
FDCAN Tx Buffer Transmission Interrupt Enable Register
TXBCIE: RWRegister<u32>
FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register
TXEFC: RWRegister<u32>
FDCAN Tx Event FIFO Configuration Register
TXEFS: RWRegister<u32>
FDCAN Tx Event FIFO Status Register
TXEFA: RWRegister<u32>
FDCAN Tx Event FIFO Acknowledge Register
TTTMC: RWRegister<u32>
FDCAN TT Trigger Memory Configuration Register
TTRMC: RWRegister<u32>
FDCAN TT Reference Message Configuration Register
TTOCF: RWRegister<u32>
FDCAN TT Operation Configuration Register
TTMLM: RWRegister<u32>
FDCAN TT Matrix Limits Register
TURCF: RWRegister<u32>
FDCAN TUR Configuration Register
TTOCN: RWRegister<u32>
FDCAN TT Operation Control Register
TTGTP: RWRegister<u32>
FDCAN TT Global Time Preset Register
TTTMK: RWRegister<u32>
FDCAN TT Time Mark Register
TTIR: RWRegister<u32>
FDCAN TT Interrupt Register
TTIE: RWRegister<u32>
FDCAN TT Interrupt Enable Register
TTILS: RWRegister<u32>
FDCAN TT Interrupt Line Select Register
TTOST: RWRegister<u32>
FDCAN TT Operation Status Register
TURNA: RORegister<u32>
FDCAN TUR Numerator Actual Register
TTLGT: RORegister<u32>
FDCAN TT Local and Global Time Register
TTCTC: RORegister<u32>
FDCAN TT Cycle Time and Count Register
TTCPT: RORegister<u32>
FDCAN TT Capture Time Register
TTCSM: RORegister<u32>
FDCAN TT Cycle Sync Mark Register
TTTS: RWRegister<u32>
FDCAN TT Trigger Select Register