Struct stm32ral::stm32h7::peripherals::ethernet_mac_v2::RegisterBlock[−][src]

#[repr(C)]
pub struct RegisterBlock {Show 90 fields
    pub MACCR: RWRegister<u32>,
    pub MACECR: RWRegister<u32>,
    pub MACPFR: RWRegister<u32>,
    pub MACWTR: RWRegister<u32>,
    pub MACHT0R: RWRegister<u32>,
    pub MACHT1R: RWRegister<u32>,
    pub MACVTR: RWRegister<u32>,
    pub MACVHTR: RWRegister<u32>,
    pub MACVIR: RWRegister<u32>,
    pub MACIVIR: RWRegister<u32>,
    pub MACQTxFCR: RWRegister<u32>,
    pub MACRxFCR: RWRegister<u32>,
    pub MACISR: RORegister<u32>,
    pub MACIER: RWRegister<u32>,
    pub MACRxTxSR: RORegister<u32>,
    pub MACPCSR: RWRegister<u32>,
    pub MACRWKPFR: RWRegister<u32>,
    pub MACLCSR: RWRegister<u32>,
    pub MACLTCR: RWRegister<u32>,
    pub MACLETR: RWRegister<u32>,
    pub MAC1USTCR: RWRegister<u32>,
    pub MACVR: RORegister<u32>,
    pub MACDR: RORegister<u32>,
    pub MACHWF1R: RORegister<u32>,
    pub MACHWF2R: RORegister<u32>,
    pub MACMDIOAR: RWRegister<u32>,
    pub MACMDIODR: RWRegister<u32>,
    pub MACA0HR: RWRegister<u32>,
    pub MACA0LR: RWRegister<u32>,
    pub MACA1HR: RWRegister<u32>,
    pub MACA1LR: RWRegister<u32>,
    pub MACA2HR: RWRegister<u32>,
    pub MACA2LR: RWRegister<u32>,
    pub MACA3HR: RWRegister<u32>,
    pub MACA3LR: RWRegister<u32>,
    pub MMC_CONTROL: RWRegister<u32>,
    pub MMC_RX_INTERRUPT: RORegister<u32>,
    pub MMC_TX_INTERRUPT: RORegister<u32>,
    pub MMC_RX_INTERRUPT_MASK: RWRegister<u32>,
    pub MMC_TX_INTERRUPT_MASK: RWRegister<u32>,
    pub TX_SINGLE_COLLISION_GOOD_PACKETS: RORegister<u32>,
    pub TX_MULTIPLE_COLLISION_GOOD_PACKETS: RORegister<u32>,
    pub TX_PACKET_COUNT_GOOD: RORegister<u32>,
    pub RX_CRC_ERROR_PACKETS: RORegister<u32>,
    pub RX_ALIGNMENT_ERROR_PACKETS: RORegister<u32>,
    pub RX_UNICAST_PACKETS_GOOD: RORegister<u32>,
    pub TX_LPI_USEC_CNTR: RORegister<u32>,
    pub TX_LPI_TRAN_CNTR: RORegister<u32>,
    pub RX_LPI_USEC_CNTR: RORegister<u32>,
    pub RX_LPI_TRAN_CNTR: RORegister<u32>,
    pub MACL3L4C0R: RWRegister<u32>,
    pub MACL4A0R: RWRegister<u32>,
    pub MACL3A00R: RWRegister<u32>,
    pub MACL3A10R: RWRegister<u32>,
    pub MACL3A20: RWRegister<u32>,
    pub MACL3A30: RWRegister<u32>,
    pub MACL3L4C1R: RWRegister<u32>,
    pub MACL4A1R: RWRegister<u32>,
    pub MACL3A01R: RWRegister<u32>,
    pub MACL3A11R: RWRegister<u32>,
    pub MACL3A21R: RWRegister<u32>,
    pub MACL3A31R: RWRegister<u32>,
    pub MACARPAR: RWRegister<u32>,
    pub MACTSCR: RWRegister<u32>,
    pub MACSSIR: RWRegister<u32>,
    pub MACSTSR: RORegister<u32>,
    pub MACSTNR: RORegister<u32>,
    pub MACSTSUR: RWRegister<u32>,
    pub MACSTNUR: RWRegister<u32>,
    pub MACTSAR: RWRegister<u32>,
    pub MACTSSR: RORegister<u32>,
    pub MACTxTSSNR: RORegister<u32>,
    pub MACTxTSSSR: RORegister<u32>,
    pub MACACR: RWRegister<u32>,
    pub MACATSNR: RORegister<u32>,
    pub MACATSSR: RORegister<u32>,
    pub MACTSIACR: RWRegister<u32>,
    pub MACTSEACR: RWRegister<u32>,
    pub MACTSICNR: RWRegister<u32>,
    pub MACTSECNR: RWRegister<u32>,
    pub MACPPSCR: RWRegister<u32>,
    pub MACPPSTTSR: RWRegister<u32>,
    pub MACPPSTTNR: RWRegister<u32>,
    pub MACPPSIR: RWRegister<u32>,
    pub MACPPSWR: RWRegister<u32>,
    pub MACPOCR: RWRegister<u32>,
    pub MACSPI0R: RWRegister<u32>,
    pub MACSPI1R: RWRegister<u32>,
    pub MACSPI2R: RWRegister<u32>,
    pub MACLMIR: RWRegister<u32>,
    // some fields omitted
}

Fields

MACCR: RWRegister<u32>

Operating mode configuration register

MACECR: RWRegister<u32>

Extended operating mode configuration register

MACPFR: RWRegister<u32>

Packet filtering control register

MACWTR: RWRegister<u32>

Watchdog timeout register

MACHT0R: RWRegister<u32>

Hash Table 0 register

MACHT1R: RWRegister<u32>

Hash Table 1 register

MACVTR: RWRegister<u32>

VLAN tag register

MACVHTR: RWRegister<u32>

VLAN Hash table register

MACVIR: RWRegister<u32>

VLAN inclusion register

MACIVIR: RWRegister<u32>

Inner VLAN inclusion register

MACQTxFCR: RWRegister<u32>

Tx Queue flow control register

MACRxFCR: RWRegister<u32>

Rx flow control register

MACISR: RORegister<u32>

Interrupt status register

MACIER: RWRegister<u32>

Interrupt enable register

MACRxTxSR: RORegister<u32>

Rx Tx status register

MACPCSR: RWRegister<u32>

PMT control status register

MACRWKPFR: RWRegister<u32>

Remove wakeup packet filter register

MACLCSR: RWRegister<u32>

LPI control status register

MACLTCR: RWRegister<u32>

LPI timers control register

MACLETR: RWRegister<u32>

LPI entry timer register

MAC1USTCR: RWRegister<u32>

1-microsecond-tick counter register

MACVR: RORegister<u32>

Version register

MACDR: RORegister<u32>

Debug register

MACHWF1R: RORegister<u32>

HW feature 1 register

MACHWF2R: RORegister<u32>

HW feature 2 register

MACMDIOAR: RWRegister<u32>

MDIO address register

MACMDIODR: RWRegister<u32>

MDIO data register

MACA0HR: RWRegister<u32>

Address 0 high register

MACA0LR: RWRegister<u32>

Address 0 low register

MACA1HR: RWRegister<u32>

Address 1 high register

MACA1LR: RWRegister<u32>

Address 1 low register

MACA2HR: RWRegister<u32>

Address 2 high register

MACA2LR: RWRegister<u32>

Address 2 low register

MACA3HR: RWRegister<u32>

Address 3 high register

MACA3LR: RWRegister<u32>

Address 3 low register

MMC_CONTROL: RWRegister<u32>

MMC control register

MMC_RX_INTERRUPT: RORegister<u32>

MMC Rx interrupt register

MMC_TX_INTERRUPT: RORegister<u32>

MMC Tx interrupt register

MMC_RX_INTERRUPT_MASK: RWRegister<u32>

MMC Rx interrupt mask register

MMC_TX_INTERRUPT_MASK: RWRegister<u32>

MMC Tx interrupt mask register

TX_SINGLE_COLLISION_GOOD_PACKETS: RORegister<u32>

Tx single collision good packets register

TX_MULTIPLE_COLLISION_GOOD_PACKETS: RORegister<u32>

Tx multiple collision good packets register

TX_PACKET_COUNT_GOOD: RORegister<u32>

Tx packet count good register

RX_CRC_ERROR_PACKETS: RORegister<u32>

Rx CRC error packets register

RX_ALIGNMENT_ERROR_PACKETS: RORegister<u32>

Rx alignment error packets register

RX_UNICAST_PACKETS_GOOD: RORegister<u32>

Rx unicast packets good register

TX_LPI_USEC_CNTR: RORegister<u32>

Tx LPI microsecond timer register

TX_LPI_TRAN_CNTR: RORegister<u32>

Tx LPI transition counter register

RX_LPI_USEC_CNTR: RORegister<u32>

Rx LPI microsecond counter register

RX_LPI_TRAN_CNTR: RORegister<u32>

Rx LPI transition counter register

MACL3L4C0R: RWRegister<u32>

L3 and L4 control 0 register

MACL4A0R: RWRegister<u32>

Layer4 address filter 0 register

MACL3A00R: RWRegister<u32>

MACL3A00R

MACL3A10R: RWRegister<u32>

Layer3 address 1 filter 0 register

MACL3A20: RWRegister<u32>

Layer3 Address 2 filter 0 register

MACL3A30: RWRegister<u32>

Layer3 Address 3 filter 0 register

MACL3L4C1R: RWRegister<u32>

L3 and L4 control 1 register

MACL4A1R: RWRegister<u32>

Layer 4 address filter 1 register

MACL3A01R: RWRegister<u32>

Layer3 address 0 filter 1 Register

MACL3A11R: RWRegister<u32>

Layer3 address 1 filter 1 register

MACL3A21R: RWRegister<u32>

Layer3 address 2 filter 1 Register

MACL3A31R: RWRegister<u32>

Layer3 address 3 filter 1 register

MACARPAR: RWRegister<u32>

ARP address register

MACTSCR: RWRegister<u32>

Timestamp control Register

MACSSIR: RWRegister<u32>

Sub-second increment register

MACSTSR: RORegister<u32>

System time seconds register

MACSTNR: RORegister<u32>

System time nanoseconds register

MACSTSUR: RWRegister<u32>

System time seconds update register

MACSTNUR: RWRegister<u32>

System time nanoseconds update register

MACTSAR: RWRegister<u32>

Timestamp addend register

MACTSSR: RORegister<u32>

Timestamp status register

MACTxTSSNR: RORegister<u32>

Tx timestamp status nanoseconds register

MACTxTSSSR: RORegister<u32>

Tx timestamp status seconds register

MACACR: RWRegister<u32>

Auxiliary control register

MACATSNR: RORegister<u32>

Auxiliary timestamp nanoseconds register

MACATSSR: RORegister<u32>

Auxiliary timestamp seconds register

MACTSIACR: RWRegister<u32>

Timestamp Ingress asymmetric correction register

MACTSEACR: RWRegister<u32>

Timestamp Egress asymmetric correction register

MACTSICNR: RWRegister<u32>

Timestamp Ingress correction nanosecond register

MACTSECNR: RWRegister<u32>

Timestamp Egress correction nanosecond register

MACPPSCR: RWRegister<u32>

PPS control register

MACPPSTTSR: RWRegister<u32>

PPS target time seconds register

MACPPSTTNR: RWRegister<u32>

PPS target time nanoseconds register

MACPPSIR: RWRegister<u32>

PPS interval register

MACPPSWR: RWRegister<u32>

PPS width register

MACPOCR: RWRegister<u32>

PTP Offload control register

MACSPI0R: RWRegister<u32>

PTP Source Port Identity 0 Register

MACSPI1R: RWRegister<u32>

PTP Source port identity 1 register

MACSPI2R: RWRegister<u32>

PTP Source port identity 2 register

MACLMIR: RWRegister<u32>

Log message interval register

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

[src]

impl<T> Any for T where
T: 'static + ?Sized,

[src]

pub fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

[src]

impl<T> Borrow<T> for T where
T: ?Sized,

[src]

pub fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

[src]

impl<T> BorrowMut<T> for T where
T: ?Sized,

[src]

pub fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

[src]

impl<T> From<T> for T

[src]

pub fn from(t: T) -> T

Performs the conversion.

[src]

impl<T, U> Into for T where
U: From<T>,

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pub fn into(self) -> U

Performs the conversion.

[src]

impl<T, U> TryFrom for T where
U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

[src]

pub fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

[src]

impl<T, U> TryInto for T where
U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.

[src]

pub fn try_into(self) -> Result<U, >::Error>

Performs the conversion.

Struct stm32ral::stm32h7::peripherals::ethernet_mac_v2::RegisterBlock[−][src]

Fields

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for T where
T: 'static + ?Sized,

pub fn type_id(&self) -> TypeId

impl<T> Borrow<T> for T where
T: ?Sized,

pub fn borrow(&self) -> &T

impl<T> BorrowMut<T> for T where
T: ?Sized,

pub fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

pub fn from(t: T) -> T

impl<T, U> Into<U> for T where
U: From<T>,

pub fn into(self) -> U

impl<T, U> TryFrom<U> for T where
U: Into<T>,

type Error = Infallible

pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for T where
U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Struct stm32ral::stm32h7::peripherals::ethernet_mac_v2::RegisterBlock[−][src]

Fields

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for T where T: 'static + ?Sized,

pub fn type_id(&self) -> TypeId

impl<T> Borrow<T> for T where T: ?Sized,

pub fn borrow(&self) -> &T

impl<T> BorrowMut<T> for T where T: ?Sized,

pub fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

pub fn from(t: T) -> T

impl<T, U> Into<U> for T where U: From<T>,

pub fn into(self) -> U

impl<T, U> TryFrom<U> for T where U: Into<T>,

type Error = Infallible

pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for T where U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

impl<T> Any for T where
T: 'static + ?Sized,

impl<T> Borrow<T> for T where
T: ?Sized,

impl<T> BorrowMut<T> for T where
T: ?Sized,

impl<T, U> Into<U> for T where
U: From<T>,

impl<T, U> TryFrom<U> for T where
U: Into<T>,

impl<T, U> TryInto<U> for T where
U: TryFrom<T>,