Struct stm32ral::stm32h7::peripherals::adc_v3::RegisterBlock[][src]

#[repr(C)]
pub struct RegisterBlock {
Show 33 fields pub ISR: RWRegister<u32>, pub IER: RWRegister<u32>, pub CR: RWRegister<u32>, pub CFGR: RWRegister<u32>, pub CFGR2: RWRegister<u32>, pub SMPR1: RWRegister<u32>, pub SMPR2: RWRegister<u32>, pub PCSEL: RWRegister<u32>, pub LTR1: RWRegister<u32>, pub HTR1: RWRegister<u32>, pub SQR1: RWRegister<u32>, pub SQR2: RWRegister<u32>, pub SQR3: RWRegister<u32>, pub SQR4: RWRegister<u32>, pub DR: RORegister<u32>, pub JSQR: RWRegister<u32>, pub OFR1: RWRegister<u32>, pub OFR2: RWRegister<u32>, pub OFR3: RWRegister<u32>, pub OFR4: RWRegister<u32>, pub JDR1: RORegister<u32>, pub JDR2: RORegister<u32>, pub JDR3: RORegister<u32>, pub JDR4: RORegister<u32>, pub AWD2CR: RWRegister<u32>, pub AWD3CR: RWRegister<u32>, pub LTR2: RWRegister<u32>, pub HTR2: RWRegister<u32>, pub LTR3: RWRegister<u32>, pub HTR3: RWRegister<u32>, pub DIFSEL: RWRegister<u32>, pub CALFACT: RWRegister<u32>, pub CALFACT2: RWRegister<u32>, // some fields omitted
}

Fields

ISR: RWRegister<u32>

ADC interrupt and status register

IER: RWRegister<u32>

ADC interrupt enable register

CR: RWRegister<u32>

ADC control register

CFGR: RWRegister<u32>

ADC configuration register 1

CFGR2: RWRegister<u32>

ADC configuration register 2

SMPR1: RWRegister<u32>

ADC sampling time register 1

SMPR2: RWRegister<u32>

ADC sampling time register 2

PCSEL: RWRegister<u32>

ADC pre channel selection register

LTR1: RWRegister<u32>

ADC analog watchdog 1 threshold register

HTR1: RWRegister<u32>

ADC analog watchdog 2 threshold register

SQR1: RWRegister<u32>

ADC group regular sequencer ranks register 1

SQR2: RWRegister<u32>

ADC group regular sequencer ranks register 2

SQR3: RWRegister<u32>

ADC group regular sequencer ranks register 3

SQR4: RWRegister<u32>

ADC group regular sequencer ranks register 4

DR: RORegister<u32>

ADC group regular conversion data register

JSQR: RWRegister<u32>

ADC group injected sequencer register

OFR1: RWRegister<u32>

ADC offset number 1 register

OFR2: RWRegister<u32>

ADC offset number 2 register

OFR3: RWRegister<u32>

ADC offset number 3 register

OFR4: RWRegister<u32>

ADC offset number 4 register

JDR1: RORegister<u32>

ADC group injected sequencer rank 1 register

JDR2: RORegister<u32>

ADC group injected sequencer rank 2 register

JDR3: RORegister<u32>

ADC group injected sequencer rank 3 register

JDR4: RORegister<u32>

ADC group injected sequencer rank 4 register

AWD2CR: RWRegister<u32>

ADC analog watchdog 2 configuration register

AWD3CR: RWRegister<u32>

ADC analog watchdog 3 configuration register

LTR2: RWRegister<u32>

ADC watchdog lower threshold register 2

HTR2: RWRegister<u32>

ADC watchdog higher threshold register 2

LTR3: RWRegister<u32>

ADC watchdog lower threshold register 3

HTR3: RWRegister<u32>

ADC watchdog higher threshold register 3

DIFSEL: RWRegister<u32>

ADC channel differential or single-ended mode selection register

CALFACT: RWRegister<u32>

ADC calibration factors register

CALFACT2: RWRegister<u32>

ADC Calibration Factor register 2

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The type returned in the event of a conversion error.

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