Struct stm32ral::stm32f7::stm32f7x9::dfsdm::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 100 fields
pub DFSDM_CHCFG0R1: RWRegister<u32>,
pub DFSDM_CHCFG1R1: RWRegister<u32>,
pub DFSDM_CHCFG2R1: RWRegister<u32>,
pub DFSDM_CHCFG3R1: RWRegister<u32>,
pub DFSDM_CHCFG4R1: RWRegister<u32>,
pub DFSDM_CHCFG5R1: RWRegister<u32>,
pub DFSDM_CHCFG6R1: RWRegister<u32>,
pub DFSDM_CHCFG7R1: RWRegister<u32>,
pub DFSDM_CHCFG0R2: RWRegister<u32>,
pub DFSDM_CHCFG1R2: RWRegister<u32>,
pub DFSDM_CHCFG2R2: RWRegister<u32>,
pub DFSDM_CHCFG3R2: RWRegister<u32>,
pub DFSDM_CHCFG4R2: RWRegister<u32>,
pub DFSDM_CHCFG5R2: RWRegister<u32>,
pub DFSDM_CHCFG6R2: RWRegister<u32>,
pub DFSDM_CHCFG7R2: RWRegister<u32>,
pub DFSDM_AWSCD0R: RWRegister<u32>,
pub DFSDM_AWSCD1R: RWRegister<u32>,
pub DFSDM_AWSCD2R: RWRegister<u32>,
pub DFSDM_AWSCD3R: RWRegister<u32>,
pub DFSDM_AWSCD4R: RWRegister<u32>,
pub DFSDM_AWSCD5R: RWRegister<u32>,
pub DFSDM_AWSCD6R: RWRegister<u32>,
pub DFSDM_AWSCD7R: RWRegister<u32>,
pub DFSDM_CHWDAT0R: RORegister<u32>,
pub DFSDM_CHWDAT1R: RORegister<u32>,
pub DFSDM_CHWDAT2R: RORegister<u32>,
pub DFSDM_CHWDAT3R: RORegister<u32>,
pub DFSDM_CHWDAT4R: RORegister<u32>,
pub DFSDM_CHWDAT5R: RORegister<u32>,
pub DFSDM_CHWDAT6R: RORegister<u32>,
pub DFSDM_CHWDAT7R: RORegister<u32>,
pub DFSDM_CHDATIN0R: RWRegister<u32>,
pub DFSDM_CHDATIN1R: RWRegister<u32>,
pub DFSDM_CHDATIN2R: RWRegister<u32>,
pub DFSDM_CHDATIN3R: RWRegister<u32>,
pub DFSDM_CHDATIN4R: RWRegister<u32>,
pub DFSDM_CHDATIN5R: RWRegister<u32>,
pub DFSDM_CHDATIN6R: RWRegister<u32>,
pub DFSDM_CHDATIN7R: RWRegister<u32>,
pub DFSDM0_CR1: RWRegister<u32>,
pub DFSDM1_CR1: RWRegister<u32>,
pub DFSDM2_CR1: RWRegister<u32>,
pub DFSDM3_CR1: RWRegister<u32>,
pub DFSDM0_CR2: RWRegister<u32>,
pub DFSDM1_CR2: RWRegister<u32>,
pub DFSDM2_CR2: RWRegister<u32>,
pub DFSDM3_CR2: RWRegister<u32>,
pub DFSDM0_ISR: RORegister<u32>,
pub DFSDM1_ISR: RORegister<u32>,
pub DFSDM2_ISR: RORegister<u32>,
pub DFSDM3_ISR: RORegister<u32>,
pub DFSDM0_ICR: RWRegister<u32>,
pub DFSDM1_ICR: RWRegister<u32>,
pub DFSDM2_ICR: RWRegister<u32>,
pub DFSDM3_ICR: RWRegister<u32>,
pub DFSDM0_JCHGR: RWRegister<u32>,
pub DFSDM1_JCHGR: RWRegister<u32>,
pub DFSDM2_JCHGR: RWRegister<u32>,
pub DFSDM3_JCHGR: RWRegister<u32>,
pub DFSDM0_FCR: RWRegister<u32>,
pub DFSDM1_FCR: RWRegister<u32>,
pub DFSDM2_FCR: RWRegister<u32>,
pub DFSDM3_FCR: RWRegister<u32>,
pub DFSDM0_JDATAR: RORegister<u32>,
pub DFSDM1_JDATAR: RORegister<u32>,
pub DFSDM2_JDATAR: RORegister<u32>,
pub DFSDM3_JDATAR: RORegister<u32>,
pub DFSDM0_RDATAR: RORegister<u32>,
pub DFSDM1_RDATAR: RORegister<u32>,
pub DFSDM2_RDATAR: RORegister<u32>,
pub DFSDM3_RDATAR: RORegister<u32>,
pub DFSDM0_AWHTR: RWRegister<u32>,
pub DFSDM1_AWHTR: RWRegister<u32>,
pub DFSDM2_AWHTR: RWRegister<u32>,
pub DFSDM3_AWHTR: RWRegister<u32>,
pub DFSDM0_AWLTR: RWRegister<u32>,
pub DFSDM1_AWLTR: RWRegister<u32>,
pub DFSDM2_AWLTR: RWRegister<u32>,
pub DFSDM3_AWLTR: RWRegister<u32>,
pub DFSDM0_AWSR: RORegister<u32>,
pub DFSDM1_AWSR: RORegister<u32>,
pub DFSDM2_AWSR: RORegister<u32>,
pub DFSDM3_AWSR: RORegister<u32>,
pub DFSDM0_AWCFR: RWRegister<u32>,
pub DFSDM1_AWCFR: RWRegister<u32>,
pub DFSDM2_AWCFR: RWRegister<u32>,
pub DFSDM3_AWCFR: RWRegister<u32>,
pub DFSDM0_EXMAX: RORegister<u32>,
pub DFSDM1_EXMAX: RORegister<u32>,
pub DFSDM2_EXMAX: RORegister<u32>,
pub DFSDM3_EXMAX: RORegister<u32>,
pub DFSDM0_EXMIN: RORegister<u32>,
pub DFSDM1_EXMIN: RORegister<u32>,
pub DFSDM2_EXMIN: RORegister<u32>,
pub DFSDM3_EXMIN: RORegister<u32>,
pub DFSDM0_CNVTIMR: RORegister<u32>,
pub DFSDM1_CNVTIMR: RORegister<u32>,
pub DFSDM2_CNVTIMR: RORegister<u32>,
pub DFSDM3_CNVTIMR: RORegister<u32>,
}
Fields
DFSDM_CHCFG0R1: RWRegister<u32>
DFSDM channel configuration 0 register 1
DFSDM_CHCFG1R1: RWRegister<u32>
DFSDM channel configuration 1 register 1
DFSDM_CHCFG2R1: RWRegister<u32>
DFSDM channel configuration 2 register 1
DFSDM_CHCFG3R1: RWRegister<u32>
DFSDM channel configuration 3 register 1
DFSDM_CHCFG4R1: RWRegister<u32>
DFSDM channel configuration 4 register 1
DFSDM_CHCFG5R1: RWRegister<u32>
DFSDM channel configuration 5 register 1
DFSDM_CHCFG6R1: RWRegister<u32>
DFSDM channel configuration 6 register 1
DFSDM_CHCFG7R1: RWRegister<u32>
DFSDM channel configuration 7 register 1
DFSDM_CHCFG0R2: RWRegister<u32>
DFSDM channel configuration 0 register 2
DFSDM_CHCFG1R2: RWRegister<u32>
DFSDM channel configuration 1 register 2
DFSDM_CHCFG2R2: RWRegister<u32>
DFSDM channel configuration 2 register 2
DFSDM_CHCFG3R2: RWRegister<u32>
DFSDM channel configuration 3 register 2
DFSDM_CHCFG4R2: RWRegister<u32>
DFSDM channel configuration 4 register 2
DFSDM_CHCFG5R2: RWRegister<u32>
DFSDM channel configuration 5 register 2
DFSDM_CHCFG6R2: RWRegister<u32>
DFSDM channel configuration 6 register 2
DFSDM_CHCFG7R2: RWRegister<u32>
DFSDM channel configuration 7 register 2
DFSDM_AWSCD0R: RWRegister<u32>
DFSDM analog watchdog and short-circuit detector register
DFSDM_AWSCD1R: RWRegister<u32>
DFSDM analog watchdog and short-circuit detector register
DFSDM_AWSCD2R: RWRegister<u32>
DFSDM analog watchdog and short-circuit detector register
DFSDM_AWSCD3R: RWRegister<u32>
DFSDM analog watchdog and short-circuit detector register
DFSDM_AWSCD4R: RWRegister<u32>
DFSDM analog watchdog and short-circuit detector register
DFSDM_AWSCD5R: RWRegister<u32>
DFSDM analog watchdog and short-circuit detector register
DFSDM_AWSCD6R: RWRegister<u32>
DFSDM analog watchdog and short-circuit detector register
DFSDM_AWSCD7R: RWRegister<u32>
DFSDM analog watchdog and short-circuit detector register
DFSDM_CHWDAT0R: RORegister<u32>
DFSDM channel watchdog filter data register
DFSDM_CHWDAT1R: RORegister<u32>
DFSDM channel watchdog filter data register
DFSDM_CHWDAT2R: RORegister<u32>
DFSDM channel watchdog filter data register
DFSDM_CHWDAT3R: RORegister<u32>
DFSDM channel watchdog filter data register
DFSDM_CHWDAT4R: RORegister<u32>
DFSDM channel watchdog filter data register
DFSDM_CHWDAT5R: RORegister<u32>
DFSDM channel watchdog filter data register
DFSDM_CHWDAT6R: RORegister<u32>
DFSDM channel watchdog filter data register
DFSDM_CHWDAT7R: RORegister<u32>
DFSDM channel watchdog filter data register
DFSDM_CHDATIN0R: RWRegister<u32>
DFSDM channel data input register
DFSDM_CHDATIN1R: RWRegister<u32>
DFSDM channel data input register
DFSDM_CHDATIN2R: RWRegister<u32>
DFSDM channel data input register
DFSDM_CHDATIN3R: RWRegister<u32>
DFSDM channel data input register
DFSDM_CHDATIN4R: RWRegister<u32>
DFSDM channel data input register
DFSDM_CHDATIN5R: RWRegister<u32>
DFSDM channel data input register
DFSDM_CHDATIN6R: RWRegister<u32>
DFSDM channel data input register
DFSDM_CHDATIN7R: RWRegister<u32>
DFSDM channel data input register
DFSDM0_CR1: RWRegister<u32>
DFSDM control register 1
DFSDM1_CR1: RWRegister<u32>
DFSDM control register 1
DFSDM2_CR1: RWRegister<u32>
DFSDM control register 1
DFSDM3_CR1: RWRegister<u32>
DFSDM control register 1
DFSDM0_CR2: RWRegister<u32>
DFSDM control register 2
DFSDM1_CR2: RWRegister<u32>
DFSDM control register 2
DFSDM2_CR2: RWRegister<u32>
DFSDM control register 2
DFSDM3_CR2: RWRegister<u32>
DFSDM control register 2
DFSDM0_ISR: RORegister<u32>
DFSDM interrupt and status register
DFSDM1_ISR: RORegister<u32>
DFSDM interrupt and status register
DFSDM2_ISR: RORegister<u32>
DFSDM interrupt and status register
DFSDM3_ISR: RORegister<u32>
DFSDM interrupt and status register
DFSDM0_ICR: RWRegister<u32>
DFSDM interrupt flag clear register
DFSDM1_ICR: RWRegister<u32>
DFSDM interrupt flag clear register
DFSDM2_ICR: RWRegister<u32>
DFSDM interrupt flag clear register
DFSDM3_ICR: RWRegister<u32>
DFSDM interrupt flag clear register
DFSDM0_JCHGR: RWRegister<u32>
DFSDM injected channel group selection register
DFSDM1_JCHGR: RWRegister<u32>
DFSDM injected channel group selection register
DFSDM2_JCHGR: RWRegister<u32>
DFSDM injected channel group selection register
DFSDM3_JCHGR: RWRegister<u32>
DFSDM injected channel group selection register
DFSDM0_FCR: RWRegister<u32>
DFSDM filter control register
DFSDM1_FCR: RWRegister<u32>
DFSDM filter control register
DFSDM2_FCR: RWRegister<u32>
DFSDM filter control register
DFSDM3_FCR: RWRegister<u32>
DFSDM filter control register
DFSDM0_JDATAR: RORegister<u32>
DFSDM data register for injected group
DFSDM1_JDATAR: RORegister<u32>
DFSDM data register for injected group
DFSDM2_JDATAR: RORegister<u32>
DFSDM data register for injected group
DFSDM3_JDATAR: RORegister<u32>
DFSDM data register for injected group
DFSDM0_RDATAR: RORegister<u32>
DFSDM data register for the regular channel
DFSDM1_RDATAR: RORegister<u32>
DFSDM data register for the regular channel
DFSDM2_RDATAR: RORegister<u32>
DFSDM data register for the regular channel
DFSDM3_RDATAR: RORegister<u32>
DFSDM data register for the regular channel
DFSDM0_AWHTR: RWRegister<u32>
DFSDM analog watchdog high threshold register
DFSDM1_AWHTR: RWRegister<u32>
DFSDM analog watchdog high threshold register
DFSDM2_AWHTR: RWRegister<u32>
DFSDM analog watchdog high threshold register
DFSDM3_AWHTR: RWRegister<u32>
DFSDM analog watchdog high threshold register
DFSDM0_AWLTR: RWRegister<u32>
DFSDM analog watchdog low threshold register
DFSDM1_AWLTR: RWRegister<u32>
DFSDM analog watchdog low threshold register
DFSDM2_AWLTR: RWRegister<u32>
DFSDM analog watchdog low threshold register
DFSDM3_AWLTR: RWRegister<u32>
DFSDM analog watchdog low threshold register
DFSDM0_AWSR: RORegister<u32>
DFSDM analog watchdog status register
DFSDM1_AWSR: RORegister<u32>
DFSDM analog watchdog status register
DFSDM2_AWSR: RORegister<u32>
DFSDM analog watchdog status register
DFSDM3_AWSR: RORegister<u32>
DFSDM analog watchdog status register
DFSDM0_AWCFR: RWRegister<u32>
DFSDM analog watchdog clear flag register
DFSDM1_AWCFR: RWRegister<u32>
DFSDM analog watchdog clear flag register
DFSDM2_AWCFR: RWRegister<u32>
DFSDM analog watchdog clear flag register
DFSDM3_AWCFR: RWRegister<u32>
DFSDM analog watchdog clear flag register
DFSDM0_EXMAX: RORegister<u32>
DFSDM Extremes detector maximum register
DFSDM1_EXMAX: RORegister<u32>
DFSDM Extremes detector maximum register
DFSDM2_EXMAX: RORegister<u32>
DFSDM Extremes detector maximum register
DFSDM3_EXMAX: RORegister<u32>
DFSDM Extremes detector maximum register
DFSDM0_EXMIN: RORegister<u32>
DFSDM Extremes detector minimum register
DFSDM1_EXMIN: RORegister<u32>
DFSDM Extremes detector minimum register
DFSDM2_EXMIN: RORegister<u32>
DFSDM Extremes detector minimum register
DFSDM3_EXMIN: RORegister<u32>
DFSDM Extremes detector minimum register
DFSDM0_CNVTIMR: RORegister<u32>
DFSDM conversion timer register
DFSDM1_CNVTIMR: RORegister<u32>
DFSDM conversion timer register
DFSDM2_CNVTIMR: RORegister<u32>
DFSDM conversion timer register
DFSDM3_CNVTIMR: RORegister<u32>
DFSDM conversion timer register