Struct stm32ral::stm32f7::peripherals::otg_hs_device_v1::RegisterBlock[−][src]

#[repr(C)]
pub struct RegisterBlock {Show 101 fields
    pub OTG_HS_DCFG: RWRegister<u32>,
    pub OTG_HS_DCTL: RWRegister<u32>,
    pub OTG_HS_DSTS: RORegister<u32>,
    pub OTG_HS_DIEPMSK: RWRegister<u32>,
    pub OTG_HS_DOEPMSK: RWRegister<u32>,
    pub OTG_HS_DAINT: RORegister<u32>,
    pub OTG_HS_DAINTMSK: RWRegister<u32>,
    pub OTG_HS_DVBUSDIS: RWRegister<u32>,
    pub OTG_HS_DVBUSPULSE: RWRegister<u32>,
    pub OTG_HS_DTHRCTL: RWRegister<u32>,
    pub OTG_HS_DIEPEMPMSK: RWRegister<u32>,
    pub OTG_HS_DEACHINT: RWRegister<u32>,
    pub OTG_HS_DEACHINTMSK: RWRegister<u32>,
    pub OTG_HS_DIEPCTL0: RWRegister<u32>,
    pub OTG_HS_DIEPINT0: RWRegister<u32>,
    pub OTG_HS_DIEPTSIZ0: RWRegister<u32>,
    pub OTG_HS_DIEPDMA0: RWRegister<u32>,
    pub OTG_HS_DTXFSTS0: RORegister<u32>,
    pub OTG_HS_DIEPCTL1: RWRegister<u32>,
    pub OTG_HS_DIEPINT1: RWRegister<u32>,
    pub OTG_HS_DIEPTSIZ1: RWRegister<u32>,
    pub OTG_HS_DIEPDMA1: RWRegister<u32>,
    pub OTG_HS_DTXFSTS1: RORegister<u32>,
    pub OTG_HS_DIEPCTL2: RWRegister<u32>,
    pub OTG_HS_DIEPINT2: RWRegister<u32>,
    pub OTG_HS_DIEPTSIZ2: RWRegister<u32>,
    pub OTG_HS_DIEPDMA2: RWRegister<u32>,
    pub OTG_HS_DTXFSTS2: RORegister<u32>,
    pub OTG_HS_DIEPCTL3: RWRegister<u32>,
    pub OTG_HS_DIEPINT3: RWRegister<u32>,
    pub OTG_HS_DIEPTSIZ3: RWRegister<u32>,
    pub OTG_HS_DIEPDMA3: RWRegister<u32>,
    pub OTG_HS_DTXFSTS3: RORegister<u32>,
    pub OTG_HS_DIEPCTL4: RWRegister<u32>,
    pub OTG_HS_DIEPINT4: RWRegister<u32>,
    pub OTG_HS_DIEPTSIZ4: RWRegister<u32>,
    pub OTG_HS_DIEPDMA4: RWRegister<u32>,
    pub OTG_HS_DTXFSTS4: RORegister<u32>,
    pub OTG_HS_DIEPCTL5: RWRegister<u32>,
    pub OTG_HS_DIEPINT5: RWRegister<u32>,
    pub OTG_HS_DIEPTSIZ5: RWRegister<u32>,
    pub OTG_HS_DIEPDMA5: RWRegister<u32>,
    pub OTG_HS_DTXFSTS5: RORegister<u32>,
    pub OTG_HS_DIEPCTL6: RWRegister<u32>,
    pub OTG_HS_DIEPINT6: RWRegister<u32>,
    pub OTG_HS_DIEPTSIZ6: RWRegister<u32>,
    pub OTG_HS_DIEPDMA6: RWRegister<u32>,
    pub OTG_HS_DTXFSTS6: RWRegister<u32>,
    pub OTG_HS_DIEPCTL7: RWRegister<u32>,
    pub OTG_HS_DIEPINT7: RWRegister<u32>,
    pub OTG_HS_DIEPTSIZ7: RWRegister<u32>,
    pub OTG_HS_DIEPDMA7: RWRegister<u32>,
    pub OTG_HS_DTXFSTS7: RWRegister<u32>,
    pub OTG_HS_DIEPDMA8: RWRegister<u32>,
    pub OTG_HS_DIEPDMA9: RWRegister<u32>,
    pub OTG_HS_DIEPDMA10: RWRegister<u32>,
    pub OTG_HS_DIEPDMA11: RWRegister<u32>,
    pub OTG_HS_DIEPDMA12: RWRegister<u32>,
    pub OTG_HS_DIEPDMA13: RWRegister<u32>,
    pub OTG_HS_DIEPDMA14: RWRegister<u32>,
    pub OTG_HS_DIEPDMA15: RWRegister<u32>,
    pub OTG_HS_DOEPCTL0: RWRegister<u32>,
    pub OTG_HS_DOEPINT0: RWRegister<u32>,
    pub OTG_HS_DOEPTSIZ0: RWRegister<u32>,
    pub OTG_HS_DOEPDMA0: RWRegister<u32>,
    pub OTG_HS_DOEPCTL1: RWRegister<u32>,
    pub OTG_HS_DOEPINT1: RWRegister<u32>,
    pub OTG_HS_DOEPTSIZ1: RWRegister<u32>,
    pub OTG_HS_DOEPDMA1: RWRegister<u32>,
    pub OTG_HS_DOEPCTL2: RWRegister<u32>,
    pub OTG_HS_DOEPINT2: RWRegister<u32>,
    pub OTG_HS_DOEPTSIZ2: RWRegister<u32>,
    pub OTG_HS_DOEPDMA2: RWRegister<u32>,
    pub OTG_HS_DOEPCTL3: RWRegister<u32>,
    pub OTG_HS_DOEPINT3: RWRegister<u32>,
    pub OTG_HS_DOEPTSIZ3: RWRegister<u32>,
    pub OTG_HS_DOEPDMA3: RWRegister<u32>,
    pub OTG_HS_DOEPCTL4: RWRegister<u32>,
    pub OTG_HS_DOEPINT4: RWRegister<u32>,
    pub OTG_HS_DOEPTSIZ4: RWRegister<u32>,
    pub OTG_HS_DOEPDMA4: RWRegister<u32>,
    pub OTG_HS_DOEPCTL5: RWRegister<u32>,
    pub OTG_HS_DOEPINT5: RWRegister<u32>,
    pub OTG_HS_DOEPTSIZ5: RWRegister<u32>,
    pub OTG_HS_DOEPDMA5: RWRegister<u32>,
    pub OTG_HS_DOEPCTL6: RWRegister<u32>,
    pub OTG_HS_DOEPINT6: RWRegister<u32>,
    pub OTG_HS_DOEPTSIZ6: RWRegister<u32>,
    pub OTG_HS_DOEPDMA6: RWRegister<u32>,
    pub OTG_HS_DOEPCTL7: RWRegister<u32>,
    pub OTG_HS_DOEPINT7: RWRegister<u32>,
    pub OTG_HS_DOEPTSIZ7: RWRegister<u32>,
    pub OTG_HS_DOEPDMA7: RWRegister<u32>,
    pub OTG_HS_DOEPDMA8: RWRegister<u32>,
    pub OTG_HS_DOEPDMA9: RWRegister<u32>,
    pub OTG_HS_DOEPDMA10: RWRegister<u32>,
    pub OTG_HS_DOEPDMA11: RWRegister<u32>,
    pub OTG_HS_DOEPDMA12: RWRegister<u32>,
    pub OTG_HS_DOEPDMA13: RWRegister<u32>,
    pub OTG_HS_DOEPDMA14: RWRegister<u32>,
    pub OTG_HS_DOEPDMA15: RWRegister<u32>,
    // some fields omitted
}

Fields

OTG_HS_DCFG: RWRegister<u32>

OTG_HS device configuration register

OTG_HS_DCTL: RWRegister<u32>

OTG_HS device control register

OTG_HS_DSTS: RORegister<u32>

OTG_HS device status register

OTG_HS_DIEPMSK: RWRegister<u32>

OTG_HS device IN endpoint common interrupt mask register

OTG_HS_DOEPMSK: RWRegister<u32>

OTG_HS device OUT endpoint common interrupt mask register

OTG_HS_DAINT: RORegister<u32>

OTG_HS device all endpoints interrupt register

OTG_HS_DAINTMSK: RWRegister<u32>

OTG_HS all endpoints interrupt mask register

OTG_HS_DVBUSDIS: RWRegister<u32>

OTG_HS device VBUS discharge time register

OTG_HS_DVBUSPULSE: RWRegister<u32>

OTG_HS device VBUS pulsing time register

OTG_HS_DTHRCTL: RWRegister<u32>

OTG_HS Device threshold control register

OTG_HS_DIEPEMPMSK: RWRegister<u32>

OTG_HS device IN endpoint FIFO empty interrupt mask register

OTG_HS_DEACHINT: RWRegister<u32>

OTG_HS device each endpoint interrupt register

OTG_HS_DEACHINTMSK: RWRegister<u32>

OTG_HS device each endpoint interrupt register mask

OTG_HS_DIEPCTL0: RWRegister<u32>

OTG device endpoint-0 control register

OTG_HS_DIEPINT0: RWRegister<u32>

OTG device endpoint-0 interrupt register

OTG_HS_DIEPTSIZ0: RWRegister<u32>

OTG_HS device IN endpoint 0 transfer size register

OTG_HS_DIEPDMA0: RWRegister<u32>

OTG_HS device endpoint-1 DMA address register

OTG_HS_DTXFSTS0: RORegister<u32>

OTG_HS device IN endpoint transmit FIFO status register

OTG_HS_DIEPCTL1: RWRegister<u32>

OTG device endpoint-1 control register

OTG_HS_DIEPINT1: RWRegister<u32>

OTG device endpoint-1 interrupt register

OTG_HS_DIEPTSIZ1: RWRegister<u32>

OTG_HS device endpoint transfer size register

OTG_HS_DIEPDMA1: RWRegister<u32>

OTG_HS device endpoint-2 DMA address register

OTG_HS_DTXFSTS1: RORegister<u32>

OTG_HS device IN endpoint transmit FIFO status register

OTG_HS_DIEPCTL2: RWRegister<u32>

OTG device endpoint-2 control register

OTG_HS_DIEPINT2: RWRegister<u32>

OTG device endpoint-2 interrupt register

OTG_HS_DIEPTSIZ2: RWRegister<u32>

OTG_HS device endpoint transfer size register

OTG_HS_DIEPDMA2: RWRegister<u32>

OTG_HS device endpoint-3 DMA address register

OTG_HS_DTXFSTS2: RORegister<u32>

OTG_HS device IN endpoint transmit FIFO status register

OTG_HS_DIEPCTL3: RWRegister<u32>

OTG device endpoint-3 control register

OTG_HS_DIEPINT3: RWRegister<u32>

OTG device endpoint-3 interrupt register

OTG_HS_DIEPTSIZ3: RWRegister<u32>

OTG_HS device endpoint transfer size register

OTG_HS_DIEPDMA3: RWRegister<u32>

OTG_HS device endpoint-4 DMA address register

OTG_HS_DTXFSTS3: RORegister<u32>

OTG_HS device IN endpoint transmit FIFO status register

OTG_HS_DIEPCTL4: RWRegister<u32>

OTG device endpoint-4 control register

OTG_HS_DIEPINT4: RWRegister<u32>

OTG device endpoint-4 interrupt register

OTG_HS_DIEPTSIZ4: RWRegister<u32>

OTG_HS device endpoint transfer size register

OTG_HS_DIEPDMA4: RWRegister<u32>

OTG_HS device endpoint-5 DMA address register

OTG_HS_DTXFSTS4: RORegister<u32>

OTG_HS device IN endpoint transmit FIFO status register

OTG_HS_DIEPCTL5: RWRegister<u32>

OTG device endpoint-5 control register

OTG_HS_DIEPINT5: RWRegister<u32>

OTG device endpoint-5 interrupt register

OTG_HS_DIEPTSIZ5: RWRegister<u32>

OTG_HS device endpoint transfer size register

OTG_HS_DIEPDMA5: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DTXFSTS5: RORegister<u32>

OTG_HS device IN endpoint transmit FIFO status register

OTG_HS_DIEPCTL6: RWRegister<u32>

OTG device endpoint-6 control register

OTG_HS_DIEPINT6: RWRegister<u32>

OTG device endpoint-6 interrupt register

OTG_HS_DIEPTSIZ6: RWRegister<u32>

OTG_HS device endpoint transfer size register

OTG_HS_DIEPDMA6: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DTXFSTS6: RWRegister<u32>

OTG_HS device IN endpoint transmit FIFO status register

OTG_HS_DIEPCTL7: RWRegister<u32>

OTG device endpoint-7 control register

OTG_HS_DIEPINT7: RWRegister<u32>

OTG device endpoint-7 interrupt register

OTG_HS_DIEPTSIZ7: RWRegister<u32>

OTG_HS device endpoint transfer size register

OTG_HS_DIEPDMA7: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DTXFSTS7: RWRegister<u32>

OTG_HS device IN endpoint transmit FIFO status register

OTG_HS_DIEPDMA8: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DIEPDMA9: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DIEPDMA10: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DIEPDMA11: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DIEPDMA12: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DIEPDMA13: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DIEPDMA14: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DIEPDMA15: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPCTL0: RWRegister<u32>

OTG_HS device control OUT endpoint 0 control register

OTG_HS_DOEPINT0: RWRegister<u32>

OTG_HS device endpoint-0 interrupt register

OTG_HS_DOEPTSIZ0: RWRegister<u32>

OTG_HS device endpoint-0 transfer size register

OTG_HS_DOEPDMA0: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPCTL1: RWRegister<u32>

OTG device endpoint-1 control register

OTG_HS_DOEPINT1: RWRegister<u32>

OTG_HS device endpoint-1 interrupt register

OTG_HS_DOEPTSIZ1: RWRegister<u32>

OTG_HS device endpoint-1 transfer size register

OTG_HS_DOEPDMA1: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPCTL2: RWRegister<u32>

OTG device endpoint-2 control register

OTG_HS_DOEPINT2: RWRegister<u32>

OTG_HS device endpoint-2 interrupt register

OTG_HS_DOEPTSIZ2: RWRegister<u32>

OTG_HS device endpoint-2 transfer size register

OTG_HS_DOEPDMA2: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPCTL3: RWRegister<u32>

OTG device endpoint-3 control register

OTG_HS_DOEPINT3: RWRegister<u32>

OTG_HS device endpoint-3 interrupt register

OTG_HS_DOEPTSIZ3: RWRegister<u32>

OTG_HS device endpoint-3 transfer size register

OTG_HS_DOEPDMA3: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPCTL4: RWRegister<u32>

OTG device endpoint-4 control register

OTG_HS_DOEPINT4: RWRegister<u32>

OTG_HS device endpoint-4 interrupt register

OTG_HS_DOEPTSIZ4: RWRegister<u32>

OTG_HS device endpoint-4 transfer size register

OTG_HS_DOEPDMA4: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPCTL5: RWRegister<u32>

OTG device endpoint-5 control register

OTG_HS_DOEPINT5: RWRegister<u32>

OTG_HS device endpoint-5 interrupt register

OTG_HS_DOEPTSIZ5: RWRegister<u32>

OTG_HS device endpoint-5 transfer size register

OTG_HS_DOEPDMA5: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPCTL6: RWRegister<u32>

OTG device endpoint-6 control register

OTG_HS_DOEPINT6: RWRegister<u32>

OTG_HS device endpoint-6 interrupt register

OTG_HS_DOEPTSIZ6: RWRegister<u32>

OTG_HS device endpoint-6 transfer size register

OTG_HS_DOEPDMA6: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPCTL7: RWRegister<u32>

OTG device endpoint-7 control register

OTG_HS_DOEPINT7: RWRegister<u32>

OTG_HS device endpoint-7 interrupt register

OTG_HS_DOEPTSIZ7: RWRegister<u32>

OTG_HS device endpoint-7 transfer size register

OTG_HS_DOEPDMA7: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPDMA8: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPDMA9: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPDMA10: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPDMA11: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPDMA12: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPDMA13: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPDMA14: RWRegister<u32>

OTG Device channel-x DMA address register

OTG_HS_DOEPDMA15: RWRegister<u32>

OTG Device channel-x DMA address register

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

[src]

impl<T> Any for T where
T: 'static + ?Sized,

[src]

pub fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

[src]

impl<T> Borrow<T> for T where
T: ?Sized,

[src]

pub fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

[src]

impl<T> BorrowMut<T> for T where
T: ?Sized,

[src]

pub fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

[src]

impl<T> From<T> for T

[src]

pub fn from(t: T) -> T

Performs the conversion.

[src]

impl<T, U> Into for T where
U: From<T>,

[src]

pub fn into(self) -> U

Performs the conversion.

[src]

impl<T, U> TryFrom for T where
U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

[src]

pub fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

[src]

impl<T, U> TryInto for T where
U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.

[src]

pub fn try_into(self) -> Result<U, >::Error>

Performs the conversion.

Struct stm32ral::stm32f7::peripherals::otg_hs_device_v1::RegisterBlock[−][src]

Fields

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for T where
T: 'static + ?Sized,

pub fn type_id(&self) -> TypeId

impl<T> Borrow<T> for T where
T: ?Sized,

pub fn borrow(&self) -> &T

impl<T> BorrowMut<T> for T where
T: ?Sized,

pub fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

pub fn from(t: T) -> T

impl<T, U> Into<U> for T where
U: From<T>,

pub fn into(self) -> U

impl<T, U> TryFrom<U> for T where
U: Into<T>,

type Error = Infallible

pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for T where
U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Struct stm32ral::stm32f7::peripherals::otg_hs_device_v1::RegisterBlock[−][src]

Fields

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for T where T: 'static + ?Sized,

pub fn type_id(&self) -> TypeId

impl<T> Borrow<T> for T where T: ?Sized,

pub fn borrow(&self) -> &T

impl<T> BorrowMut<T> for T where T: ?Sized,

pub fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

pub fn from(t: T) -> T

impl<T, U> Into<U> for T where U: From<T>,

pub fn into(self) -> U

impl<T, U> TryFrom<U> for T where U: Into<T>,

type Error = Infallible

pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for T where U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

pub fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

impl<T> Any for T where
T: 'static + ?Sized,

impl<T> Borrow<T> for T where
T: ?Sized,

impl<T> BorrowMut<T> for T where
T: ?Sized,

impl<T, U> Into<U> for T where
U: From<T>,

impl<T, U> TryFrom<U> for T where
U: Into<T>,

impl<T, U> TryInto<U> for T where
U: TryFrom<T>,