Struct stm32ral::stm32f4::stm32f469::otg_hs_device::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 65 fields
pub DCFG: RWRegister<u32>,
pub DCTL: RWRegister<u32>,
pub DSTS: RORegister<u32>,
pub DIEPMSK: RWRegister<u32>,
pub DOEPMSK: RWRegister<u32>,
pub DAINT: RORegister<u32>,
pub DAINTMSK: RWRegister<u32>,
pub DVBUSDIS: RWRegister<u32>,
pub DVBUSPULSE: RWRegister<u32>,
pub DTHRCTL: RWRegister<u32>,
pub DIEPEMPMSK: RWRegister<u32>,
pub DEACHINT: RWRegister<u32>,
pub DEACHINTMSK: RWRegister<u32>,
pub DIEPEACHMSK1: RWRegister<u32>,
pub DOEPEACHMSK1: RWRegister<u32>,
pub DIEPCTL0: RWRegister<u32>,
pub DIEPINT0: RWRegister<u32>,
pub DIEPTSIZ0: RWRegister<u32>,
pub DIEPDMA1: UnsafeRWRegister<u32>,
pub DTXFSTS0: RORegister<u32>,
pub DIEPCTL1: RWRegister<u32>,
pub DIEPINT1: RWRegister<u32>,
pub DIEPTSIZ1: RWRegister<u32>,
pub DIEPDMA2: UnsafeRWRegister<u32>,
pub DTXFSTS1: RORegister<u32>,
pub DIEPCTL2: RWRegister<u32>,
pub DIEPINT2: RWRegister<u32>,
pub DIEPTSIZ2: RWRegister<u32>,
pub DIEPDMA3: UnsafeRWRegister<u32>,
pub DTXFSTS2: RORegister<u32>,
pub DIEPCTL3: RWRegister<u32>,
pub DIEPINT3: RWRegister<u32>,
pub DIEPTSIZ3: RWRegister<u32>,
pub DIEPDMA4: UnsafeRWRegister<u32>,
pub DTXFSTS3: RORegister<u32>,
pub DIEPCTL4: RWRegister<u32>,
pub DIEPINT4: RWRegister<u32>,
pub DIEPTSIZ4: RWRegister<u32>,
pub DIEPDMA5: UnsafeRWRegister<u32>,
pub DTXFSTS4: RORegister<u32>,
pub DIEPCTL5: RWRegister<u32>,
pub DIEPINT5: RWRegister<u32>,
pub DIEPTSIZ5: RWRegister<u32>,
pub DTXFSTS5: RORegister<u32>,
pub DIEPCTL6: RWRegister<u32>,
pub DIEPINT6: RWRegister<u32>,
pub DIEPCTL7: RWRegister<u32>,
pub DIEPINT7: RWRegister<u32>,
pub DOEPCTL0: RWRegister<u32>,
pub DOEPINT0: RWRegister<u32>,
pub DOEPTSIZ0: RWRegister<u32>,
pub DOEPCTL1: RWRegister<u32>,
pub DOEPINT1: RWRegister<u32>,
pub DOEPTSIZ1: RWRegister<u32>,
pub DOEPCTL2: RWRegister<u32>,
pub DOEPINT2: RWRegister<u32>,
pub DOEPTSIZ2: RWRegister<u32>,
pub DOEPCTL3: RWRegister<u32>,
pub DOEPINT3: RWRegister<u32>,
pub DOEPTSIZ3: RWRegister<u32>,
pub DOEPINT4: RWRegister<u32>,
pub DOEPTSIZ4: RWRegister<u32>,
pub DOEPINT5: RWRegister<u32>,
pub DOEPINT6: RWRegister<u32>,
pub DOEPINT7: RWRegister<u32>,
// some fields omitted
}
Fields
DCFG: RWRegister<u32>
OTG_HS device configuration register
DCTL: RWRegister<u32>
OTG_HS device control register
DSTS: RORegister<u32>
OTG_HS device status register
DIEPMSK: RWRegister<u32>
OTG_HS device IN endpoint common interrupt mask register
DOEPMSK: RWRegister<u32>
OTG_HS device OUT endpoint common interrupt mask register
DAINT: RORegister<u32>
OTG_HS device all endpoints interrupt register
DAINTMSK: RWRegister<u32>
OTG_HS all endpoints interrupt mask register
DVBUSDIS: RWRegister<u32>
OTG_HS device VBUS discharge time register
DVBUSPULSE: RWRegister<u32>
OTG_HS device VBUS pulsing time register
DTHRCTL: RWRegister<u32>
OTG_HS Device threshold control register
DIEPEMPMSK: RWRegister<u32>
OTG_HS device IN endpoint FIFO empty interrupt mask register
DEACHINT: RWRegister<u32>
OTG_HS device each endpoint interrupt register
DEACHINTMSK: RWRegister<u32>
OTG_HS device each endpoint interrupt register mask
DIEPEACHMSK1: RWRegister<u32>
OTG_HS device each in endpoint-1 interrupt register
DOEPEACHMSK1: RWRegister<u32>
OTG_HS device each OUT endpoint-1 interrupt register
DIEPCTL0: RWRegister<u32>
OTG device endpoint-0 control register
DIEPINT0: RWRegister<u32>
OTG device endpoint-0 interrupt register
DIEPTSIZ0: RWRegister<u32>
OTG_HS device IN endpoint 0 transfer size register
DIEPDMA1: UnsafeRWRegister<u32>
OTG_HS device endpoint-1 DMA address register
DTXFSTS0: RORegister<u32>
OTG_HS device IN endpoint transmit FIFO status register
DIEPCTL1: RWRegister<u32>
OTG device endpoint-1 control register
DIEPINT1: RWRegister<u32>
OTG device endpoint-1 interrupt register
DIEPTSIZ1: RWRegister<u32>
OTG_HS device endpoint transfer size register
DIEPDMA2: UnsafeRWRegister<u32>
OTG_HS device endpoint-2 DMA address register
DTXFSTS1: RORegister<u32>
OTG_HS device IN endpoint transmit FIFO status register
DIEPCTL2: RWRegister<u32>
OTG device endpoint-2 control register
DIEPINT2: RWRegister<u32>
OTG device endpoint-2 interrupt register
DIEPTSIZ2: RWRegister<u32>
OTG_HS device endpoint transfer size register
DIEPDMA3: UnsafeRWRegister<u32>
OTG_HS device endpoint-3 DMA address register
DTXFSTS2: RORegister<u32>
OTG_HS device IN endpoint transmit FIFO status register
DIEPCTL3: RWRegister<u32>
OTG device endpoint-3 control register
DIEPINT3: RWRegister<u32>
OTG device endpoint-3 interrupt register
DIEPTSIZ3: RWRegister<u32>
OTG_HS device endpoint transfer size register
DIEPDMA4: UnsafeRWRegister<u32>
OTG_HS device endpoint-4 DMA address register
DTXFSTS3: RORegister<u32>
OTG_HS device IN endpoint transmit FIFO status register
DIEPCTL4: RWRegister<u32>
OTG device endpoint-4 control register
DIEPINT4: RWRegister<u32>
OTG device endpoint-4 interrupt register
DIEPTSIZ4: RWRegister<u32>
OTG_HS device endpoint transfer size register
DIEPDMA5: UnsafeRWRegister<u32>
OTG_HS device endpoint-5 DMA address register
DTXFSTS4: RORegister<u32>
OTG_HS device IN endpoint transmit FIFO status register
DIEPCTL5: RWRegister<u32>
OTG device endpoint-5 control register
DIEPINT5: RWRegister<u32>
OTG device endpoint-5 interrupt register
DIEPTSIZ5: RWRegister<u32>
OTG_HS device endpoint transfer size register
DTXFSTS5: RORegister<u32>
OTG_HS device IN endpoint transmit FIFO status register
DIEPCTL6: RWRegister<u32>
OTG device endpoint-6 control register
DIEPINT6: RWRegister<u32>
OTG device endpoint-6 interrupt register
DIEPCTL7: RWRegister<u32>
OTG device endpoint-7 control register
DIEPINT7: RWRegister<u32>
OTG device endpoint-7 interrupt register
DOEPCTL0: RWRegister<u32>
OTG_HS device control OUT endpoint 0 control register
DOEPINT0: RWRegister<u32>
OTG_HS device endpoint-0 interrupt register
DOEPTSIZ0: RWRegister<u32>
OTG_HS device endpoint-1 transfer size register
DOEPCTL1: RWRegister<u32>
OTG device endpoint-1 control register
DOEPINT1: RWRegister<u32>
OTG_HS device endpoint-1 interrupt register
DOEPTSIZ1: RWRegister<u32>
OTG_HS device endpoint-2 transfer size register
DOEPCTL2: RWRegister<u32>
OTG device endpoint-2 control register
DOEPINT2: RWRegister<u32>
OTG_HS device endpoint-2 interrupt register
DOEPTSIZ2: RWRegister<u32>
OTG_HS device endpoint-3 transfer size register
DOEPCTL3: RWRegister<u32>
OTG device endpoint-3 control register
DOEPINT3: RWRegister<u32>
OTG_HS device endpoint-3 interrupt register
DOEPTSIZ3: RWRegister<u32>
OTG_HS device endpoint-4 transfer size register
DOEPINT4: RWRegister<u32>
OTG_HS device endpoint-4 interrupt register
DOEPTSIZ4: RWRegister<u32>
OTG_HS device endpoint-5 transfer size register
DOEPINT5: RWRegister<u32>
OTG_HS device endpoint-5 interrupt register
DOEPINT6: RWRegister<u32>
OTG_HS device endpoint-6 interrupt register
DOEPINT7: RWRegister<u32>
OTG_HS device endpoint-7 interrupt register