Struct stm32ral::stm32f1::stm32f103::sdio::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 18 fields
pub POWER: RWRegister<u32>,
pub CLKCR: RWRegister<u32>,
pub ARG: RWRegister<u32>,
pub CMD: RWRegister<u32>,
pub RESPCMD: RORegister<u32>,
pub RESPI1: RORegister<u32>,
pub RESP2: RORegister<u32>,
pub RESP3: RORegister<u32>,
pub RESP4: RORegister<u32>,
pub DTIMER: RWRegister<u32>,
pub DLEN: RWRegister<u32>,
pub DCTRL: RWRegister<u32>,
pub DCOUNT: RORegister<u32>,
pub STA: RORegister<u32>,
pub ICR: RWRegister<u32>,
pub MASK: RWRegister<u32>,
pub FIFOCNT: RORegister<u32>,
pub FIFO: RWRegister<u32>,
// some fields omitted
}
Fields
POWER: RWRegister<u32>
Bits 1:0 = PWRCTRL: Power supply control bits
CLKCR: RWRegister<u32>
SDI clock control register (SDIO_CLKCR)
ARG: RWRegister<u32>
Bits 31:0 = : Command argument
CMD: RWRegister<u32>
SDIO command register (SDIO_CMD)
RESPCMD: RORegister<u32>
SDIO command register
RESPI1: RORegister<u32>
Bits 31:0 = CARDSTATUS1
RESP2: RORegister<u32>
Bits 31:0 = CARDSTATUS2
RESP3: RORegister<u32>
Bits 31:0 = CARDSTATUS2
RESP4: RORegister<u32>
Bits 31:0 = CARDSTATUS2
DTIMER: RWRegister<u32>
Bits 31:0 = DATATIME: Data timeout period
DLEN: RWRegister<u32>
Bits 24:0 = DATALENGTH: Data length value
DCTRL: RWRegister<u32>
SDIO data control register (SDIO_DCTRL)
DCOUNT: RORegister<u32>
Bits 24:0 = DATACOUNT: Data count value
STA: RORegister<u32>
SDIO status register (SDIO_STA)
ICR: RWRegister<u32>
SDIO interrupt clear register (SDIO_ICR)
MASK: RWRegister<u32>
SDIO mask register (SDIO_MASK)
FIFOCNT: RORegister<u32>
Bits 23:0 = FIFOCOUNT: Remaining number of words to be written to or read from the FIFO
FIFO: RWRegister<u32>
bits 31:0 = FIFOData: Receive and transmit FIFO data