Struct stm32ral::stm32f1::stm32f103::can::RegisterBlock[][src]

#[repr(C)]
pub struct RegisterBlock {
Show 61 fields pub MCR: RWRegister<u32>, pub MSR: RWRegister<u32>, pub TSR: RWRegister<u32>, pub RF0R: RWRegister<u32>, pub RF1R: RWRegister<u32>, pub IER: RWRegister<u32>, pub ESR: RWRegister<u32>, pub BTR: RWRegister<u32>, pub TIR0: RWRegister<u32>, pub TDTR0: RWRegister<u32>, pub TDLR0: RWRegister<u32>, pub TDHR0: RWRegister<u32>, pub TIR1: RWRegister<u32>, pub TDTR1: RWRegister<u32>, pub TDLR1: RWRegister<u32>, pub TDHR1: RWRegister<u32>, pub TIR2: RWRegister<u32>, pub TDTR2: RWRegister<u32>, pub TDLR2: RWRegister<u32>, pub TDHR2: RWRegister<u32>, pub RIR0: RORegister<u32>, pub RDTR0: RORegister<u32>, pub RDLR0: RORegister<u32>, pub RDHR0: RORegister<u32>, pub RIR1: RORegister<u32>, pub RDTR1: RORegister<u32>, pub RDLR1: RORegister<u32>, pub RDHR1: RORegister<u32>, pub FMR: RWRegister<u32>, pub FM1R: RWRegister<u32>, pub FS1R: RWRegister<u32>, pub FFA1R: RWRegister<u32>, pub FA1R: RWRegister<u32>, pub FR10: RWRegister<u32>, pub FR20: RWRegister<u32>, pub FR11: RWRegister<u32>, pub FR21: RWRegister<u32>, pub FR12: RWRegister<u32>, pub FR22: RWRegister<u32>, pub FR13: RWRegister<u32>, pub FR23: RWRegister<u32>, pub FR14: RWRegister<u32>, pub FR24: RWRegister<u32>, pub FR15: RWRegister<u32>, pub FR25: RWRegister<u32>, pub FR16: RWRegister<u32>, pub FR26: RWRegister<u32>, pub FR17: RWRegister<u32>, pub FR27: RWRegister<u32>, pub FR18: RWRegister<u32>, pub FR28: RWRegister<u32>, pub FR19: RWRegister<u32>, pub FR29: RWRegister<u32>, pub FR110: RWRegister<u32>, pub FR210: RWRegister<u32>, pub FR111: RWRegister<u32>, pub FR211: RWRegister<u32>, pub FR112: RWRegister<u32>, pub FR212: RWRegister<u32>, pub FR113: RWRegister<u32>, pub FR213: RWRegister<u32>, // some fields omitted
}

Fields

MCR: RWRegister<u32>

CAN_MCR

MSR: RWRegister<u32>

CAN_MSR

TSR: RWRegister<u32>

CAN_TSR

RF0R: RWRegister<u32>

CAN_RF%sR

RF1R: RWRegister<u32>

CAN_RF%sR

IER: RWRegister<u32>

CAN_IER

ESR: RWRegister<u32>

CAN_ESR

BTR: RWRegister<u32>

CAN_BTR

TIR0: RWRegister<u32>

CAN_TI0R

TDTR0: RWRegister<u32>

CAN_TDT0R

TDLR0: RWRegister<u32>

CAN_TDL0R

TDHR0: RWRegister<u32>

CAN_TDH0R

TIR1: RWRegister<u32>

CAN_TI0R

TDTR1: RWRegister<u32>

CAN_TDT0R

TDLR1: RWRegister<u32>

CAN_TDL0R

TDHR1: RWRegister<u32>

CAN_TDH0R

TIR2: RWRegister<u32>

CAN_TI0R

TDTR2: RWRegister<u32>

CAN_TDT0R

TDLR2: RWRegister<u32>

CAN_TDL0R

TDHR2: RWRegister<u32>

CAN_TDH0R

RIR0: RORegister<u32>

CAN_RI0R

RDTR0: RORegister<u32>

CAN_RDT0R

RDLR0: RORegister<u32>

CAN_RDL0R

RDHR0: RORegister<u32>

CAN_RDH0R

RIR1: RORegister<u32>

CAN_RI0R

RDTR1: RORegister<u32>

CAN_RDT0R

RDLR1: RORegister<u32>

CAN_RDL0R

RDHR1: RORegister<u32>

CAN_RDH0R

FMR: RWRegister<u32>

CAN_FMR

FM1R: RWRegister<u32>

CAN_FM1R

FS1R: RWRegister<u32>

CAN_FS1R

FFA1R: RWRegister<u32>

CAN_FFA1R

FA1R: RWRegister<u32>

CAN_FA1R

FR10: RWRegister<u32>

Filter bank 0 register 1

FR20: RWRegister<u32>

Filter bank 0 register 2

FR11: RWRegister<u32>

Filter bank 0 register 1

FR21: RWRegister<u32>

Filter bank 0 register 2

FR12: RWRegister<u32>

Filter bank 0 register 1

FR22: RWRegister<u32>

Filter bank 0 register 2

FR13: RWRegister<u32>

Filter bank 0 register 1

FR23: RWRegister<u32>

Filter bank 0 register 2

FR14: RWRegister<u32>

Filter bank 0 register 1

FR24: RWRegister<u32>

Filter bank 0 register 2

FR15: RWRegister<u32>

Filter bank 0 register 1

FR25: RWRegister<u32>

Filter bank 0 register 2

FR16: RWRegister<u32>

Filter bank 0 register 1

FR26: RWRegister<u32>

Filter bank 0 register 2

FR17: RWRegister<u32>

Filter bank 0 register 1

FR27: RWRegister<u32>

Filter bank 0 register 2

FR18: RWRegister<u32>

Filter bank 0 register 1

FR28: RWRegister<u32>

Filter bank 0 register 2

FR19: RWRegister<u32>

Filter bank 0 register 1

FR29: RWRegister<u32>

Filter bank 0 register 2

FR110: RWRegister<u32>

Filter bank 0 register 1

FR210: RWRegister<u32>

Filter bank 0 register 2

FR111: RWRegister<u32>

Filter bank 0 register 1

FR211: RWRegister<u32>

Filter bank 0 register 2

FR112: RWRegister<u32>

Filter bank 0 register 1

FR212: RWRegister<u32>

Filter bank 0 register 2

FR113: RWRegister<u32>

Filter bank 0 register 1

FR213: RWRegister<u32>

Filter bank 0 register 2

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Performs the conversion.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.