Struct stm32ral::stm32f1::stm32f101::rcc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {
pub CR: RWRegister<u32>,
pub CFGR: RWRegister<u32>,
pub CIR: RWRegister<u32>,
pub APB2RSTR: RWRegister<u32>,
pub APB1RSTR: RWRegister<u32>,
pub AHBENR: RWRegister<u32>,
pub APB2ENR: RWRegister<u32>,
pub APB1ENR: RWRegister<u32>,
pub BDCR: RWRegister<u32>,
pub CSR: RWRegister<u32>,
}
Fields
CR: RWRegister<u32>
Clock control register
CFGR: RWRegister<u32>
Clock configuration register (RCC_CFGR)
CIR: RWRegister<u32>
Clock interrupt register (RCC_CIR)
APB2RSTR: RWRegister<u32>
APB2 peripheral reset register (RCC_APB2RSTR)
APB1RSTR: RWRegister<u32>
APB1 peripheral reset register (RCC_APB1RSTR)
AHBENR: RWRegister<u32>
AHB Peripheral Clock enable register (RCC_AHBENR)
APB2ENR: RWRegister<u32>
APB2 peripheral clock enable register (RCC_APB2ENR)
APB1ENR: RWRegister<u32>
APB1 peripheral clock enable register (RCC_APB1ENR)
BDCR: RWRegister<u32>
Backup domain control register (RCC_BDCR)
CSR: RWRegister<u32>
Control/status register (RCC_CSR)