Module stm32mp1::stm32mp157::rcc::rcc_pll2cfgr1

source · [−]
Expand description

This register is used to configure the PLL2. If TZEN = , this register can only be modified in secure mode. Write access to this register is not allowed during the clock restore sequence. See Section: The clock restore sequence description for details.

Structs

R

Register RCC_PLL2CFGR1 reader

RCC_PLL2CFGR1_SPEC

This register is used to configure the PLL2. If TZEN = , this register can only be modified in secure mode. Write access to this register is not allowed during the clock restore sequence. See Section: The clock restore sequence description for details.

W

Register RCC_PLL2CFGR1 writer

Type Definitions

DIVM2_R

Field DIVM2 reader - DIVM2

DIVM2_W

Field DIVM2 writer - DIVM2

DIVN_R

Field DIVN reader - DIVN

DIVN_W

Field DIVN writer - DIVN