stm32mp1/stm32mp157/sdmmc1/
acktimer.rs

1///Register `ACKTIMER` reader
2pub type R = crate::R<ACKTIMERrs>;
3///Register `ACKTIMER` writer
4pub type W = crate::W<ACKTIMERrs>;
5///Field `ACKTIME` reader - ACKTIME
6pub type ACKTIME_R = crate::FieldReader<u32>;
7///Field `ACKTIME` writer - ACKTIME
8pub type ACKTIME_W<'a, REG> = crate::FieldWriter<'a, REG, 25, u32>;
9impl R {
10    ///Bits 0:24 - ACKTIME
11    #[inline(always)]
12    pub fn acktime(&self) -> ACKTIME_R {
13        ACKTIME_R::new(self.bits & 0x01ff_ffff)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("ACKTIMER")
19            .field("acktime", &self.acktime())
20            .finish()
21    }
22}
23impl W {
24    ///Bits 0:24 - ACKTIME
25    #[inline(always)]
26    pub fn acktime(&mut self) -> ACKTIME_W<ACKTIMERrs> {
27        ACKTIME_W::new(self, 0)
28    }
29}
30/**The SDMMC_ACKTIMER register contains the acknowledgment timeout period, in SDMMC_CK bus clock periods. A counter loads the value from the SDMMC_ACKTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_Ack state. If the timer reaches 0 while the DPSM is in this states, the acknowledgment timeout status flag is set.
31
32You can [`read`](crate::Reg::read) this register and get [`acktimer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acktimer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
33
34See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#SDMMC1:ACKTIMER)*/
35pub struct ACKTIMERrs;
36impl crate::RegisterSpec for ACKTIMERrs {
37    type Ux = u32;
38}
39///`read()` method returns [`acktimer::R`](R) reader structure
40impl crate::Readable for ACKTIMERrs {}
41///`write(|w| ..)` method takes [`acktimer::W`](W) writer structure
42impl crate::Writable for ACKTIMERrs {
43    type Safety = crate::Unsafe;
44}
45///`reset()` method sets ACKTIMER to value 0
46impl crate::Resettable for ACKTIMERrs {}
stm32mp1/stm32mp157/sdmmc1/acktimer.rs

stm32mp1/stm32mp157/sdmmc1/
acktimer.rs
