stm32mp1/stm32mp157/quadspi/
cr.rs

1///Register `CR` reader
2pub type R = crate::R<CRrs>;
3///Register `CR` writer
4pub type W = crate::W<CRrs>;
5///Field `EN` reader - EN
6pub type EN_R = crate::BitReader;
7///Field `EN` writer - EN
8pub type EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `ABORT` reader - ABORT
10pub type ABORT_R = crate::BitReader;
11///Field `ABORT` writer - ABORT
12pub type ABORT_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `DMAEN` reader - DMAEN
14pub type DMAEN_R = crate::BitReader;
15///Field `DMAEN` writer - DMAEN
16pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `TCEN` reader - TCEN
18pub type TCEN_R = crate::BitReader;
19///Field `TCEN` writer - TCEN
20pub type TCEN_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `SSHIFT` reader - SSHIFT
22pub type SSHIFT_R = crate::BitReader;
23///Field `SSHIFT` writer - SSHIFT
24pub type SSHIFT_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `DFM` reader - DFM
26pub type DFM_R = crate::BitReader;
27///Field `DFM` writer - DFM
28pub type DFM_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `FSEL` reader - FSEL
30pub type FSEL_R = crate::BitReader;
31///Field `FSEL` writer - FSEL
32pub type FSEL_W<'a, REG> = crate::BitWriter<'a, REG>;
33///Field `FTHRES` reader - FTHRES
34pub type FTHRES_R = crate::FieldReader;
35///Field `FTHRES` writer - FTHRES
36pub type FTHRES_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
37///Field `TEIE` reader - TEIE
38pub type TEIE_R = crate::BitReader;
39///Field `TEIE` writer - TEIE
40pub type TEIE_W<'a, REG> = crate::BitWriter<'a, REG>;
41///Field `TCIE` reader - TCIE
42pub type TCIE_R = crate::BitReader;
43///Field `TCIE` writer - TCIE
44pub type TCIE_W<'a, REG> = crate::BitWriter<'a, REG>;
45///Field `FTIE` reader - FTIE
46pub type FTIE_R = crate::BitReader;
47///Field `FTIE` writer - FTIE
48pub type FTIE_W<'a, REG> = crate::BitWriter<'a, REG>;
49///Field `SMIE` reader - SMIE
50pub type SMIE_R = crate::BitReader;
51///Field `SMIE` writer - SMIE
52pub type SMIE_W<'a, REG> = crate::BitWriter<'a, REG>;
53///Field `TOIE` reader - TOIE
54pub type TOIE_R = crate::BitReader;
55///Field `TOIE` writer - TOIE
56pub type TOIE_W<'a, REG> = crate::BitWriter<'a, REG>;
57///Field `APMS` reader - APMS
58pub type APMS_R = crate::BitReader;
59///Field `APMS` writer - APMS
60pub type APMS_W<'a, REG> = crate::BitWriter<'a, REG>;
61///Field `PMM` reader - PMM
62pub type PMM_R = crate::BitReader;
63///Field `PMM` writer - PMM
64pub type PMM_W<'a, REG> = crate::BitWriter<'a, REG>;
65///Field `PRESCALER` reader - PRESCALER
66pub type PRESCALER_R = crate::FieldReader;
67///Field `PRESCALER` writer - PRESCALER
68pub type PRESCALER_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
69impl R {
70    ///Bit 0 - EN
71    #[inline(always)]
72    pub fn en(&self) -> EN_R {
73        EN_R::new((self.bits & 1) != 0)
74    }
75    ///Bit 1 - ABORT
76    #[inline(always)]
77    pub fn abort(&self) -> ABORT_R {
78        ABORT_R::new(((self.bits >> 1) & 1) != 0)
79    }
80    ///Bit 2 - DMAEN
81    #[inline(always)]
82    pub fn dmaen(&self) -> DMAEN_R {
83        DMAEN_R::new(((self.bits >> 2) & 1) != 0)
84    }
85    ///Bit 3 - TCEN
86    #[inline(always)]
87    pub fn tcen(&self) -> TCEN_R {
88        TCEN_R::new(((self.bits >> 3) & 1) != 0)
89    }
90    ///Bit 4 - SSHIFT
91    #[inline(always)]
92    pub fn sshift(&self) -> SSHIFT_R {
93        SSHIFT_R::new(((self.bits >> 4) & 1) != 0)
94    }
95    ///Bit 6 - DFM
96    #[inline(always)]
97    pub fn dfm(&self) -> DFM_R {
98        DFM_R::new(((self.bits >> 6) & 1) != 0)
99    }
100    ///Bit 7 - FSEL
101    #[inline(always)]
102    pub fn fsel(&self) -> FSEL_R {
103        FSEL_R::new(((self.bits >> 7) & 1) != 0)
104    }
105    ///Bits 8:11 - FTHRES
106    #[inline(always)]
107    pub fn fthres(&self) -> FTHRES_R {
108        FTHRES_R::new(((self.bits >> 8) & 0x0f) as u8)
109    }
110    ///Bit 16 - TEIE
111    #[inline(always)]
112    pub fn teie(&self) -> TEIE_R {
113        TEIE_R::new(((self.bits >> 16) & 1) != 0)
114    }
115    ///Bit 17 - TCIE
116    #[inline(always)]
117    pub fn tcie(&self) -> TCIE_R {
118        TCIE_R::new(((self.bits >> 17) & 1) != 0)
119    }
120    ///Bit 18 - FTIE
121    #[inline(always)]
122    pub fn ftie(&self) -> FTIE_R {
123        FTIE_R::new(((self.bits >> 18) & 1) != 0)
124    }
125    ///Bit 19 - SMIE
126    #[inline(always)]
127    pub fn smie(&self) -> SMIE_R {
128        SMIE_R::new(((self.bits >> 19) & 1) != 0)
129    }
130    ///Bit 20 - TOIE
131    #[inline(always)]
132    pub fn toie(&self) -> TOIE_R {
133        TOIE_R::new(((self.bits >> 20) & 1) != 0)
134    }
135    ///Bit 22 - APMS
136    #[inline(always)]
137    pub fn apms(&self) -> APMS_R {
138        APMS_R::new(((self.bits >> 22) & 1) != 0)
139    }
140    ///Bit 23 - PMM
141    #[inline(always)]
142    pub fn pmm(&self) -> PMM_R {
143        PMM_R::new(((self.bits >> 23) & 1) != 0)
144    }
145    ///Bits 24:31 - PRESCALER
146    #[inline(always)]
147    pub fn prescaler(&self) -> PRESCALER_R {
148        PRESCALER_R::new(((self.bits >> 24) & 0xff) as u8)
149    }
150}
151impl core::fmt::Debug for R {
152    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
153        f.debug_struct("CR")
154            .field("en", &self.en())
155            .field("abort", &self.abort())
156            .field("dmaen", &self.dmaen())
157            .field("tcen", &self.tcen())
158            .field("sshift", &self.sshift())
159            .field("dfm", &self.dfm())
160            .field("fsel", &self.fsel())
161            .field("fthres", &self.fthres())
162            .field("teie", &self.teie())
163            .field("tcie", &self.tcie())
164            .field("ftie", &self.ftie())
165            .field("smie", &self.smie())
166            .field("toie", &self.toie())
167            .field("apms", &self.apms())
168            .field("pmm", &self.pmm())
169            .field("prescaler", &self.prescaler())
170            .finish()
171    }
172}
173impl W {
174    ///Bit 0 - EN
175    #[inline(always)]
176    pub fn en(&mut self) -> EN_W<CRrs> {
177        EN_W::new(self, 0)
178    }
179    ///Bit 1 - ABORT
180    #[inline(always)]
181    pub fn abort(&mut self) -> ABORT_W<CRrs> {
182        ABORT_W::new(self, 1)
183    }
184    ///Bit 2 - DMAEN
185    #[inline(always)]
186    pub fn dmaen(&mut self) -> DMAEN_W<CRrs> {
187        DMAEN_W::new(self, 2)
188    }
189    ///Bit 3 - TCEN
190    #[inline(always)]
191    pub fn tcen(&mut self) -> TCEN_W<CRrs> {
192        TCEN_W::new(self, 3)
193    }
194    ///Bit 4 - SSHIFT
195    #[inline(always)]
196    pub fn sshift(&mut self) -> SSHIFT_W<CRrs> {
197        SSHIFT_W::new(self, 4)
198    }
199    ///Bit 6 - DFM
200    #[inline(always)]
201    pub fn dfm(&mut self) -> DFM_W<CRrs> {
202        DFM_W::new(self, 6)
203    }
204    ///Bit 7 - FSEL
205    #[inline(always)]
206    pub fn fsel(&mut self) -> FSEL_W<CRrs> {
207        FSEL_W::new(self, 7)
208    }
209    ///Bits 8:11 - FTHRES
210    #[inline(always)]
211    pub fn fthres(&mut self) -> FTHRES_W<CRrs> {
212        FTHRES_W::new(self, 8)
213    }
214    ///Bit 16 - TEIE
215    #[inline(always)]
216    pub fn teie(&mut self) -> TEIE_W<CRrs> {
217        TEIE_W::new(self, 16)
218    }
219    ///Bit 17 - TCIE
220    #[inline(always)]
221    pub fn tcie(&mut self) -> TCIE_W<CRrs> {
222        TCIE_W::new(self, 17)
223    }
224    ///Bit 18 - FTIE
225    #[inline(always)]
226    pub fn ftie(&mut self) -> FTIE_W<CRrs> {
227        FTIE_W::new(self, 18)
228    }
229    ///Bit 19 - SMIE
230    #[inline(always)]
231    pub fn smie(&mut self) -> SMIE_W<CRrs> {
232        SMIE_W::new(self, 19)
233    }
234    ///Bit 20 - TOIE
235    #[inline(always)]
236    pub fn toie(&mut self) -> TOIE_W<CRrs> {
237        TOIE_W::new(self, 20)
238    }
239    ///Bit 22 - APMS
240    #[inline(always)]
241    pub fn apms(&mut self) -> APMS_W<CRrs> {
242        APMS_W::new(self, 22)
243    }
244    ///Bit 23 - PMM
245    #[inline(always)]
246    pub fn pmm(&mut self) -> PMM_W<CRrs> {
247        PMM_W::new(self, 23)
248    }
249    ///Bits 24:31 - PRESCALER
250    #[inline(always)]
251    pub fn prescaler(&mut self) -> PRESCALER_W<CRrs> {
252        PRESCALER_W::new(self, 24)
253    }
254}
255/**QUADSPI control register
256
257You can [`read`](crate::Reg::read) this register and get [`cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
258
259See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#QUADSPI:CR)*/
260pub struct CRrs;
261impl crate::RegisterSpec for CRrs {
262    type Ux = u32;
263}
264///`read()` method returns [`cr::R`](R) reader structure
265impl crate::Readable for CRrs {}
266///`write(|w| ..)` method takes [`cr::W`](W) writer structure
267impl crate::Writable for CRrs {
268    type Safety = crate::Unsafe;
269}
270///`reset()` method sets CR to value 0
271impl crate::Resettable for CRrs {}
stm32mp1/stm32mp157/quadspi/cr.rs

stm32mp1/stm32mp157/quadspi/
cr.rs
