stm32mp1/stm32mp157/ddrctrl/
zqctl0.rs

1///Register `ZQCTL0` reader
2pub type R = crate::R<ZQCTL0rs>;
3///Register `ZQCTL0` writer
4pub type W = crate::W<ZQCTL0rs>;
5///Field `T_ZQ_SHORT_NOP` reader - T_ZQ_SHORT_NOP
6pub type T_ZQ_SHORT_NOP_R = crate::FieldReader<u16>;
7///Field `T_ZQ_SHORT_NOP` writer - T_ZQ_SHORT_NOP
8pub type T_ZQ_SHORT_NOP_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9///Field `T_ZQ_LONG_NOP` reader - T_ZQ_LONG_NOP
10pub type T_ZQ_LONG_NOP_R = crate::FieldReader<u16>;
11///Field `T_ZQ_LONG_NOP` writer - T_ZQ_LONG_NOP
12pub type T_ZQ_LONG_NOP_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
13///Field `ZQ_RESISTOR_SHARED` reader - ZQ_RESISTOR_SHARED
14pub type ZQ_RESISTOR_SHARED_R = crate::BitReader;
15///Field `ZQ_RESISTOR_SHARED` writer - ZQ_RESISTOR_SHARED
16pub type ZQ_RESISTOR_SHARED_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `DIS_SRX_ZQCL` reader - DIS_SRX_ZQCL
18pub type DIS_SRX_ZQCL_R = crate::BitReader;
19///Field `DIS_SRX_ZQCL` writer - DIS_SRX_ZQCL
20pub type DIS_SRX_ZQCL_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `DIS_AUTO_ZQ` reader - DIS_AUTO_ZQ
22pub type DIS_AUTO_ZQ_R = crate::BitReader;
23///Field `DIS_AUTO_ZQ` writer - DIS_AUTO_ZQ
24pub type DIS_AUTO_ZQ_W<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26    ///Bits 0:9 - T_ZQ_SHORT_NOP
27    #[inline(always)]
28    pub fn t_zq_short_nop(&self) -> T_ZQ_SHORT_NOP_R {
29        T_ZQ_SHORT_NOP_R::new((self.bits & 0x03ff) as u16)
30    }
31    ///Bits 16:26 - T_ZQ_LONG_NOP
32    #[inline(always)]
33    pub fn t_zq_long_nop(&self) -> T_ZQ_LONG_NOP_R {
34        T_ZQ_LONG_NOP_R::new(((self.bits >> 16) & 0x07ff) as u16)
35    }
36    ///Bit 29 - ZQ_RESISTOR_SHARED
37    #[inline(always)]
38    pub fn zq_resistor_shared(&self) -> ZQ_RESISTOR_SHARED_R {
39        ZQ_RESISTOR_SHARED_R::new(((self.bits >> 29) & 1) != 0)
40    }
41    ///Bit 30 - DIS_SRX_ZQCL
42    #[inline(always)]
43    pub fn dis_srx_zqcl(&self) -> DIS_SRX_ZQCL_R {
44        DIS_SRX_ZQCL_R::new(((self.bits >> 30) & 1) != 0)
45    }
46    ///Bit 31 - DIS_AUTO_ZQ
47    #[inline(always)]
48    pub fn dis_auto_zq(&self) -> DIS_AUTO_ZQ_R {
49        DIS_AUTO_ZQ_R::new(((self.bits >> 31) & 1) != 0)
50    }
51}
52impl core::fmt::Debug for R {
53    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
54        f.debug_struct("ZQCTL0")
55            .field("t_zq_short_nop", &self.t_zq_short_nop())
56            .field("t_zq_long_nop", &self.t_zq_long_nop())
57            .field("zq_resistor_shared", &self.zq_resistor_shared())
58            .field("dis_srx_zqcl", &self.dis_srx_zqcl())
59            .field("dis_auto_zq", &self.dis_auto_zq())
60            .finish()
61    }
62}
63impl W {
64    ///Bits 0:9 - T_ZQ_SHORT_NOP
65    #[inline(always)]
66    pub fn t_zq_short_nop(&mut self) -> T_ZQ_SHORT_NOP_W<ZQCTL0rs> {
67        T_ZQ_SHORT_NOP_W::new(self, 0)
68    }
69    ///Bits 16:26 - T_ZQ_LONG_NOP
70    #[inline(always)]
71    pub fn t_zq_long_nop(&mut self) -> T_ZQ_LONG_NOP_W<ZQCTL0rs> {
72        T_ZQ_LONG_NOP_W::new(self, 16)
73    }
74    ///Bit 29 - ZQ_RESISTOR_SHARED
75    #[inline(always)]
76    pub fn zq_resistor_shared(&mut self) -> ZQ_RESISTOR_SHARED_W<ZQCTL0rs> {
77        ZQ_RESISTOR_SHARED_W::new(self, 29)
78    }
79    ///Bit 30 - DIS_SRX_ZQCL
80    #[inline(always)]
81    pub fn dis_srx_zqcl(&mut self) -> DIS_SRX_ZQCL_W<ZQCTL0rs> {
82        DIS_SRX_ZQCL_W::new(self, 30)
83    }
84    ///Bit 31 - DIS_AUTO_ZQ
85    #[inline(always)]
86    pub fn dis_auto_zq(&mut self) -> DIS_AUTO_ZQ_W<ZQCTL0rs> {
87        DIS_AUTO_ZQ_W::new(self, 31)
88    }
89}
90/**DDRCTRL ZQ control register 0
91
92You can [`read`](crate::Reg::read) this register and get [`zqctl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`zqctl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
93
94See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#DDRCTRL:ZQCTL0)*/
95pub struct ZQCTL0rs;
96impl crate::RegisterSpec for ZQCTL0rs {
97    type Ux = u32;
98}
99///`read()` method returns [`zqctl0::R`](R) reader structure
100impl crate::Readable for ZQCTL0rs {}
101///`write(|w| ..)` method takes [`zqctl0::W`](W) writer structure
102impl crate::Writable for ZQCTL0rs {
103    type Safety = crate::Unsafe;
104}
105///`reset()` method sets ZQCTL0 to value 0x0200_0040
106impl crate::Resettable for ZQCTL0rs {
107    const RESET_VALUE: u32 = 0x0200_0040;
108}
stm32mp1/stm32mp157/ddrctrl/zqctl0.rs

stm32mp1/stm32mp157/ddrctrl/
zqctl0.rs
