stm32mp1/stm32mp157/ddrctrl/
swstat.rs

1///Register `SWSTAT` reader
2pub type R = crate::R<SWSTATrs>;
3///Field `SW_DONE_ACK` reader - SW_DONE_ACK
4pub type SW_DONE_ACK_R = crate::BitReader;
5impl R {
6    ///Bit 0 - SW_DONE_ACK
7    #[inline(always)]
8    pub fn sw_done_ack(&self) -> SW_DONE_ACK_R {
9        SW_DONE_ACK_R::new((self.bits & 1) != 0)
10    }
11}
12impl core::fmt::Debug for R {
13    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
14        f.debug_struct("SWSTAT")
15            .field("sw_done_ack", &self.sw_done_ack())
16            .finish()
17    }
18}
19/**DDRCTRL software register programming control status
20
21You can [`read`](crate::Reg::read) this register and get [`swstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
22
23See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#DDRCTRL:SWSTAT)*/
24pub struct SWSTATrs;
25impl crate::RegisterSpec for SWSTATrs {
26    type Ux = u32;
27}
28///`read()` method returns [`swstat::R`](R) reader structure
29impl crate::Readable for SWSTATrs {}
30///`reset()` method sets SWSTAT to value 0x01
31impl crate::Resettable for SWSTATrs {
32    const RESET_VALUE: u32 = 0x01;
33}
stm32mp1/stm32mp157/ddrctrl/swstat.rs

stm32mp1/stm32mp157/ddrctrl/
swstat.rs
