stm32mp1/stm32mp157/ddrctrl/
pctrl_0.rs

1///Register `PCTRL_0` reader
2pub type R = crate::R<PCTRL_0rs>;
3///Register `PCTRL_0` writer
4pub type W = crate::W<PCTRL_0rs>;
5///Field `PORT_EN` reader - PORT_EN
6pub type PORT_EN_R = crate::BitReader;
7///Field `PORT_EN` writer - PORT_EN
8pub type PORT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    ///Bit 0 - PORT_EN
11    #[inline(always)]
12    pub fn port_en(&self) -> PORT_EN_R {
13        PORT_EN_R::new((self.bits & 1) != 0)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("PCTRL_0")
19            .field("port_en", &self.port_en())
20            .finish()
21    }
22}
23impl W {
24    ///Bit 0 - PORT_EN
25    #[inline(always)]
26    pub fn port_en(&mut self) -> PORT_EN_W<PCTRL_0rs> {
27        PORT_EN_W::new(self, 0)
28    }
29}
30/**DDRCTRL port 0 control register
31
32You can [`read`](crate::Reg::read) this register and get [`pctrl_0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pctrl_0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
33
34See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#DDRCTRL:PCTRL_0)*/
35pub struct PCTRL_0rs;
36impl crate::RegisterSpec for PCTRL_0rs {
37    type Ux = u32;
38}
39///`read()` method returns [`pctrl_0::R`](R) reader structure
40impl crate::Readable for PCTRL_0rs {}
41///`write(|w| ..)` method takes [`pctrl_0::W`](W) writer structure
42impl crate::Writable for PCTRL_0rs {
43    type Safety = crate::Unsafe;
44}
45///`reset()` method sets PCTRL_0 to value 0
46impl crate::Resettable for PCTRL_0rs {}