stm32mp1/stm32mp157/ddrctrl/
pcfgqos1_1.rs

1///Register `PCFGQOS1_1` reader
2pub type R = crate::R<PCFGQOS1_1rs>;
3///Register `PCFGQOS1_1` writer
4pub type W = crate::W<PCFGQOS1_1rs>;
5///Field `RQOS_MAP_TIMEOUTB` reader - RQOS_MAP_TIMEOUTB
6pub type RQOS_MAP_TIMEOUTB_R = crate::FieldReader<u16>;
7///Field `RQOS_MAP_TIMEOUTB` writer - RQOS_MAP_TIMEOUTB
8pub type RQOS_MAP_TIMEOUTB_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
9///Field `RQOS_MAP_TIMEOUTR` reader - RQOS_MAP_TIMEOUTR
10pub type RQOS_MAP_TIMEOUTR_R = crate::FieldReader<u16>;
11///Field `RQOS_MAP_TIMEOUTR` writer - RQOS_MAP_TIMEOUTR
12pub type RQOS_MAP_TIMEOUTR_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
13impl R {
14    ///Bits 0:10 - RQOS_MAP_TIMEOUTB
15    #[inline(always)]
16    pub fn rqos_map_timeoutb(&self) -> RQOS_MAP_TIMEOUTB_R {
17        RQOS_MAP_TIMEOUTB_R::new((self.bits & 0x07ff) as u16)
18    }
19    ///Bits 16:26 - RQOS_MAP_TIMEOUTR
20    #[inline(always)]
21    pub fn rqos_map_timeoutr(&self) -> RQOS_MAP_TIMEOUTR_R {
22        RQOS_MAP_TIMEOUTR_R::new(((self.bits >> 16) & 0x07ff) as u16)
23    }
24}
25impl core::fmt::Debug for R {
26    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
27        f.debug_struct("PCFGQOS1_1")
28            .field("rqos_map_timeoutb", &self.rqos_map_timeoutb())
29            .field("rqos_map_timeoutr", &self.rqos_map_timeoutr())
30            .finish()
31    }
32}
33impl W {
34    ///Bits 0:10 - RQOS_MAP_TIMEOUTB
35    #[inline(always)]
36    pub fn rqos_map_timeoutb(&mut self) -> RQOS_MAP_TIMEOUTB_W<PCFGQOS1_1rs> {
37        RQOS_MAP_TIMEOUTB_W::new(self, 0)
38    }
39    ///Bits 16:26 - RQOS_MAP_TIMEOUTR
40    #[inline(always)]
41    pub fn rqos_map_timeoutr(&mut self) -> RQOS_MAP_TIMEOUTR_W<PCFGQOS1_1rs> {
42        RQOS_MAP_TIMEOUTR_W::new(self, 16)
43    }
44}
45/**DDRCTRL port 1 read Q0S configuration register 1
46
47You can [`read`](crate::Reg::read) this register and get [`pcfgqos1_1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcfgqos1_1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
48
49See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#DDRCTRL:PCFGQOS1_1)*/
50pub struct PCFGQOS1_1rs;
51impl crate::RegisterSpec for PCFGQOS1_1rs {
52    type Ux = u32;
53}
54///`read()` method returns [`pcfgqos1_1::R`](R) reader structure
55impl crate::Readable for PCFGQOS1_1rs {}
56///`write(|w| ..)` method takes [`pcfgqos1_1::W`](W) writer structure
57impl crate::Writable for PCFGQOS1_1rs {
58    type Safety = crate::Unsafe;
59}
60///`reset()` method sets PCFGQOS1_1 to value 0
61impl crate::Resettable for PCFGQOS1_1rs {}