stm32mp1/stm32mp157/ddrctrl/
dimmctl.rs

1///Register `DIMMCTL` reader
2pub type R = crate::R<DIMMCTLrs>;
3///Register `DIMMCTL` writer
4pub type W = crate::W<DIMMCTLrs>;
5///Field `DIMM_STAGGER_CS_EN` reader - DIMM_STAGGER_CS_EN
6pub type DIMM_STAGGER_CS_EN_R = crate::BitReader;
7///Field `DIMM_STAGGER_CS_EN` writer - DIMM_STAGGER_CS_EN
8pub type DIMM_STAGGER_CS_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `DIMM_ADDR_MIRR_EN` reader - DIMM_ADDR_MIRR_EN
10pub type DIMM_ADDR_MIRR_EN_R = crate::BitReader;
11///Field `DIMM_ADDR_MIRR_EN` writer - DIMM_ADDR_MIRR_EN
12pub type DIMM_ADDR_MIRR_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    ///Bit 0 - DIMM_STAGGER_CS_EN
15    #[inline(always)]
16    pub fn dimm_stagger_cs_en(&self) -> DIMM_STAGGER_CS_EN_R {
17        DIMM_STAGGER_CS_EN_R::new((self.bits & 1) != 0)
18    }
19    ///Bit 1 - DIMM_ADDR_MIRR_EN
20    #[inline(always)]
21    pub fn dimm_addr_mirr_en(&self) -> DIMM_ADDR_MIRR_EN_R {
22        DIMM_ADDR_MIRR_EN_R::new(((self.bits >> 1) & 1) != 0)
23    }
24}
25impl core::fmt::Debug for R {
26    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
27        f.debug_struct("DIMMCTL")
28            .field("dimm_stagger_cs_en", &self.dimm_stagger_cs_en())
29            .field("dimm_addr_mirr_en", &self.dimm_addr_mirr_en())
30            .finish()
31    }
32}
33impl W {
34    ///Bit 0 - DIMM_STAGGER_CS_EN
35    #[inline(always)]
36    pub fn dimm_stagger_cs_en(&mut self) -> DIMM_STAGGER_CS_EN_W<DIMMCTLrs> {
37        DIMM_STAGGER_CS_EN_W::new(self, 0)
38    }
39    ///Bit 1 - DIMM_ADDR_MIRR_EN
40    #[inline(always)]
41    pub fn dimm_addr_mirr_en(&mut self) -> DIMM_ADDR_MIRR_EN_W<DIMMCTLrs> {
42        DIMM_ADDR_MIRR_EN_W::new(self, 1)
43    }
44}
45/**DDRCTRL DIMM control register
46
47You can [`read`](crate::Reg::read) this register and get [`dimmctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dimmctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
48
49See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#DDRCTRL:DIMMCTL)*/
50pub struct DIMMCTLrs;
51impl crate::RegisterSpec for DIMMCTLrs {
52    type Ux = u32;
53}
54///`read()` method returns [`dimmctl::R`](R) reader structure
55impl crate::Readable for DIMMCTLrs {}
56///`write(|w| ..)` method takes [`dimmctl::W`](W) writer structure
57impl crate::Writable for DIMMCTLrs {
58    type Safety = crate::Unsafe;
59}
60///`reset()` method sets DIMMCTL to value 0
61impl crate::Resettable for DIMMCTLrs {}
stm32mp1/stm32mp157/ddrctrl/dimmctl.rs

stm32mp1/stm32mp157/ddrctrl/
dimmctl.rs
