stm32mp1/stm32mp157/adc/
cr.rs

1///Register `CR` reader
2pub type R = crate::R<CRrs>;
3///Register `CR` writer
4pub type W = crate::W<CRrs>;
5///Field `ADEN` reader - ADEN
6pub type ADEN_R = crate::BitReader;
7///Field `ADEN` writer - ADEN
8pub type ADEN_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `ADDIS` reader - ADDIS
10pub type ADDIS_R = crate::BitReader;
11///Field `ADDIS` writer - ADDIS
12pub type ADDIS_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `ADSTART` reader - ADSTART
14pub type ADSTART_R = crate::BitReader;
15///Field `ADSTART` writer - ADSTART
16pub type ADSTART_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `JADSTART` reader - JADSTART
18pub type JADSTART_R = crate::BitReader;
19///Field `JADSTART` writer - JADSTART
20pub type JADSTART_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `ADSTP` reader - ADSTP
22pub type ADSTP_R = crate::BitReader;
23///Field `ADSTP` writer - ADSTP
24pub type ADSTP_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `JADSTP` reader - JADSTP
26pub type JADSTP_R = crate::BitReader;
27///Field `JADSTP` writer - JADSTP
28pub type JADSTP_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `BOOST` reader - BOOST
30pub type BOOST_R = crate::BitReader;
31///Field `BOOST` writer - BOOST
32pub type BOOST_W<'a, REG> = crate::BitWriter<'a, REG>;
33///Field `ADCALLIN` reader - ADCALLIN
34pub type ADCALLIN_R = crate::BitReader;
35///Field `ADCALLIN` writer - ADCALLIN
36pub type ADCALLIN_W<'a, REG> = crate::BitWriter<'a, REG>;
37///Field `LINCALRDYW1` reader - LINCALRDYW1
38pub type LINCALRDYW1_R = crate::BitReader;
39///Field `LINCALRDYW1` writer - LINCALRDYW1
40pub type LINCALRDYW1_W<'a, REG> = crate::BitWriter<'a, REG>;
41///Field `LINCALRDYW2` reader - LINCALRDYW2
42pub type LINCALRDYW2_R = crate::BitReader;
43///Field `LINCALRDYW2` writer - LINCALRDYW2
44pub type LINCALRDYW2_W<'a, REG> = crate::BitWriter<'a, REG>;
45///Field `LINCALRDYW3` reader - LINCALRDYW3
46pub type LINCALRDYW3_R = crate::BitReader;
47///Field `LINCALRDYW3` writer - LINCALRDYW3
48pub type LINCALRDYW3_W<'a, REG> = crate::BitWriter<'a, REG>;
49///Field `LINCALRDYW4` reader - LINCALRDYW4
50pub type LINCALRDYW4_R = crate::BitReader;
51///Field `LINCALRDYW4` writer - LINCALRDYW4
52pub type LINCALRDYW4_W<'a, REG> = crate::BitWriter<'a, REG>;
53///Field `LINCALRDYW5` reader - LINCALRDYW5
54pub type LINCALRDYW5_R = crate::BitReader;
55///Field `LINCALRDYW5` writer - LINCALRDYW5
56pub type LINCALRDYW5_W<'a, REG> = crate::BitWriter<'a, REG>;
57///Field `LINCALRDYW6` reader - LINCALRDYW6
58pub type LINCALRDYW6_R = crate::BitReader;
59///Field `LINCALRDYW6` writer - LINCALRDYW6
60pub type LINCALRDYW6_W<'a, REG> = crate::BitWriter<'a, REG>;
61///Field `ADVREGEN` reader - ADVREGEN
62pub type ADVREGEN_R = crate::BitReader;
63///Field `ADVREGEN` writer - ADVREGEN
64pub type ADVREGEN_W<'a, REG> = crate::BitWriter<'a, REG>;
65///Field `DEEPPWD` reader - DEEPPWD
66pub type DEEPPWD_R = crate::BitReader;
67///Field `DEEPPWD` writer - DEEPPWD
68pub type DEEPPWD_W<'a, REG> = crate::BitWriter<'a, REG>;
69///Field `ADCALDIF` reader - ADCALDIF
70pub type ADCALDIF_R = crate::BitReader;
71///Field `ADCALDIF` writer - ADCALDIF
72pub type ADCALDIF_W<'a, REG> = crate::BitWriter<'a, REG>;
73///Field `ADCAL` reader - ADCAL
74pub type ADCAL_R = crate::BitReader;
75///Field `ADCAL` writer - ADCAL
76pub type ADCAL_W<'a, REG> = crate::BitWriter<'a, REG>;
77impl R {
78    ///Bit 0 - ADEN
79    #[inline(always)]
80    pub fn aden(&self) -> ADEN_R {
81        ADEN_R::new((self.bits & 1) != 0)
82    }
83    ///Bit 1 - ADDIS
84    #[inline(always)]
85    pub fn addis(&self) -> ADDIS_R {
86        ADDIS_R::new(((self.bits >> 1) & 1) != 0)
87    }
88    ///Bit 2 - ADSTART
89    #[inline(always)]
90    pub fn adstart(&self) -> ADSTART_R {
91        ADSTART_R::new(((self.bits >> 2) & 1) != 0)
92    }
93    ///Bit 3 - JADSTART
94    #[inline(always)]
95    pub fn jadstart(&self) -> JADSTART_R {
96        JADSTART_R::new(((self.bits >> 3) & 1) != 0)
97    }
98    ///Bit 4 - ADSTP
99    #[inline(always)]
100    pub fn adstp(&self) -> ADSTP_R {
101        ADSTP_R::new(((self.bits >> 4) & 1) != 0)
102    }
103    ///Bit 5 - JADSTP
104    #[inline(always)]
105    pub fn jadstp(&self) -> JADSTP_R {
106        JADSTP_R::new(((self.bits >> 5) & 1) != 0)
107    }
108    ///Bit 8 - BOOST
109    #[inline(always)]
110    pub fn boost(&self) -> BOOST_R {
111        BOOST_R::new(((self.bits >> 8) & 1) != 0)
112    }
113    ///Bit 16 - ADCALLIN
114    #[inline(always)]
115    pub fn adcallin(&self) -> ADCALLIN_R {
116        ADCALLIN_R::new(((self.bits >> 16) & 1) != 0)
117    }
118    ///Bit 22 - LINCALRDYW1
119    #[inline(always)]
120    pub fn lincalrdyw1(&self) -> LINCALRDYW1_R {
121        LINCALRDYW1_R::new(((self.bits >> 22) & 1) != 0)
122    }
123    ///Bit 23 - LINCALRDYW2
124    #[inline(always)]
125    pub fn lincalrdyw2(&self) -> LINCALRDYW2_R {
126        LINCALRDYW2_R::new(((self.bits >> 23) & 1) != 0)
127    }
128    ///Bit 24 - LINCALRDYW3
129    #[inline(always)]
130    pub fn lincalrdyw3(&self) -> LINCALRDYW3_R {
131        LINCALRDYW3_R::new(((self.bits >> 24) & 1) != 0)
132    }
133    ///Bit 25 - LINCALRDYW4
134    #[inline(always)]
135    pub fn lincalrdyw4(&self) -> LINCALRDYW4_R {
136        LINCALRDYW4_R::new(((self.bits >> 25) & 1) != 0)
137    }
138    ///Bit 26 - LINCALRDYW5
139    #[inline(always)]
140    pub fn lincalrdyw5(&self) -> LINCALRDYW5_R {
141        LINCALRDYW5_R::new(((self.bits >> 26) & 1) != 0)
142    }
143    ///Bit 27 - LINCALRDYW6
144    #[inline(always)]
145    pub fn lincalrdyw6(&self) -> LINCALRDYW6_R {
146        LINCALRDYW6_R::new(((self.bits >> 27) & 1) != 0)
147    }
148    ///Bit 28 - ADVREGEN
149    #[inline(always)]
150    pub fn advregen(&self) -> ADVREGEN_R {
151        ADVREGEN_R::new(((self.bits >> 28) & 1) != 0)
152    }
153    ///Bit 29 - DEEPPWD
154    #[inline(always)]
155    pub fn deeppwd(&self) -> DEEPPWD_R {
156        DEEPPWD_R::new(((self.bits >> 29) & 1) != 0)
157    }
158    ///Bit 30 - ADCALDIF
159    #[inline(always)]
160    pub fn adcaldif(&self) -> ADCALDIF_R {
161        ADCALDIF_R::new(((self.bits >> 30) & 1) != 0)
162    }
163    ///Bit 31 - ADCAL
164    #[inline(always)]
165    pub fn adcal(&self) -> ADCAL_R {
166        ADCAL_R::new(((self.bits >> 31) & 1) != 0)
167    }
168}
169impl core::fmt::Debug for R {
170    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
171        f.debug_struct("CR")
172            .field("aden", &self.aden())
173            .field("addis", &self.addis())
174            .field("adstart", &self.adstart())
175            .field("jadstart", &self.jadstart())
176            .field("adstp", &self.adstp())
177            .field("jadstp", &self.jadstp())
178            .field("boost", &self.boost())
179            .field("adcallin", &self.adcallin())
180            .field("lincalrdyw1", &self.lincalrdyw1())
181            .field("lincalrdyw2", &self.lincalrdyw2())
182            .field("lincalrdyw3", &self.lincalrdyw3())
183            .field("lincalrdyw4", &self.lincalrdyw4())
184            .field("lincalrdyw5", &self.lincalrdyw5())
185            .field("lincalrdyw6", &self.lincalrdyw6())
186            .field("advregen", &self.advregen())
187            .field("deeppwd", &self.deeppwd())
188            .field("adcaldif", &self.adcaldif())
189            .field("adcal", &self.adcal())
190            .finish()
191    }
192}
193impl W {
194    ///Bit 0 - ADEN
195    #[inline(always)]
196    pub fn aden(&mut self) -> ADEN_W<CRrs> {
197        ADEN_W::new(self, 0)
198    }
199    ///Bit 1 - ADDIS
200    #[inline(always)]
201    pub fn addis(&mut self) -> ADDIS_W<CRrs> {
202        ADDIS_W::new(self, 1)
203    }
204    ///Bit 2 - ADSTART
205    #[inline(always)]
206    pub fn adstart(&mut self) -> ADSTART_W<CRrs> {
207        ADSTART_W::new(self, 2)
208    }
209    ///Bit 3 - JADSTART
210    #[inline(always)]
211    pub fn jadstart(&mut self) -> JADSTART_W<CRrs> {
212        JADSTART_W::new(self, 3)
213    }
214    ///Bit 4 - ADSTP
215    #[inline(always)]
216    pub fn adstp(&mut self) -> ADSTP_W<CRrs> {
217        ADSTP_W::new(self, 4)
218    }
219    ///Bit 5 - JADSTP
220    #[inline(always)]
221    pub fn jadstp(&mut self) -> JADSTP_W<CRrs> {
222        JADSTP_W::new(self, 5)
223    }
224    ///Bit 8 - BOOST
225    #[inline(always)]
226    pub fn boost(&mut self) -> BOOST_W<CRrs> {
227        BOOST_W::new(self, 8)
228    }
229    ///Bit 16 - ADCALLIN
230    #[inline(always)]
231    pub fn adcallin(&mut self) -> ADCALLIN_W<CRrs> {
232        ADCALLIN_W::new(self, 16)
233    }
234    ///Bit 22 - LINCALRDYW1
235    #[inline(always)]
236    pub fn lincalrdyw1(&mut self) -> LINCALRDYW1_W<CRrs> {
237        LINCALRDYW1_W::new(self, 22)
238    }
239    ///Bit 23 - LINCALRDYW2
240    #[inline(always)]
241    pub fn lincalrdyw2(&mut self) -> LINCALRDYW2_W<CRrs> {
242        LINCALRDYW2_W::new(self, 23)
243    }
244    ///Bit 24 - LINCALRDYW3
245    #[inline(always)]
246    pub fn lincalrdyw3(&mut self) -> LINCALRDYW3_W<CRrs> {
247        LINCALRDYW3_W::new(self, 24)
248    }
249    ///Bit 25 - LINCALRDYW4
250    #[inline(always)]
251    pub fn lincalrdyw4(&mut self) -> LINCALRDYW4_W<CRrs> {
252        LINCALRDYW4_W::new(self, 25)
253    }
254    ///Bit 26 - LINCALRDYW5
255    #[inline(always)]
256    pub fn lincalrdyw5(&mut self) -> LINCALRDYW5_W<CRrs> {
257        LINCALRDYW5_W::new(self, 26)
258    }
259    ///Bit 27 - LINCALRDYW6
260    #[inline(always)]
261    pub fn lincalrdyw6(&mut self) -> LINCALRDYW6_W<CRrs> {
262        LINCALRDYW6_W::new(self, 27)
263    }
264    ///Bit 28 - ADVREGEN
265    #[inline(always)]
266    pub fn advregen(&mut self) -> ADVREGEN_W<CRrs> {
267        ADVREGEN_W::new(self, 28)
268    }
269    ///Bit 29 - DEEPPWD
270    #[inline(always)]
271    pub fn deeppwd(&mut self) -> DEEPPWD_W<CRrs> {
272        DEEPPWD_W::new(self, 29)
273    }
274    ///Bit 30 - ADCALDIF
275    #[inline(always)]
276    pub fn adcaldif(&mut self) -> ADCALDIF_W<CRrs> {
277        ADCALDIF_W::new(self, 30)
278    }
279    ///Bit 31 - ADCAL
280    #[inline(always)]
281    pub fn adcal(&mut self) -> ADCAL_W<CRrs> {
282        ADCAL_W::new(self, 31)
283    }
284}
285/**ADC control register
286
287You can [`read`](crate::Reg::read) this register and get [`cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
288
289See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#ADC:CR)*/
290pub struct CRrs;
291impl crate::RegisterSpec for CRrs {
292    type Ux = u32;
293}
294///`read()` method returns [`cr::R`](R) reader structure
295impl crate::Readable for CRrs {}
296///`write(|w| ..)` method takes [`cr::W`](W) writer structure
297impl crate::Writable for CRrs {
298    type Safety = crate::Unsafe;
299}
300///`reset()` method sets CR to value 0x2000_0000
301impl crate::Resettable for CRrs {
302    const RESET_VALUE: u32 = 0x2000_0000;
303}
stm32mp1/stm32mp157/adc/cr.rs

stm32mp1/stm32mp157/adc/
cr.rs
