Struct stm32l5::stm32l562::dac::cr::R

pub struct R(_);

Register CR reader

Implementations

impl R

pub fn en1(&self) -> EN1_R

Bit 0 - DAC channel1 enable This bit is set and cleared by software to enable/disable DAC channel1.

pub fn ten1(&self) -> TEN1_R

Bit 1 - DAC channel1 trigger enable

pub fn tsel10(&self) -> TSEL10_R

Bit 2 - TSEL10

pub fn tsel11(&self) -> TSEL11_R

Bit 3 - TSEL11

pub fn tsel12(&self) -> TSEL12_R

Bit 4 - TSEL12

pub fn tsel13(&self) -> TSEL13_R

Bit 5 - TSEL13

pub fn wave1(&self) -> WAVE1_R

Bits 6:7 - DAC channel1 noise/triangle wave generation enable These bits are set and cleared by software. Note: Only used if bit TEN1 = 1 (DAC channel1 trigger enabled).

pub fn mamp1(&self) -> MAMP1_R

Bits 8:11 - DAC channel1 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

pub fn dmaen1(&self) -> DMAEN1_R

Bit 12 - DAC channel1 DMA enable This bit is set and cleared by software.

pub fn dmaudrie1(&self) -> DMAUDRIE1_R

Bit 13 - DAC channel1 DMA Underrun Interrupt enable This bit is set and cleared by software.

pub fn cen1(&self) -> CEN1_R

Bit 14 - DAC Channel 1 calibration enable This bit is set and cleared by software to enable/disable DAC channel 1 calibration, it can be written only if bit EN1=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

pub fn hfsel(&self) -> HFSEL_R

Bit 15 - HFSEL

pub fn en2(&self) -> EN2_R

Bit 16 - DAC channel2 enable This bit is set and cleared by software to enable/disable DAC channel2.

pub fn ten2(&self) -> TEN2_R

Bit 17 - DAC channel2 trigger enable

pub fn tsel20(&self) -> TSEL20_R

Bit 18 - TSEL20

pub fn tsel21(&self) -> TSEL21_R

Bit 19 - TSEL21

pub fn tsel22(&self) -> TSEL22_R

Bit 20 - TSEL22

pub fn tsel23(&self) -> TSEL23_R

Bit 21 - TSEL23

pub fn wave2(&self) -> WAVE2_R

Bits 22:23 - DAC channel2 noise/triangle wave generation enable These bits are set/reset by software. 1x: Triangle wave generation enabled Note: Only used if bit TEN2 = 1 (DAC channel2 trigger enabled)

pub fn mamp2(&self) -> MAMP2_R

Bits 24:27 - DAC channel2 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

pub fn dmaen2(&self) -> DMAEN2_R

Bit 28 - DAC channel2 DMA enable This bit is set and cleared by software.

pub fn dmaudrie2(&self) -> DMAUDRIE2_R

Bit 29 - DAC channel2 DMA underrun interrupt enable This bit is set and cleared by software.

pub fn cen2(&self) -> CEN2_R

Bit 30 - DAC Channel 2 calibration enable This bit is set and cleared by software to enable/disable DAC channel 2 calibration, it can be written only if bit EN2=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

Methods from Deref<Target = R<CR_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<CR_SPEC>> for R

fn from(reader: R<CR_SPEC>) -> Self

Converts to this type from the input type.