Expand description

channel x memory address register

Structs

channel x memory address register

Register CM0AR2 reader

Register CM0AR2 writer

Type Definitions

Field CIRC reader - Circular mode

Field CIRC writer - Circular mode

Field CT reader - current target memory of DMA transfer in double-buffer mode

Field CT writer - current target memory of DMA transfer in double-buffer mode

Field DBM reader - double-buffer mode

Field DBM writer - double-buffer mode

Field DIR reader - Data transfer direction

Field DIR writer - Data transfer direction

Field DSEC reader - security of the DMA transfer to the destination

Field DSEC writer - security of the DMA transfer to the destination

Field EN reader - Channel enable

Field EN writer - Channel enable

Field HTIE reader - Half transfer interrupt enable

Field HTIE writer - Half transfer interrupt enable

Field MEM2MEM reader - Memory to memory mode

Field MEM2MEM writer - Memory to memory mode

Field MINC reader - Memory increment mode

Field MINC writer - Memory increment mode

Field MSIZE reader - Memory size

Field MSIZE writer - Memory size

Field PINC reader - Peripheral increment mode

Field PINC writer - Peripheral increment mode

Field PL reader - Channel priority level

Field PL writer - Channel priority level

Field PRIV reader - privileged mode

Field PRIV writer - privileged mode

Field PSIZE reader - Peripheral size

Field PSIZE writer - Peripheral size

Field SECM reader - secure mode

Field SECM writer - secure mode

Field SSEC reader - security of the DMA transfer from the source

Field SSEC writer - security of the DMA transfer from the source

Field TCIE reader - Transfer complete interrupt enable

Field TCIE writer - Transfer complete interrupt enable

Field TEIE reader - Transfer error interrupt enable

Field TEIE writer - Transfer error interrupt enable