stm32l5/stm32l562/
mod.rs

1/*!Peripheral access API for STM32L562 microcontrollers (generated using svd2rust v0.36.1 (4052ce6 2025-04-04))
2
3You can find an overview of the generated API [here].
4
5API features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.
6
7[here]: https://docs.rs/svd2rust/0.36.1/svd2rust/#peripheral-api
8[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased
9[repository]: https://github.com/rust-embedded/svd2rust*/
10///Number available in the NVIC for configuring priority
11pub const NVIC_PRIO_BITS: u8 = 3;
12#[cfg(feature = "rt")]
13pub use self::Interrupt as interrupt;
14pub use cortex_m::peripheral::Peripherals as CorePeripherals;
15pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
16#[cfg(feature = "rt")]
17pub use cortex_m_rt::interrupt;
18#[cfg(feature = "rt")]
19extern "C" {
20    fn WWDG();
21    fn PVD_PVM();
22    fn RTC();
23    fn RTC_S();
24    fn TAMP();
25    fn TAMP_S();
26    fn FLASH();
27    fn FLASH_S();
28    fn GTZC();
29    fn RCC();
30    fn RCC_S();
31    fn EXTI0();
32    fn EXTI1();
33    fn EXTI2();
34    fn EXTI3();
35    fn EXTI4();
36    fn EXTI5();
37    fn EXTI6();
38    fn EXTI7();
39    fn EXTI8();
40    fn EXTI9();
41    fn EXTI10();
42    fn EXTI11();
43    fn EXTI12();
44    fn EXTI13();
45    fn EXTI14();
46    fn EXTI15();
47    fn DMAMUX1_OVR();
48    fn DMAMUX1_OVR_S();
49    fn DMA1_CH1();
50    fn DMA1_CH2();
51    fn DMA1_CH3();
52    fn DMA1_CH4();
53    fn DMA1_CH5();
54    fn DMA1_CH6();
55    fn DMA1_CH7();
56    fn DMA1_CHANNEL8();
57    fn ADC1_2();
58    fn DAC();
59    fn FDCAN1_IT0();
60    fn FDCAN1_IT1();
61    fn TIM1_BRK();
62    fn TIM1_UP();
63    fn TIM1_TRG_COM();
64    fn TIM1_CC();
65    fn TIM2();
66    fn TIM3();
67    fn TIM4();
68    fn TIM5();
69    fn TIM6();
70    fn TIM7();
71    fn TIM8_BRK();
72    fn TIM8_UP();
73    fn TIM8_TRG_COM();
74    fn TIM8_CC();
75    fn I2C1_EV();
76    fn I2C1_ER();
77    fn I2C2_EV();
78    fn I2C2_ER();
79    fn SPI1();
80    fn SPI2();
81    fn USART1();
82    fn USART2();
83    fn USART3();
84    fn UART4();
85    fn UART5();
86    fn LPUART1();
87    fn LPTIM1();
88    fn LPTIM2();
89    fn TIM15();
90    fn TIM16();
91    fn TIM17();
92    fn COMP();
93    fn USB_FS();
94    fn CRS();
95    fn FMC();
96    fn OCTOSPI1();
97    fn SDMMC1();
98    fn DMA2_CH1();
99    fn DMA2_CH2();
100    fn DMA2_CH3();
101    fn DMA2_CH4();
102    fn DMA2_CH5();
103    fn DMA2_CH6();
104    fn DMA2_CH7();
105    fn DMA2_CH8();
106    fn I2C3_EV();
107    fn I2C3_ER();
108    fn SAI1();
109    fn SAI2();
110    fn TSC();
111    fn AES();
112    fn RNG();
113    fn HASH();
114    fn PKA();
115    fn LPTIM3();
116    fn SPI3();
117    fn I2C4_ER();
118    fn I2C4_EV();
119    fn DFSDM1_FLT0();
120    fn DFSDM1_FLT1();
121    fn DFSDM1_FLT2();
122    fn DFSDM1_FLT3();
123    fn UCPD1();
124    fn ICACHE();
125    fn OTFDEC1();
126}
127#[doc(hidden)]
128#[repr(C)]
129pub union Vector {
130    _handler: unsafe extern "C" fn(),
131    _reserved: u32,
132}
133#[cfg(feature = "rt")]
134#[doc(hidden)]
135#[link_section = ".vector_table.interrupts"]
136#[no_mangle]
137pub static __INTERRUPTS: [Vector; 109] = [
138    Vector { _handler: WWDG },
139    Vector { _handler: PVD_PVM },
140    Vector { _handler: RTC },
141    Vector { _handler: RTC_S },
142    Vector { _handler: TAMP },
143    Vector { _handler: TAMP_S },
144    Vector { _handler: FLASH },
145    Vector { _handler: FLASH_S },
146    Vector { _handler: GTZC },
147    Vector { _handler: RCC },
148    Vector { _handler: RCC_S },
149    Vector { _handler: EXTI0 },
150    Vector { _handler: EXTI1 },
151    Vector { _handler: EXTI2 },
152    Vector { _handler: EXTI3 },
153    Vector { _handler: EXTI4 },
154    Vector { _handler: EXTI5 },
155    Vector { _handler: EXTI6 },
156    Vector { _handler: EXTI7 },
157    Vector { _handler: EXTI8 },
158    Vector { _handler: EXTI9 },
159    Vector { _handler: EXTI10 },
160    Vector { _handler: EXTI11 },
161    Vector { _handler: EXTI12 },
162    Vector { _handler: EXTI13 },
163    Vector { _handler: EXTI14 },
164    Vector { _handler: EXTI15 },
165    Vector {
166        _handler: DMAMUX1_OVR,
167    },
168    Vector {
169        _handler: DMAMUX1_OVR_S,
170    },
171    Vector { _handler: DMA1_CH1 },
172    Vector { _handler: DMA1_CH2 },
173    Vector { _handler: DMA1_CH3 },
174    Vector { _handler: DMA1_CH4 },
175    Vector { _handler: DMA1_CH5 },
176    Vector { _handler: DMA1_CH6 },
177    Vector { _handler: DMA1_CH7 },
178    Vector {
179        _handler: DMA1_CHANNEL8,
180    },
181    Vector { _handler: ADC1_2 },
182    Vector { _handler: DAC },
183    Vector {
184        _handler: FDCAN1_IT0,
185    },
186    Vector {
187        _handler: FDCAN1_IT1,
188    },
189    Vector { _handler: TIM1_BRK },
190    Vector { _handler: TIM1_UP },
191    Vector {
192        _handler: TIM1_TRG_COM,
193    },
194    Vector { _handler: TIM1_CC },
195    Vector { _handler: TIM2 },
196    Vector { _handler: TIM3 },
197    Vector { _handler: TIM4 },
198    Vector { _handler: TIM5 },
199    Vector { _handler: TIM6 },
200    Vector { _handler: TIM7 },
201    Vector { _handler: TIM8_BRK },
202    Vector { _handler: TIM8_UP },
203    Vector {
204        _handler: TIM8_TRG_COM,
205    },
206    Vector { _handler: TIM8_CC },
207    Vector { _handler: I2C1_EV },
208    Vector { _handler: I2C1_ER },
209    Vector { _handler: I2C2_EV },
210    Vector { _handler: I2C2_ER },
211    Vector { _handler: SPI1 },
212    Vector { _handler: SPI2 },
213    Vector { _handler: USART1 },
214    Vector { _handler: USART2 },
215    Vector { _handler: USART3 },
216    Vector { _handler: UART4 },
217    Vector { _handler: UART5 },
218    Vector { _handler: LPUART1 },
219    Vector { _handler: LPTIM1 },
220    Vector { _handler: LPTIM2 },
221    Vector { _handler: TIM15 },
222    Vector { _handler: TIM16 },
223    Vector { _handler: TIM17 },
224    Vector { _handler: COMP },
225    Vector { _handler: USB_FS },
226    Vector { _handler: CRS },
227    Vector { _handler: FMC },
228    Vector { _handler: OCTOSPI1 },
229    Vector { _reserved: 0 },
230    Vector { _handler: SDMMC1 },
231    Vector { _reserved: 0 },
232    Vector { _handler: DMA2_CH1 },
233    Vector { _handler: DMA2_CH2 },
234    Vector { _handler: DMA2_CH3 },
235    Vector { _handler: DMA2_CH4 },
236    Vector { _handler: DMA2_CH5 },
237    Vector { _handler: DMA2_CH6 },
238    Vector { _handler: DMA2_CH7 },
239    Vector { _handler: DMA2_CH8 },
240    Vector { _handler: I2C3_EV },
241    Vector { _handler: I2C3_ER },
242    Vector { _handler: SAI1 },
243    Vector { _handler: SAI2 },
244    Vector { _handler: TSC },
245    Vector { _handler: AES },
246    Vector { _handler: RNG },
247    Vector { _reserved: 0 },
248    Vector { _handler: HASH },
249    Vector { _handler: PKA },
250    Vector { _handler: LPTIM3 },
251    Vector { _handler: SPI3 },
252    Vector { _handler: I2C4_ER },
253    Vector { _handler: I2C4_EV },
254    Vector {
255        _handler: DFSDM1_FLT0,
256    },
257    Vector {
258        _handler: DFSDM1_FLT1,
259    },
260    Vector {
261        _handler: DFSDM1_FLT2,
262    },
263    Vector {
264        _handler: DFSDM1_FLT3,
265    },
266    Vector { _handler: UCPD1 },
267    Vector { _handler: ICACHE },
268    Vector { _handler: OTFDEC1 },
269];
270///Enumeration of all the interrupts.
271#[cfg_attr(feature = "defmt", derive(defmt::Format))]
272#[derive(Copy, Clone, Debug, PartialEq, Eq)]
273#[repr(u16)]
274pub enum Interrupt {
275    ///0 - Window Watchdog interrupt
276    WWDG = 0,
277    ///1 - PVD/PVM1/PVM2/PVM3/PVM4 through EXTI
278    PVD_PVM = 1,
279    ///2 - RTC global interrupts (EXTI line 17)
280    RTC = 2,
281    ///3 - RTC secure global interrupts (EXTI line 18)
282    RTC_S = 3,
283    ///4 - TAMPTamper global interrupt (EXTI line 19)
284    TAMP = 4,
285    ///5 - Tamper secure global interrupt (EXTI line 20)
286    TAMP_S = 5,
287    ///6 - Flash global interrupt
288    FLASH = 6,
289    ///7 - Flash memory secure global interrupt
290    FLASH_S = 7,
291    ///8 - TZIC secure global interrupt
292    GTZC = 8,
293    ///9 - RCC global interrupt
294    RCC = 9,
295    ///10 - RCC SECURE GLOBAL INTERRUPT
296    RCC_S = 10,
297    ///11 - EXTI line0 interrupt
298    EXTI0 = 11,
299    ///12 - EXTI line1 interrupt
300    EXTI1 = 12,
301    ///13 - EXTI line2 interrupt
302    EXTI2 = 13,
303    ///14 - EXTI line3 interrupt
304    EXTI3 = 14,
305    ///15 - EXTI line4 interrupt
306    EXTI4 = 15,
307    ///16 - EXTI line5 interrupt
308    EXTI5 = 16,
309    ///17 - EXTI line6 interrupt
310    EXTI6 = 17,
311    ///18 - EXTI line7 interrupt
312    EXTI7 = 18,
313    ///19 - EXTI line8 interrupt
314    EXTI8 = 19,
315    ///20 - EXTI line9 interrupt
316    EXTI9 = 20,
317    ///21 - EXTI line10 interrupt
318    EXTI10 = 21,
319    ///22 - EXTI line11 interrupt
320    EXTI11 = 22,
321    ///23 - EXTI line12 interrupt
322    EXTI12 = 23,
323    ///24 - EXTI line13 interrupt
324    EXTI13 = 24,
325    ///25 - EXTI line14 interrupt
326    EXTI14 = 25,
327    ///26 - EXTI line15 interrupt
328    EXTI15 = 26,
329    ///27 - DMAMUX overrun interrupt
330    DMAMUX1_OVR = 27,
331    ///28 - DMAMUX1 secure overRun interrupt
332    DMAMUX1_OVR_S = 28,
333    ///29 - DMA1 Channel1 global interrupt
334    DMA1_CH1 = 29,
335    ///30 - DMA1 Channel2 global interrupt
336    DMA1_CH2 = 30,
337    ///31 - DMA1 Channel3 interrupt
338    DMA1_CH3 = 31,
339    ///32 - DMA1 Channel4 interrupt
340    DMA1_CH4 = 32,
341    ///33 - DMA1 Channel5 interrupt
342    DMA1_CH5 = 33,
343    ///34 - DMA1 Channel6 interrupt
344    DMA1_CH6 = 34,
345    ///35 - DMA1 Channel 7 interrupt
346    DMA1_CH7 = 35,
347    ///36 - DMA1_Channel8
348    DMA1_CHANNEL8 = 36,
349    ///37 - ADC1_2 global interrupt
350    ADC1_2 = 37,
351    ///38 - DAC global interrupt
352    DAC = 38,
353    ///39 - FDCAN1 Interrupt 0
354    FDCAN1_IT0 = 39,
355    ///40 - FDCAN1 Interrupt 1
356    FDCAN1_IT1 = 40,
357    ///41 - TIM1 Break
358    TIM1_BRK = 41,
359    ///42 - TIM1 Update
360    TIM1_UP = 42,
361    ///43 - TIM1 Trigger and Commutation
362    TIM1_TRG_COM = 43,
363    ///44 - TIM1 Capture Compare interrupt
364    TIM1_CC = 44,
365    ///45 - TIM2 global interrupt
366    TIM2 = 45,
367    ///46 - TIM3 global interrupt
368    TIM3 = 46,
369    ///47 - TIM4 global interrupt
370    TIM4 = 47,
371    ///48 - TIM5 global interrupt
372    TIM5 = 48,
373    ///49 - TIM6 global interrupt
374    TIM6 = 49,
375    ///50 - TIM7 global interrupt
376    TIM7 = 50,
377    ///51 - TIM8 Break Interrupt
378    TIM8_BRK = 51,
379    ///52 - TIM8 Update Interrupt
380    TIM8_UP = 52,
381    ///53 - TIM8 Trigger and Commutation Interrupt
382    TIM8_TRG_COM = 53,
383    ///54 - TIM8 Capture Compare Interrupt
384    TIM8_CC = 54,
385    ///55 - I2C1 event interrupt
386    I2C1_EV = 55,
387    ///56 - I2C1 error interrupt
388    I2C1_ER = 56,
389    ///57 - I2C2 event interrupt
390    I2C2_EV = 57,
391    ///58 - I2C2 error interrupt
392    I2C2_ER = 58,
393    ///59 - SPI1 global interrupt
394    SPI1 = 59,
395    ///60 - SPI2 global interrupt
396    SPI2 = 60,
397    ///61 - USART1 global interrupt
398    USART1 = 61,
399    ///62 - USART2 global interrupt
400    USART2 = 62,
401    ///63 - USART3 global interrupt
402    USART3 = 63,
403    ///64 - UART4 global interrupt
404    UART4 = 64,
405    ///65 - UART5 global interrupt
406    UART5 = 65,
407    ///66 - LPUART1 global interrupt
408    LPUART1 = 66,
409    ///67 - LP TIM1 interrupt
410    LPTIM1 = 67,
411    ///68 - LP TIM2 interrupt
412    LPTIM2 = 68,
413    ///69 - TIM15 global interrupt
414    TIM15 = 69,
415    ///70 - TIM16 global interrupt
416    TIM16 = 70,
417    ///71 - TIM17 global interrupt
418    TIM17 = 71,
419    ///72 - COMP1 and COMP2 interrupts
420    COMP = 72,
421    ///73 - USB FS global interrupt
422    USB_FS = 73,
423    ///74 - Clock recovery system global interrupt
424    CRS = 74,
425    ///75 - FMC global interrupt
426    FMC = 75,
427    ///76 - OCTOSPI1 global interrupt
428    OCTOSPI1 = 76,
429    ///78 - SDMMC1 global interrupt
430    SDMMC1 = 78,
431    ///80 - DMA2_CH1
432    DMA2_CH1 = 80,
433    ///81 - DMA2_CH2
434    DMA2_CH2 = 81,
435    ///82 - DMA2_CH3
436    DMA2_CH3 = 82,
437    ///83 - DMA2_CH4
438    DMA2_CH4 = 83,
439    ///84 - DMA2_CH5
440    DMA2_CH5 = 84,
441    ///85 - DMA2_CH6
442    DMA2_CH6 = 85,
443    ///86 - DMA2_CH7
444    DMA2_CH7 = 86,
445    ///87 - DMA2_CH8
446    DMA2_CH8 = 87,
447    ///88 - I2C3 event interrupt
448    I2C3_EV = 88,
449    ///89 - I2C3 error interrupt
450    I2C3_ER = 89,
451    ///90 - SAI1 global interrupt
452    SAI1 = 90,
453    ///91 - SAI2 global interrupt
454    SAI2 = 91,
455    ///92 - TSC global interrupt
456    TSC = 92,
457    ///93 - AES global interrupts
458    AES = 93,
459    ///94 - RNG global interrupt
460    RNG = 94,
461    ///96 - HASH interrupt
462    HASH = 96,
463    ///97 - PKA global interrupts
464    PKA = 97,
465    ///98 - LPTIM3
466    LPTIM3 = 98,
467    ///99 - SPI3
468    SPI3 = 99,
469    ///100 - I2C4 error interrupt
470    I2C4_ER = 100,
471    ///101 - I2C4 event interrupt
472    I2C4_EV = 101,
473    ///102 - DFSDM1_FLT0 global interrupt
474    DFSDM1_FLT0 = 102,
475    ///103 - DFSDM1_FLT1 global interrupt
476    DFSDM1_FLT1 = 103,
477    ///104 - DFSDM1_FLT2 global interrupt
478    DFSDM1_FLT2 = 104,
479    ///105 - DFSDM1_FLT3 global interrupt
480    DFSDM1_FLT3 = 105,
481    ///106 - UCPD global interrupt
482    UCPD1 = 106,
483    ///107 - ICACHE
484    ICACHE = 107,
485    ///108 - OTFDEC1 secure global interrupt
486    OTFDEC1 = 108,
487}
488unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
489    #[inline(always)]
490    fn number(self) -> u16 {
491        self as u16
492    }
493}
494///Analog-to-Digital Converter
495///
496///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#ADC1)
497pub type ADC1 = crate::Periph<adc1::RegisterBlock, 0x4202_8000>;
498impl core::fmt::Debug for ADC1 {
499    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
500        f.debug_struct("ADC1").finish()
501    }
502}
503///Analog-to-Digital Converter
504pub mod adc1;
505///Analog-to-Digital Converter
506///
507///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#ADC1)
508pub type SEC_ADC1 = crate::Periph<adc1::RegisterBlock, 0x5202_8000>;
509impl core::fmt::Debug for SEC_ADC1 {
510    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
511        f.debug_struct("SEC_ADC1").finish()
512    }
513}
514///Analog-to-Digital Converter
515pub use self::adc1 as sec_adc1;
516///Analog-to-Digital Converter
517///
518///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#ADC1)
519pub type ADC2 = crate::Periph<adc1::RegisterBlock, 0x4202_8100>;
520impl core::fmt::Debug for ADC2 {
521    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
522        f.debug_struct("ADC2").finish()
523    }
524}
525///Analog-to-Digital Converter
526pub use self::adc1 as adc2;
527///Analog-to-Digital Converter
528///
529///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#ADC1)
530pub type SEC_ADC2 = crate::Periph<adc1::RegisterBlock, 0x5202_8100>;
531impl core::fmt::Debug for SEC_ADC2 {
532    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
533        f.debug_struct("SEC_ADC2").finish()
534    }
535}
536///Analog-to-Digital Converter
537pub use self::adc1 as sec_adc2;
538///Analog-to-Digital Converter
539///
540///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#ADC_Common)
541pub type ADC_COMMON = crate::Periph<adc_common::RegisterBlock, 0x4202_8300>;
542impl core::fmt::Debug for ADC_COMMON {
543    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
544        f.debug_struct("ADC_COMMON").finish()
545    }
546}
547///Analog-to-Digital Converter
548pub mod adc_common;
549///Analog-to-Digital Converter
550///
551///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#ADC_Common)
552pub type SEC_ADC_COMMON = crate::Periph<adc_common::RegisterBlock, 0x5202_8300>;
553impl core::fmt::Debug for SEC_ADC_COMMON {
554    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
555        f.debug_struct("SEC_ADC_COMMON").finish()
556    }
557}
558///Analog-to-Digital Converter
559pub use self::adc_common as sec_adc_common;
560///Advanced encryption standard hardware accelerator 1
561///
562///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#AES)
563pub type AES = crate::Periph<aes::RegisterBlock, 0x420c_0000>;
564impl core::fmt::Debug for AES {
565    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
566        f.debug_struct("AES").finish()
567    }
568}
569///Advanced encryption standard hardware accelerator 1
570pub mod aes;
571///Advanced encryption standard hardware accelerator 1
572///
573///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#AES)
574pub type SEC_AES = crate::Periph<aes::RegisterBlock, 0x520c_0000>;
575impl core::fmt::Debug for SEC_AES {
576    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
577        f.debug_struct("SEC_AES").finish()
578    }
579}
580///Advanced encryption standard hardware accelerator 1
581pub use self::aes as sec_aes;
582///Comparator
583///
584///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#COMP)
585pub type COMP = crate::Periph<comp::RegisterBlock, 0x4001_0200>;
586impl core::fmt::Debug for COMP {
587    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
588        f.debug_struct("COMP").finish()
589    }
590}
591///Comparator
592pub mod comp;
593///Comparator
594///
595///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#COMP)
596pub type SEC_COMP = crate::Periph<comp::RegisterBlock, 0x5001_0200>;
597impl core::fmt::Debug for SEC_COMP {
598    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
599        f.debug_struct("SEC_COMP").finish()
600    }
601}
602///Comparator
603pub use self::comp as sec_comp;
604///Cyclic redundancy check calculation unit
605///
606///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#CRC)
607pub type CRC = crate::Periph<crc::RegisterBlock, 0x4002_3000>;
608impl core::fmt::Debug for CRC {
609    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
610        f.debug_struct("CRC").finish()
611    }
612}
613///Cyclic redundancy check calculation unit
614pub mod crc;
615///Cyclic redundancy check calculation unit
616///
617///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#CRC)
618pub type SEC_CRC = crate::Periph<crc::RegisterBlock, 0x5002_3000>;
619impl core::fmt::Debug for SEC_CRC {
620    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
621        f.debug_struct("SEC_CRC").finish()
622    }
623}
624///Cyclic redundancy check calculation unit
625pub use self::crc as sec_crc;
626///Clock recovery system
627///
628///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#CRS)
629pub type CRS = crate::Periph<crs::RegisterBlock, 0x4000_6000>;
630impl core::fmt::Debug for CRS {
631    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
632        f.debug_struct("CRS").finish()
633    }
634}
635///Clock recovery system
636pub mod crs;
637///Clock recovery system
638///
639///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#CRS)
640pub type SEC_CRS = crate::Periph<crs::RegisterBlock, 0x5000_6000>;
641impl core::fmt::Debug for SEC_CRS {
642    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
643        f.debug_struct("SEC_CRS").finish()
644    }
645}
646///Clock recovery system
647pub use self::crs as sec_crs;
648///DAC
649///
650///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DAC)
651pub type DAC = crate::Periph<dac::RegisterBlock, 0x4000_7400>;
652impl core::fmt::Debug for DAC {
653    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
654        f.debug_struct("DAC").finish()
655    }
656}
657///DAC
658pub mod dac;
659///DAC
660///
661///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DAC)
662pub type SEC_DAC = crate::Periph<dac::RegisterBlock, 0x5000_7400>;
663impl core::fmt::Debug for SEC_DAC {
664    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
665        f.debug_struct("SEC_DAC").finish()
666    }
667}
668///DAC
669pub use self::dac as sec_dac;
670///MCU debug component
671///
672///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DBGMCU)
673pub type DBGMCU = crate::Periph<dbgmcu::RegisterBlock, 0xe004_4000>;
674impl core::fmt::Debug for DBGMCU {
675    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
676        f.debug_struct("DBGMCU").finish()
677    }
678}
679///MCU debug component
680pub mod dbgmcu;
681///Direct memory access controller
682///
683///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DMA1)
684pub type DMA1 = crate::Periph<dma1::RegisterBlock, 0x4002_0000>;
685impl core::fmt::Debug for DMA1 {
686    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
687        f.debug_struct("DMA1").finish()
688    }
689}
690///Direct memory access controller
691pub mod dma1;
692///Direct memory access controller
693///
694///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DMA1)
695pub type SEC_DMA1 = crate::Periph<dma1::RegisterBlock, 0x5002_0000>;
696impl core::fmt::Debug for SEC_DMA1 {
697    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
698        f.debug_struct("SEC_DMA1").finish()
699    }
700}
701///Direct memory access controller
702pub use self::dma1 as sec_dma1;
703///Direct memory access controller
704///
705///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DMA1)
706pub type DMA2 = crate::Periph<dma1::RegisterBlock, 0x4002_0400>;
707impl core::fmt::Debug for DMA2 {
708    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
709        f.debug_struct("DMA2").finish()
710    }
711}
712///Direct memory access controller
713pub use self::dma1 as dma2;
714///Direct memory access controller
715///
716///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DMA1)
717pub type SEC_DMA2 = crate::Periph<dma1::RegisterBlock, 0x5002_0400>;
718impl core::fmt::Debug for SEC_DMA2 {
719    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
720        f.debug_struct("SEC_DMA2").finish()
721    }
722}
723///Direct memory access controller
724pub use self::dma1 as sec_dma2;
725///Digital filter for sigma delta modulators
726///
727///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DFSDM1)
728pub type DFSDM1 = crate::Periph<dfsdm1::RegisterBlock, 0x4001_6000>;
729impl core::fmt::Debug for DFSDM1 {
730    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
731        f.debug_struct("DFSDM1").finish()
732    }
733}
734///Digital filter for sigma delta modulators
735pub mod dfsdm1;
736///Digital filter for sigma delta modulators
737///
738///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DFSDM1)
739pub type SEC_DFSDM1 = crate::Periph<dfsdm1::RegisterBlock, 0x5001_6000>;
740impl core::fmt::Debug for SEC_DFSDM1 {
741    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
742        f.debug_struct("SEC_DFSDM1").finish()
743    }
744}
745///Digital filter for sigma delta modulators
746pub use self::dfsdm1 as sec_dfsdm1;
747///Direct memory access Multiplexer
748///
749///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DMAMUX1)
750pub type DMAMUX1 = crate::Periph<dmamux1::RegisterBlock, 0x4002_0800>;
751impl core::fmt::Debug for DMAMUX1 {
752    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
753        f.debug_struct("DMAMUX1").finish()
754    }
755}
756///Direct memory access Multiplexer
757pub mod dmamux1;
758///Direct memory access Multiplexer
759///
760///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#DMAMUX1)
761pub type SEC_DMAMUX1 = crate::Periph<dmamux1::RegisterBlock, 0x5002_0800>;
762impl core::fmt::Debug for SEC_DMAMUX1 {
763    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
764        f.debug_struct("SEC_DMAMUX1").finish()
765    }
766}
767///Direct memory access Multiplexer
768pub use self::dmamux1 as sec_dmamux1;
769///External interrupt/event controller
770///
771///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#EXTI)
772pub type EXTI = crate::Periph<exti::RegisterBlock, 0x4002_f400>;
773impl core::fmt::Debug for EXTI {
774    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
775        f.debug_struct("EXTI").finish()
776    }
777}
778///External interrupt/event controller
779pub mod exti;
780///External interrupt/event controller
781///
782///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#EXTI)
783pub type SEC_EXTI = crate::Periph<exti::RegisterBlock, 0x5002_f400>;
784impl core::fmt::Debug for SEC_EXTI {
785    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
786        f.debug_struct("SEC_EXTI").finish()
787    }
788}
789///External interrupt/event controller
790pub use self::exti as sec_exti;
791///FDCAN1
792///
793///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#FDCAN1)
794pub type FDCAN1 = crate::Periph<fdcan1::RegisterBlock, 0x4000_a400>;
795impl core::fmt::Debug for FDCAN1 {
796    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
797        f.debug_struct("FDCAN1").finish()
798    }
799}
800///FDCAN1
801pub mod fdcan1;
802///FDCAN1
803///
804///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#FDCAN1)
805pub type SEC_FDCAN1 = crate::Periph<fdcan1::RegisterBlock, 0x5000_a400>;
806impl core::fmt::Debug for SEC_FDCAN1 {
807    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
808        f.debug_struct("SEC_FDCAN1").finish()
809    }
810}
811///FDCAN1
812pub use self::fdcan1 as sec_fdcan1;
813///Flash
814///
815///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#FLASH)
816pub type FLASH = crate::Periph<flash::RegisterBlock, 0x4002_2000>;
817impl core::fmt::Debug for FLASH {
818    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
819        f.debug_struct("FLASH").finish()
820    }
821}
822///Flash
823pub mod flash;
824///Flash
825///
826///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#FLASH)
827pub type SEC_FLASH = crate::Periph<flash::RegisterBlock, 0x5002_2000>;
828impl core::fmt::Debug for SEC_FLASH {
829    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
830        f.debug_struct("SEC_FLASH").finish()
831    }
832}
833///Flash
834pub use self::flash as sec_flash;
835///FMC
836///
837///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#FMC)
838pub type FMC = crate::Periph<fmc::RegisterBlock, 0x4402_0000>;
839impl core::fmt::Debug for FMC {
840    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
841        f.debug_struct("FMC").finish()
842    }
843}
844///FMC
845pub mod fmc;
846///FMC
847///
848///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#FMC)
849pub type SEC_FMC = crate::Periph<fmc::RegisterBlock, 0x5402_0000>;
850impl core::fmt::Debug for SEC_FMC {
851    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
852        f.debug_struct("SEC_FMC").finish()
853    }
854}
855///FMC
856pub use self::fmc as sec_fmc;
857///General-purpose I/Os
858///
859///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOA)
860pub type GPIOA = crate::Periph<gpioa::RegisterBlock, 0x4202_0000>;
861impl core::fmt::Debug for GPIOA {
862    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
863        f.debug_struct("GPIOA").finish()
864    }
865}
866///General-purpose I/Os
867pub mod gpioa;
868///General-purpose I/Os
869///
870///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOA)
871pub type SEC_GPIOA = crate::Periph<gpioa::RegisterBlock, 0x5202_0000>;
872impl core::fmt::Debug for SEC_GPIOA {
873    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
874        f.debug_struct("SEC_GPIOA").finish()
875    }
876}
877///General-purpose I/Os
878pub use self::gpioa as sec_gpioa;
879///General-purpose I/Os
880///
881///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOB)
882pub type GPIOB = crate::Periph<gpiob::RegisterBlock, 0x4202_0400>;
883impl core::fmt::Debug for GPIOB {
884    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
885        f.debug_struct("GPIOB").finish()
886    }
887}
888///General-purpose I/Os
889pub mod gpiob;
890///General-purpose I/Os
891///
892///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOB)
893pub type SEC_GPIOB = crate::Periph<gpiob::RegisterBlock, 0x5202_0400>;
894impl core::fmt::Debug for SEC_GPIOB {
895    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
896        f.debug_struct("SEC_GPIOB").finish()
897    }
898}
899///General-purpose I/Os
900pub use self::gpiob as sec_gpiob;
901///General-purpose I/Os
902///
903///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
904pub type GPIOC = crate::Periph<gpioc::RegisterBlock, 0x4202_0800>;
905impl core::fmt::Debug for GPIOC {
906    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
907        f.debug_struct("GPIOC").finish()
908    }
909}
910///General-purpose I/Os
911pub mod gpioc;
912///General-purpose I/Os
913///
914///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
915pub type GPIOD = crate::Periph<gpioc::RegisterBlock, 0x4202_0c00>;
916impl core::fmt::Debug for GPIOD {
917    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
918        f.debug_struct("GPIOD").finish()
919    }
920}
921///General-purpose I/Os
922pub use self::gpioc as gpiod;
923///General-purpose I/Os
924///
925///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
926pub type GPIOE = crate::Periph<gpioc::RegisterBlock, 0x4202_1000>;
927impl core::fmt::Debug for GPIOE {
928    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
929        f.debug_struct("GPIOE").finish()
930    }
931}
932///General-purpose I/Os
933pub use self::gpioc as gpioe;
934///General-purpose I/Os
935///
936///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
937pub type GPIOF = crate::Periph<gpioc::RegisterBlock, 0x4202_1400>;
938impl core::fmt::Debug for GPIOF {
939    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
940        f.debug_struct("GPIOF").finish()
941    }
942}
943///General-purpose I/Os
944pub use self::gpioc as gpiof;
945///General-purpose I/Os
946///
947///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
948pub type GPIOG = crate::Periph<gpioc::RegisterBlock, 0x4202_1800>;
949impl core::fmt::Debug for GPIOG {
950    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
951        f.debug_struct("GPIOG").finish()
952    }
953}
954///General-purpose I/Os
955pub use self::gpioc as gpiog;
956///General-purpose I/Os
957///
958///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
959pub type SEC_GPIOC = crate::Periph<gpioc::RegisterBlock, 0x5202_0800>;
960impl core::fmt::Debug for SEC_GPIOC {
961    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
962        f.debug_struct("SEC_GPIOC").finish()
963    }
964}
965///General-purpose I/Os
966pub use self::gpioc as sec_gpioc;
967///General-purpose I/Os
968///
969///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
970pub type SEC_GPIOD = crate::Periph<gpioc::RegisterBlock, 0x5202_0c00>;
971impl core::fmt::Debug for SEC_GPIOD {
972    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
973        f.debug_struct("SEC_GPIOD").finish()
974    }
975}
976///General-purpose I/Os
977pub use self::gpioc as sec_gpiod;
978///General-purpose I/Os
979///
980///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
981pub type SEC_GPIOE = crate::Periph<gpioc::RegisterBlock, 0x5202_1000>;
982impl core::fmt::Debug for SEC_GPIOE {
983    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
984        f.debug_struct("SEC_GPIOE").finish()
985    }
986}
987///General-purpose I/Os
988pub use self::gpioc as sec_gpioe;
989///General-purpose I/Os
990///
991///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
992pub type SEC_GPIOF = crate::Periph<gpioc::RegisterBlock, 0x5202_1400>;
993impl core::fmt::Debug for SEC_GPIOF {
994    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
995        f.debug_struct("SEC_GPIOF").finish()
996    }
997}
998///General-purpose I/Os
999pub use self::gpioc as sec_gpiof;
1000///General-purpose I/Os
1001///
1002///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOC)
1003pub type SEC_GPIOG = crate::Periph<gpioc::RegisterBlock, 0x5202_1800>;
1004impl core::fmt::Debug for SEC_GPIOG {
1005    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1006        f.debug_struct("SEC_GPIOG").finish()
1007    }
1008}
1009///General-purpose I/Os
1010pub use self::gpioc as sec_gpiog;
1011///General-purpose I/Os
1012///
1013///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOH)
1014pub type GPIOH = crate::Periph<gpioh::RegisterBlock, 0x4202_1c00>;
1015impl core::fmt::Debug for GPIOH {
1016    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1017        f.debug_struct("GPIOH").finish()
1018    }
1019}
1020///General-purpose I/Os
1021pub mod gpioh;
1022///General-purpose I/Os
1023///
1024///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GPIOH)
1025pub type SEC_GPIOH = crate::Periph<gpioh::RegisterBlock, 0x5202_1c00>;
1026impl core::fmt::Debug for SEC_GPIOH {
1027    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1028        f.debug_struct("SEC_GPIOH").finish()
1029    }
1030}
1031///General-purpose I/Os
1032pub use self::gpioh as sec_gpioh;
1033///GTZC_MPCBB1
1034///
1035///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GTZC_MPCBB1)
1036pub type GTZC_MPCBB1 = crate::Periph<gtzc_mpcbb1::RegisterBlock, 0x4003_2c00>;
1037impl core::fmt::Debug for GTZC_MPCBB1 {
1038    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1039        f.debug_struct("GTZC_MPCBB1").finish()
1040    }
1041}
1042///GTZC_MPCBB1
1043pub mod gtzc_mpcbb1;
1044///SEC_GTZC_MPCBB1
1045///
1046///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GTZC_MPCBB1)
1047pub type SEC_GTZC_MPCBB1 = crate::Periph<gtzc_mpcbb1::RegisterBlock, 0x5003_2c00>;
1048impl core::fmt::Debug for SEC_GTZC_MPCBB1 {
1049    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1050        f.debug_struct("SEC_GTZC_MPCBB1").finish()
1051    }
1052}
1053///SEC_GTZC_MPCBB1
1054pub use self::gtzc_mpcbb1 as sec_gtzc_mpcbb1;
1055///GTZC_MPCBB2
1056///
1057///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GTZC_MPCBB2)
1058pub type GTZC_MPCBB2 = crate::Periph<gtzc_mpcbb2::RegisterBlock, 0x4003_3000>;
1059impl core::fmt::Debug for GTZC_MPCBB2 {
1060    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1061        f.debug_struct("GTZC_MPCBB2").finish()
1062    }
1063}
1064///GTZC_MPCBB2
1065pub mod gtzc_mpcbb2;
1066///SEC_GTZC_MPCBB2
1067///
1068///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GTZC_MPCBB2)
1069pub type SEC_GTZC_MPCBB2 = crate::Periph<gtzc_mpcbb2::RegisterBlock, 0x5003_3000>;
1070impl core::fmt::Debug for SEC_GTZC_MPCBB2 {
1071    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1072        f.debug_struct("SEC_GTZC_MPCBB2").finish()
1073    }
1074}
1075///SEC_GTZC_MPCBB2
1076pub use self::gtzc_mpcbb2 as sec_gtzc_mpcbb2;
1077///GTZC_TZIC
1078///
1079///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GTZC_TZIC)
1080pub type GTZC_TZIC = crate::Periph<gtzc_tzic::RegisterBlock, 0x4003_2800>;
1081impl core::fmt::Debug for GTZC_TZIC {
1082    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1083        f.debug_struct("GTZC_TZIC").finish()
1084    }
1085}
1086///GTZC_TZIC
1087pub mod gtzc_tzic;
1088///GTZC_TZIC
1089///
1090///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GTZC_TZIC)
1091pub type SEC_GTZC_TZIC = crate::Periph<gtzc_tzic::RegisterBlock, 0x5003_2800>;
1092impl core::fmt::Debug for SEC_GTZC_TZIC {
1093    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1094        f.debug_struct("SEC_GTZC_TZIC").finish()
1095    }
1096}
1097///GTZC_TZIC
1098pub use self::gtzc_tzic as sec_gtzc_tzic;
1099///GTZC_TZSC
1100///
1101///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GTZC_TZSC)
1102pub type GTZC_TZSC = crate::Periph<gtzc_tzsc::RegisterBlock, 0x4003_2400>;
1103impl core::fmt::Debug for GTZC_TZSC {
1104    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1105        f.debug_struct("GTZC_TZSC").finish()
1106    }
1107}
1108///GTZC_TZSC
1109pub mod gtzc_tzsc;
1110///GTZC_TZSC
1111///
1112///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#GTZC_TZSC)
1113pub type SEC_GTZC_TZSC = crate::Periph<gtzc_tzsc::RegisterBlock, 0x5003_2400>;
1114impl core::fmt::Debug for SEC_GTZC_TZSC {
1115    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1116        f.debug_struct("SEC_GTZC_TZSC").finish()
1117    }
1118}
1119///GTZC_TZSC
1120pub use self::gtzc_tzsc as sec_gtzc_tzsc;
1121///Hash processor
1122///
1123///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#HASH)
1124pub type HASH = crate::Periph<hash::RegisterBlock, 0x420c_0400>;
1125impl core::fmt::Debug for HASH {
1126    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1127        f.debug_struct("HASH").finish()
1128    }
1129}
1130///Hash processor
1131pub mod hash;
1132///Hash processor
1133///
1134///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#HASH)
1135pub type SEC_HASH = crate::Periph<hash::RegisterBlock, 0x520c_0400>;
1136impl core::fmt::Debug for SEC_HASH {
1137    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1138        f.debug_struct("SEC_HASH").finish()
1139    }
1140}
1141///Hash processor
1142pub use self::hash as sec_hash;
1143///Inter-integrated circuit
1144///
1145///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#I2C1)
1146pub type I2C1 = crate::Periph<i2c1::RegisterBlock, 0x4000_5400>;
1147impl core::fmt::Debug for I2C1 {
1148    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1149        f.debug_struct("I2C1").finish()
1150    }
1151}
1152///Inter-integrated circuit
1153pub mod i2c1;
1154///Inter-integrated circuit
1155///
1156///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#I2C1)
1157pub type I2C2 = crate::Periph<i2c1::RegisterBlock, 0x4000_5800>;
1158impl core::fmt::Debug for I2C2 {
1159    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1160        f.debug_struct("I2C2").finish()
1161    }
1162}
1163///Inter-integrated circuit
1164pub use self::i2c1 as i2c2;
1165///Inter-integrated circuit
1166///
1167///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#I2C1)
1168pub type I2C3 = crate::Periph<i2c1::RegisterBlock, 0x4000_5c00>;
1169impl core::fmt::Debug for I2C3 {
1170    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1171        f.debug_struct("I2C3").finish()
1172    }
1173}
1174///Inter-integrated circuit
1175pub use self::i2c1 as i2c3;
1176///Inter-integrated circuit
1177///
1178///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#I2C1)
1179pub type I2C4 = crate::Periph<i2c1::RegisterBlock, 0x4000_8400>;
1180impl core::fmt::Debug for I2C4 {
1181    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1182        f.debug_struct("I2C4").finish()
1183    }
1184}
1185///Inter-integrated circuit
1186pub use self::i2c1 as i2c4;
1187///Inter-integrated circuit
1188///
1189///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#I2C1)
1190pub type SEC_I2C1 = crate::Periph<i2c1::RegisterBlock, 0x5000_5400>;
1191impl core::fmt::Debug for SEC_I2C1 {
1192    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1193        f.debug_struct("SEC_I2C1").finish()
1194    }
1195}
1196///Inter-integrated circuit
1197pub use self::i2c1 as sec_i2c1;
1198///Inter-integrated circuit
1199///
1200///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#I2C1)
1201pub type SEC_I2C2 = crate::Periph<i2c1::RegisterBlock, 0x5000_5800>;
1202impl core::fmt::Debug for SEC_I2C2 {
1203    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1204        f.debug_struct("SEC_I2C2").finish()
1205    }
1206}
1207///Inter-integrated circuit
1208pub use self::i2c1 as sec_i2c2;
1209///Inter-integrated circuit
1210///
1211///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#I2C1)
1212pub type SEC_I2C3 = crate::Periph<i2c1::RegisterBlock, 0x5000_5c00>;
1213impl core::fmt::Debug for SEC_I2C3 {
1214    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1215        f.debug_struct("SEC_I2C3").finish()
1216    }
1217}
1218///Inter-integrated circuit
1219pub use self::i2c1 as sec_i2c3;
1220///Inter-integrated circuit
1221///
1222///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#I2C1)
1223pub type SEC_I2C4 = crate::Periph<i2c1::RegisterBlock, 0x5000_8400>;
1224impl core::fmt::Debug for SEC_I2C4 {
1225    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1226        f.debug_struct("SEC_I2C4").finish()
1227    }
1228}
1229///Inter-integrated circuit
1230pub use self::i2c1 as sec_i2c4;
1231///ICache
1232///
1233///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#ICACHE)
1234pub type ICACHE = crate::Periph<icache::RegisterBlock, 0x4003_0400>;
1235impl core::fmt::Debug for ICACHE {
1236    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1237        f.debug_struct("ICACHE").finish()
1238    }
1239}
1240///ICache
1241pub mod icache;
1242///ICache
1243///
1244///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#ICACHE)
1245pub type SEC_ICACHE = crate::Periph<icache::RegisterBlock, 0x5003_0400>;
1246impl core::fmt::Debug for SEC_ICACHE {
1247    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1248        f.debug_struct("SEC_ICACHE").finish()
1249    }
1250}
1251///ICache
1252pub use self::icache as sec_icache;
1253///Independent watchdog
1254///
1255///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#IWDG)
1256pub type IWDG = crate::Periph<iwdg::RegisterBlock, 0x4000_3000>;
1257impl core::fmt::Debug for IWDG {
1258    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1259        f.debug_struct("IWDG").finish()
1260    }
1261}
1262///Independent watchdog
1263pub mod iwdg;
1264///Independent watchdog
1265///
1266///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#IWDG)
1267pub type SEC_IWDG = crate::Periph<iwdg::RegisterBlock, 0x5000_3000>;
1268impl core::fmt::Debug for SEC_IWDG {
1269    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1270        f.debug_struct("SEC_IWDG").finish()
1271    }
1272}
1273///Independent watchdog
1274pub use self::iwdg as sec_iwdg;
1275///Low power timer
1276///
1277///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#LPTIM1)
1278pub type LPTIM1 = crate::Periph<lptim1::RegisterBlock, 0x4000_7c00>;
1279impl core::fmt::Debug for LPTIM1 {
1280    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1281        f.debug_struct("LPTIM1").finish()
1282    }
1283}
1284///Low power timer
1285pub mod lptim1;
1286///Low power timer
1287///
1288///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#LPTIM1)
1289pub type LPTIM2 = crate::Periph<lptim1::RegisterBlock, 0x4000_9400>;
1290impl core::fmt::Debug for LPTIM2 {
1291    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1292        f.debug_struct("LPTIM2").finish()
1293    }
1294}
1295///Low power timer
1296pub use self::lptim1 as lptim2;
1297///Low power timer
1298///
1299///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#LPTIM1)
1300pub type LPTIM3 = crate::Periph<lptim1::RegisterBlock, 0x4000_9800>;
1301impl core::fmt::Debug for LPTIM3 {
1302    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1303        f.debug_struct("LPTIM3").finish()
1304    }
1305}
1306///Low power timer
1307pub use self::lptim1 as lptim3;
1308///Low power timer
1309///
1310///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#LPTIM1)
1311pub type SEC_LPTIM1 = crate::Periph<lptim1::RegisterBlock, 0x5000_7c00>;
1312impl core::fmt::Debug for SEC_LPTIM1 {
1313    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1314        f.debug_struct("SEC_LPTIM1").finish()
1315    }
1316}
1317///Low power timer
1318pub use self::lptim1 as sec_lptim1;
1319///Low power timer
1320///
1321///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#LPTIM1)
1322pub type SEC_LPTIM2 = crate::Periph<lptim1::RegisterBlock, 0x5000_9400>;
1323impl core::fmt::Debug for SEC_LPTIM2 {
1324    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1325        f.debug_struct("SEC_LPTIM2").finish()
1326    }
1327}
1328///Low power timer
1329pub use self::lptim1 as sec_lptim2;
1330///Low power timer
1331///
1332///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#LPTIM1)
1333pub type SEC_LPTIM3 = crate::Periph<lptim1::RegisterBlock, 0x5000_9800>;
1334impl core::fmt::Debug for SEC_LPTIM3 {
1335    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1336        f.debug_struct("SEC_LPTIM3").finish()
1337    }
1338}
1339///Low power timer
1340pub use self::lptim1 as sec_lptim3;
1341///Universal synchronous asynchronous receiver transmitter
1342///
1343///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#LPUART1)
1344pub type LPUART1 = crate::Periph<lpuart1::RegisterBlock, 0x4000_8000>;
1345impl core::fmt::Debug for LPUART1 {
1346    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1347        f.debug_struct("LPUART1").finish()
1348    }
1349}
1350///Universal synchronous asynchronous receiver transmitter
1351pub mod lpuart1;
1352///Universal synchronous asynchronous receiver transmitter
1353///
1354///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#LPUART1)
1355pub type SEC_LPUART1 = crate::Periph<lpuart1::RegisterBlock, 0x5000_8000>;
1356impl core::fmt::Debug for SEC_LPUART1 {
1357    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1358        f.debug_struct("SEC_LPUART1").finish()
1359    }
1360}
1361///Universal synchronous asynchronous receiver transmitter
1362pub use self::lpuart1 as sec_lpuart1;
1363///OctoSPI
1364///
1365///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#OCTOSPI1)
1366pub type OCTOSPI1 = crate::Periph<octospi1::RegisterBlock, 0x4402_1000>;
1367impl core::fmt::Debug for OCTOSPI1 {
1368    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1369        f.debug_struct("OCTOSPI1").finish()
1370    }
1371}
1372///OctoSPI
1373pub mod octospi1;
1374///OctoSPI
1375///
1376///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#OCTOSPI1)
1377pub type SEC_OCTOSPI1 = crate::Periph<octospi1::RegisterBlock, 0x5402_1000>;
1378impl core::fmt::Debug for SEC_OCTOSPI1 {
1379    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1380        f.debug_struct("SEC_OCTOSPI1").finish()
1381    }
1382}
1383///OctoSPI
1384pub use self::octospi1 as sec_octospi1;
1385///Operational amplifiers
1386///
1387///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#OPAMP)
1388pub type OPAMP = crate::Periph<opamp::RegisterBlock, 0x4000_7800>;
1389impl core::fmt::Debug for OPAMP {
1390    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1391        f.debug_struct("OPAMP").finish()
1392    }
1393}
1394///Operational amplifiers
1395pub mod opamp;
1396///Operational amplifiers
1397///
1398///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#OPAMP)
1399pub type SEC_OPAMP = crate::Periph<opamp::RegisterBlock, 0x5000_7800>;
1400impl core::fmt::Debug for SEC_OPAMP {
1401    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1402        f.debug_struct("SEC_OPAMP").finish()
1403    }
1404}
1405///Operational amplifiers
1406pub use self::opamp as sec_opamp;
1407///On-The-Fly Decryption engine
1408///
1409///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#OTFDEC1)
1410pub type OTFDEC1 = crate::Periph<otfdec1::RegisterBlock, 0x420c_5000>;
1411impl core::fmt::Debug for OTFDEC1 {
1412    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1413        f.debug_struct("OTFDEC1").finish()
1414    }
1415}
1416///On-The-Fly Decryption engine
1417pub mod otfdec1;
1418///On-The-Fly Decryption engine
1419///
1420///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#OTFDEC1)
1421pub type SEC_OTFDEC1 = crate::Periph<otfdec1::RegisterBlock, 0x520c_5000>;
1422impl core::fmt::Debug for SEC_OTFDEC1 {
1423    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1424        f.debug_struct("SEC_OTFDEC1").finish()
1425    }
1426}
1427///On-The-Fly Decryption engine
1428pub use self::otfdec1 as sec_otfdec1;
1429///PKA
1430///
1431///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#PKA)
1432pub type PKA = crate::Periph<pka::RegisterBlock, 0x420c_2000>;
1433impl core::fmt::Debug for PKA {
1434    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1435        f.debug_struct("PKA").finish()
1436    }
1437}
1438///PKA
1439pub mod pka;
1440///PKA
1441///
1442///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#PKA)
1443pub type SEC_PKA = crate::Periph<pka::RegisterBlock, 0x520c_2000>;
1444impl core::fmt::Debug for SEC_PKA {
1445    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1446        f.debug_struct("SEC_PKA").finish()
1447    }
1448}
1449///PKA
1450pub use self::pka as sec_pka;
1451///Power control
1452///
1453///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#PWR)
1454pub type PWR = crate::Periph<pwr::RegisterBlock, 0x4000_7000>;
1455impl core::fmt::Debug for PWR {
1456    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1457        f.debug_struct("PWR").finish()
1458    }
1459}
1460///Power control
1461pub mod pwr;
1462///Power control
1463///
1464///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#PWR)
1465pub type SEC_PWR = crate::Periph<pwr::RegisterBlock, 0x5000_7000>;
1466impl core::fmt::Debug for SEC_PWR {
1467    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1468        f.debug_struct("SEC_PWR").finish()
1469    }
1470}
1471///Power control
1472pub use self::pwr as sec_pwr;
1473///Reset and clock control
1474///
1475///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#RCC)
1476pub type RCC = crate::Periph<rcc::RegisterBlock, 0x4002_1000>;
1477impl core::fmt::Debug for RCC {
1478    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1479        f.debug_struct("RCC").finish()
1480    }
1481}
1482///Reset and clock control
1483pub mod rcc;
1484///Reset and clock control
1485///
1486///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#RCC)
1487pub type SEC_RCC = crate::Periph<rcc::RegisterBlock, 0x5002_1000>;
1488impl core::fmt::Debug for SEC_RCC {
1489    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1490        f.debug_struct("SEC_RCC").finish()
1491    }
1492}
1493///Reset and clock control
1494pub use self::rcc as sec_rcc;
1495///RNG
1496///
1497///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#RNG)
1498pub type RNG = crate::Periph<rng::RegisterBlock, 0x420c_0800>;
1499impl core::fmt::Debug for RNG {
1500    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1501        f.debug_struct("RNG").finish()
1502    }
1503}
1504///RNG
1505pub mod rng;
1506///RNG
1507///
1508///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#RNG)
1509pub type SEC_RNG = crate::Periph<rng::RegisterBlock, 0x520c_0800>;
1510impl core::fmt::Debug for SEC_RNG {
1511    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1512        f.debug_struct("SEC_RNG").finish()
1513    }
1514}
1515///RNG
1516pub use self::rng as sec_rng;
1517///Real-time clock
1518///
1519///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#RTC)
1520pub type RTC = crate::Periph<rtc::RegisterBlock, 0x4000_2800>;
1521impl core::fmt::Debug for RTC {
1522    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1523        f.debug_struct("RTC").finish()
1524    }
1525}
1526///Real-time clock
1527pub mod rtc;
1528///Real-time clock
1529///
1530///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#RTC)
1531pub type SEC_RTC = crate::Periph<rtc::RegisterBlock, 0x5000_2800>;
1532impl core::fmt::Debug for SEC_RTC {
1533    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1534        f.debug_struct("SEC_RTC").finish()
1535    }
1536}
1537///Real-time clock
1538pub use self::rtc as sec_rtc;
1539///Serial audio interface
1540///
1541///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SAI1)
1542pub type SAI1 = crate::Periph<sai1::RegisterBlock, 0x4001_5400>;
1543impl core::fmt::Debug for SAI1 {
1544    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1545        f.debug_struct("SAI1").finish()
1546    }
1547}
1548///Serial audio interface
1549pub mod sai1;
1550///Serial audio interface
1551///
1552///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SAI1)
1553pub type SAI2 = crate::Periph<sai1::RegisterBlock, 0x4001_5800>;
1554impl core::fmt::Debug for SAI2 {
1555    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1556        f.debug_struct("SAI2").finish()
1557    }
1558}
1559///Serial audio interface
1560pub use self::sai1 as sai2;
1561///Serial audio interface
1562///
1563///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SAI1)
1564pub type SEC_SAI1 = crate::Periph<sai1::RegisterBlock, 0x5001_5400>;
1565impl core::fmt::Debug for SEC_SAI1 {
1566    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1567        f.debug_struct("SEC_SAI1").finish()
1568    }
1569}
1570///Serial audio interface
1571pub use self::sai1 as sec_sai1;
1572///Serial audio interface
1573///
1574///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SAI1)
1575pub type SEC_SAI2 = crate::Periph<sai1::RegisterBlock, 0x5001_5800>;
1576impl core::fmt::Debug for SEC_SAI2 {
1577    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1578        f.debug_struct("SEC_SAI2").finish()
1579    }
1580}
1581///Serial audio interface
1582pub use self::sai1 as sec_sai2;
1583///SDMMC1
1584///
1585///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SDMMC1)
1586pub type SDMMC1 = crate::Periph<sdmmc1::RegisterBlock, 0x420c_8000>;
1587impl core::fmt::Debug for SDMMC1 {
1588    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1589        f.debug_struct("SDMMC1").finish()
1590    }
1591}
1592///SDMMC1
1593pub mod sdmmc1;
1594///SDMMC1
1595///
1596///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SDMMC1)
1597pub type SEC_SDMMC1 = crate::Periph<sdmmc1::RegisterBlock, 0x520c_8000>;
1598impl core::fmt::Debug for SEC_SDMMC1 {
1599    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1600        f.debug_struct("SEC_SDMMC1").finish()
1601    }
1602}
1603///SDMMC1
1604pub use self::sdmmc1 as sec_sdmmc1;
1605///Serial peripheral interface
1606///
1607///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SPI1)
1608pub type SPI1 = crate::Periph<spi1::RegisterBlock, 0x4001_3000>;
1609impl core::fmt::Debug for SPI1 {
1610    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1611        f.debug_struct("SPI1").finish()
1612    }
1613}
1614///Serial peripheral interface
1615pub mod spi1;
1616///Serial peripheral interface
1617///
1618///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SPI1)
1619pub type SPI2 = crate::Periph<spi1::RegisterBlock, 0x4000_3800>;
1620impl core::fmt::Debug for SPI2 {
1621    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1622        f.debug_struct("SPI2").finish()
1623    }
1624}
1625///Serial peripheral interface
1626pub use self::spi1 as spi2;
1627///Serial peripheral interface
1628///
1629///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SPI1)
1630pub type SPI3 = crate::Periph<spi1::RegisterBlock, 0x4000_3c00>;
1631impl core::fmt::Debug for SPI3 {
1632    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1633        f.debug_struct("SPI3").finish()
1634    }
1635}
1636///Serial peripheral interface
1637pub use self::spi1 as spi3;
1638///Serial peripheral interface
1639///
1640///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SPI1)
1641pub type SEC_SPI1 = crate::Periph<spi1::RegisterBlock, 0x5001_3000>;
1642impl core::fmt::Debug for SEC_SPI1 {
1643    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1644        f.debug_struct("SEC_SPI1").finish()
1645    }
1646}
1647///Serial peripheral interface
1648pub use self::spi1 as sec_spi1;
1649///Serial peripheral interface
1650///
1651///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SPI1)
1652pub type SEC_SPI2 = crate::Periph<spi1::RegisterBlock, 0x5000_3800>;
1653impl core::fmt::Debug for SEC_SPI2 {
1654    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1655        f.debug_struct("SEC_SPI2").finish()
1656    }
1657}
1658///Serial peripheral interface
1659pub use self::spi1 as sec_spi2;
1660///Serial peripheral interface
1661///
1662///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SPI1)
1663pub type SEC_SPI3 = crate::Periph<spi1::RegisterBlock, 0x5000_3c00>;
1664impl core::fmt::Debug for SEC_SPI3 {
1665    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1666        f.debug_struct("SEC_SPI3").finish()
1667    }
1668}
1669///Serial peripheral interface
1670pub use self::spi1 as sec_spi3;
1671///System configuration controller
1672///
1673///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SYSCFG)
1674pub type SYSCFG = crate::Periph<syscfg::RegisterBlock, 0x4001_0000>;
1675impl core::fmt::Debug for SYSCFG {
1676    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1677        f.debug_struct("SYSCFG").finish()
1678    }
1679}
1680///System configuration controller
1681pub mod syscfg;
1682///System configuration controller
1683///
1684///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#SYSCFG)
1685pub type SEC_SYSCFG = crate::Periph<syscfg::RegisterBlock, 0x5001_0000>;
1686impl core::fmt::Debug for SEC_SYSCFG {
1687    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1688        f.debug_struct("SEC_SYSCFG").finish()
1689    }
1690}
1691///System configuration controller
1692pub use self::syscfg as sec_syscfg;
1693///Tamper and backup registers
1694///
1695///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TAMP)
1696pub type TAMP = crate::Periph<tamp::RegisterBlock, 0x4000_3400>;
1697impl core::fmt::Debug for TAMP {
1698    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1699        f.debug_struct("TAMP").finish()
1700    }
1701}
1702///Tamper and backup registers
1703pub mod tamp;
1704///Tamper and backup registers
1705///
1706///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TAMP)
1707pub type SEC_TAMP = crate::Periph<tamp::RegisterBlock, 0x5000_3400>;
1708impl core::fmt::Debug for SEC_TAMP {
1709    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1710        f.debug_struct("SEC_TAMP").finish()
1711    }
1712}
1713///Tamper and backup registers
1714pub use self::tamp as sec_tamp;
1715///Advanced-timers
1716///
1717///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM1)
1718pub type TIM1 = crate::Periph<tim1::RegisterBlock, 0x4001_2c00>;
1719impl core::fmt::Debug for TIM1 {
1720    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1721        f.debug_struct("TIM1").finish()
1722    }
1723}
1724///Advanced-timers
1725pub mod tim1;
1726///Advanced-timers
1727///
1728///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM1)
1729pub type SEC_TIM1 = crate::Periph<tim1::RegisterBlock, 0x5001_2c00>;
1730impl core::fmt::Debug for SEC_TIM1 {
1731    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1732        f.debug_struct("SEC_TIM1").finish()
1733    }
1734}
1735///Advanced-timers
1736pub use self::tim1 as sec_tim1;
1737///General-purpose-timers
1738///
1739///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM2)
1740pub type TIM2 = crate::Periph<tim2::RegisterBlock, 0x4000_0000>;
1741impl core::fmt::Debug for TIM2 {
1742    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1743        f.debug_struct("TIM2").finish()
1744    }
1745}
1746///General-purpose-timers
1747pub mod tim2;
1748///General-purpose-timers
1749///
1750///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM2)
1751pub type SEC_TIM2 = crate::Periph<tim2::RegisterBlock, 0x5000_0000>;
1752impl core::fmt::Debug for SEC_TIM2 {
1753    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1754        f.debug_struct("SEC_TIM2").finish()
1755    }
1756}
1757///General-purpose-timers
1758pub use self::tim2 as sec_tim2;
1759///General-purpose-timers
1760///
1761///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM3)
1762pub type TIM3 = crate::Periph<tim3::RegisterBlock, 0x4000_0400>;
1763impl core::fmt::Debug for TIM3 {
1764    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1765        f.debug_struct("TIM3").finish()
1766    }
1767}
1768///General-purpose-timers
1769pub mod tim3;
1770///General-purpose-timers
1771///
1772///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM3)
1773pub type SEC_TIM3 = crate::Periph<tim3::RegisterBlock, 0x5000_0400>;
1774impl core::fmt::Debug for SEC_TIM3 {
1775    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1776        f.debug_struct("SEC_TIM3").finish()
1777    }
1778}
1779///General-purpose-timers
1780pub use self::tim3 as sec_tim3;
1781///General-purpose-timers
1782///
1783///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM3)
1784pub type TIM4 = crate::Periph<tim3::RegisterBlock, 0x4000_0800>;
1785impl core::fmt::Debug for TIM4 {
1786    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1787        f.debug_struct("TIM4").finish()
1788    }
1789}
1790///General-purpose-timers
1791pub use self::tim3 as tim4;
1792///General-purpose-timers
1793///
1794///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM3)
1795pub type SEC_TIM4 = crate::Periph<tim3::RegisterBlock, 0x5000_0800>;
1796impl core::fmt::Debug for SEC_TIM4 {
1797    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1798        f.debug_struct("SEC_TIM4").finish()
1799    }
1800}
1801///General-purpose-timers
1802pub use self::tim3 as sec_tim4;
1803///General-purpose-timers
1804///
1805///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM2)
1806pub type TIM5 = crate::Periph<tim2::RegisterBlock, 0x4000_0c00>;
1807impl core::fmt::Debug for TIM5 {
1808    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1809        f.debug_struct("TIM5").finish()
1810    }
1811}
1812///General-purpose-timers
1813pub use self::tim2 as tim5;
1814///General-purpose-timers
1815///
1816///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM2)
1817pub type SEC_TIM5 = crate::Periph<tim2::RegisterBlock, 0x5000_0c00>;
1818impl core::fmt::Debug for SEC_TIM5 {
1819    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1820        f.debug_struct("SEC_TIM5").finish()
1821    }
1822}
1823///General-purpose-timers
1824pub use self::tim2 as sec_tim5;
1825///General-purpose-timers
1826///
1827///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM6)
1828pub type TIM6 = crate::Periph<tim6::RegisterBlock, 0x4000_1000>;
1829impl core::fmt::Debug for TIM6 {
1830    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1831        f.debug_struct("TIM6").finish()
1832    }
1833}
1834///General-purpose-timers
1835pub mod tim6;
1836///General-purpose-timers
1837///
1838///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM6)
1839pub type SEC_TIM6 = crate::Periph<tim6::RegisterBlock, 0x5000_1000>;
1840impl core::fmt::Debug for SEC_TIM6 {
1841    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1842        f.debug_struct("SEC_TIM6").finish()
1843    }
1844}
1845///General-purpose-timers
1846pub use self::tim6 as sec_tim6;
1847///General-purpose-timers
1848///
1849///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM6)
1850pub type TIM7 = crate::Periph<tim6::RegisterBlock, 0x4000_1400>;
1851impl core::fmt::Debug for TIM7 {
1852    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1853        f.debug_struct("TIM7").finish()
1854    }
1855}
1856///General-purpose-timers
1857pub use self::tim6 as tim7;
1858///General-purpose-timers
1859///
1860///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM6)
1861pub type SEC_TIM7 = crate::Periph<tim6::RegisterBlock, 0x5000_1400>;
1862impl core::fmt::Debug for SEC_TIM7 {
1863    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1864        f.debug_struct("SEC_TIM7").finish()
1865    }
1866}
1867///General-purpose-timers
1868pub use self::tim6 as sec_tim7;
1869///General purpose timers
1870///
1871///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM15)
1872pub type TIM15 = crate::Periph<tim15::RegisterBlock, 0x4001_4000>;
1873impl core::fmt::Debug for TIM15 {
1874    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1875        f.debug_struct("TIM15").finish()
1876    }
1877}
1878///General purpose timers
1879pub mod tim15;
1880///General purpose timers
1881///
1882///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM15)
1883pub type SEC_TIM15 = crate::Periph<tim15::RegisterBlock, 0x5001_4000>;
1884impl core::fmt::Debug for SEC_TIM15 {
1885    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1886        f.debug_struct("SEC_TIM15").finish()
1887    }
1888}
1889///General purpose timers
1890pub use self::tim15 as sec_tim15;
1891///General purpose timers
1892///
1893///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM16)
1894pub type TIM16 = crate::Periph<tim16::RegisterBlock, 0x4001_4400>;
1895impl core::fmt::Debug for TIM16 {
1896    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1897        f.debug_struct("TIM16").finish()
1898    }
1899}
1900///General purpose timers
1901pub mod tim16;
1902///General purpose timers
1903///
1904///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM16)
1905pub type SEC_TIM16 = crate::Periph<tim16::RegisterBlock, 0x5001_4400>;
1906impl core::fmt::Debug for SEC_TIM16 {
1907    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1908        f.debug_struct("SEC_TIM16").finish()
1909    }
1910}
1911///General purpose timers
1912pub use self::tim16 as sec_tim16;
1913///General purpose timers
1914///
1915///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM17)
1916pub type TIM17 = crate::Periph<tim17::RegisterBlock, 0x4001_4800>;
1917impl core::fmt::Debug for TIM17 {
1918    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1919        f.debug_struct("TIM17").finish()
1920    }
1921}
1922///General purpose timers
1923pub mod tim17;
1924///General purpose timers
1925///
1926///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM17)
1927pub type SEC_TIM17 = crate::Periph<tim17::RegisterBlock, 0x5001_4800>;
1928impl core::fmt::Debug for SEC_TIM17 {
1929    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1930        f.debug_struct("SEC_TIM17").finish()
1931    }
1932}
1933///General purpose timers
1934pub use self::tim17 as sec_tim17;
1935///Advanced-timers
1936///
1937///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM8)
1938pub type TIM8 = crate::Periph<tim8::RegisterBlock, 0x4001_3400>;
1939impl core::fmt::Debug for TIM8 {
1940    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1941        f.debug_struct("TIM8").finish()
1942    }
1943}
1944///Advanced-timers
1945pub mod tim8;
1946///Advanced-timers
1947///
1948///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TIM8)
1949pub type SEC_TIM8 = crate::Periph<tim8::RegisterBlock, 0x5001_3400>;
1950impl core::fmt::Debug for SEC_TIM8 {
1951    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1952        f.debug_struct("SEC_TIM8").finish()
1953    }
1954}
1955///Advanced-timers
1956pub use self::tim8 as sec_tim8;
1957///Touch sensing controller
1958///
1959///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TSC)
1960pub type TSC = crate::Periph<tsc::RegisterBlock, 0x4002_4000>;
1961impl core::fmt::Debug for TSC {
1962    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1963        f.debug_struct("TSC").finish()
1964    }
1965}
1966///Touch sensing controller
1967pub mod tsc;
1968///Touch sensing controller
1969///
1970///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#TSC)
1971pub type SEC_TSC = crate::Periph<tsc::RegisterBlock, 0x5002_4000>;
1972impl core::fmt::Debug for SEC_TSC {
1973    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1974        f.debug_struct("SEC_TSC").finish()
1975    }
1976}
1977///Touch sensing controller
1978pub use self::tsc as sec_tsc;
1979///Universal serial bus full-speed device interface
1980///
1981///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USB)
1982pub type USB = crate::Periph<usb::RegisterBlock, 0x4000_d400>;
1983impl core::fmt::Debug for USB {
1984    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1985        f.debug_struct("USB").finish()
1986    }
1987}
1988///Universal serial bus full-speed device interface
1989pub mod usb;
1990///Universal serial bus full-speed device interface
1991///
1992///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USB)
1993pub type SEC_USB = crate::Periph<usb::RegisterBlock, 0x5000_d400>;
1994impl core::fmt::Debug for SEC_USB {
1995    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1996        f.debug_struct("SEC_USB").finish()
1997    }
1998}
1999///Universal serial bus full-speed device interface
2000pub use self::usb as sec_usb;
2001///USB Power Delivery interface
2002///
2003///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#UCPD1)
2004pub type UCPD1 = crate::Periph<ucpd1::RegisterBlock, 0x4000_dc00>;
2005impl core::fmt::Debug for UCPD1 {
2006    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2007        f.debug_struct("UCPD1").finish()
2008    }
2009}
2010///USB Power Delivery interface
2011pub mod ucpd1;
2012///USB Power Delivery interface
2013///
2014///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#UCPD1)
2015pub type SEC_UCPD1 = crate::Periph<ucpd1::RegisterBlock, 0x5000_dc00>;
2016impl core::fmt::Debug for SEC_UCPD1 {
2017    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2018        f.debug_struct("SEC_UCPD1").finish()
2019    }
2020}
2021///USB Power Delivery interface
2022pub use self::ucpd1 as sec_ucpd1;
2023///Universal synchronous asynchronous receiver transmitter
2024///
2025///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2026pub type USART1 = crate::Periph<usart1::RegisterBlock, 0x4001_3800>;
2027impl core::fmt::Debug for USART1 {
2028    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2029        f.debug_struct("USART1").finish()
2030    }
2031}
2032///Universal synchronous asynchronous receiver transmitter
2033pub mod usart1;
2034///Universal synchronous asynchronous receiver transmitter
2035///
2036///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2037pub type SEC_USART1 = crate::Periph<usart1::RegisterBlock, 0x5001_3800>;
2038impl core::fmt::Debug for SEC_USART1 {
2039    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2040        f.debug_struct("SEC_USART1").finish()
2041    }
2042}
2043///Universal synchronous asynchronous receiver transmitter
2044pub use self::usart1 as sec_usart1;
2045///Universal synchronous asynchronous receiver transmitter
2046///
2047///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2048pub type USART2 = crate::Periph<usart1::RegisterBlock, 0x4000_4400>;
2049impl core::fmt::Debug for USART2 {
2050    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2051        f.debug_struct("USART2").finish()
2052    }
2053}
2054///Universal synchronous asynchronous receiver transmitter
2055pub use self::usart1 as usart2;
2056///Universal synchronous asynchronous receiver transmitter
2057///
2058///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2059pub type SEC_USART2 = crate::Periph<usart1::RegisterBlock, 0x5000_4400>;
2060impl core::fmt::Debug for SEC_USART2 {
2061    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2062        f.debug_struct("SEC_USART2").finish()
2063    }
2064}
2065///Universal synchronous asynchronous receiver transmitter
2066pub use self::usart1 as sec_usart2;
2067///Universal synchronous asynchronous receiver transmitter
2068///
2069///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2070pub type USART3 = crate::Periph<usart1::RegisterBlock, 0x4000_4800>;
2071impl core::fmt::Debug for USART3 {
2072    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2073        f.debug_struct("USART3").finish()
2074    }
2075}
2076///Universal synchronous asynchronous receiver transmitter
2077pub use self::usart1 as usart3;
2078///Universal synchronous asynchronous receiver transmitter
2079///
2080///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2081pub type SEC_USART3 = crate::Periph<usart1::RegisterBlock, 0x5000_4800>;
2082impl core::fmt::Debug for SEC_USART3 {
2083    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2084        f.debug_struct("SEC_USART3").finish()
2085    }
2086}
2087///Universal synchronous asynchronous receiver transmitter
2088pub use self::usart1 as sec_usart3;
2089///Universal synchronous asynchronous receiver transmitter
2090///
2091///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2092pub type UART4 = crate::Periph<usart1::RegisterBlock, 0x4000_4c00>;
2093impl core::fmt::Debug for UART4 {
2094    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2095        f.debug_struct("UART4").finish()
2096    }
2097}
2098///Universal synchronous asynchronous receiver transmitter
2099pub use self::usart1 as uart4;
2100///Universal synchronous asynchronous receiver transmitter
2101///
2102///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2103pub type UART5 = crate::Periph<usart1::RegisterBlock, 0x4000_5000>;
2104impl core::fmt::Debug for UART5 {
2105    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2106        f.debug_struct("UART5").finish()
2107    }
2108}
2109///Universal synchronous asynchronous receiver transmitter
2110pub use self::usart1 as uart5;
2111///Universal synchronous asynchronous receiver transmitter
2112///
2113///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2114pub type SEC_UART4 = crate::Periph<usart1::RegisterBlock, 0x5000_4c00>;
2115impl core::fmt::Debug for SEC_UART4 {
2116    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2117        f.debug_struct("SEC_UART4").finish()
2118    }
2119}
2120///Universal synchronous asynchronous receiver transmitter
2121pub use self::usart1 as sec_uart4;
2122///Universal synchronous asynchronous receiver transmitter
2123///
2124///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#USART1)
2125pub type SEC_UART5 = crate::Periph<usart1::RegisterBlock, 0x5000_5000>;
2126impl core::fmt::Debug for SEC_UART5 {
2127    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2128        f.debug_struct("SEC_UART5").finish()
2129    }
2130}
2131///Universal synchronous asynchronous receiver transmitter
2132pub use self::usart1 as sec_uart5;
2133///Voltage reference buffer
2134///
2135///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#VREFBUF)
2136pub type VREFBUF = crate::Periph<vrefbuf::RegisterBlock, 0x4001_0030>;
2137impl core::fmt::Debug for VREFBUF {
2138    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2139        f.debug_struct("VREFBUF").finish()
2140    }
2141}
2142///Voltage reference buffer
2143pub mod vrefbuf;
2144///Voltage reference buffer
2145///
2146///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#VREFBUF)
2147pub type SEC_VREFBUF = crate::Periph<vrefbuf::RegisterBlock, 0x5001_0030>;
2148impl core::fmt::Debug for SEC_VREFBUF {
2149    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2150        f.debug_struct("SEC_VREFBUF").finish()
2151    }
2152}
2153///Voltage reference buffer
2154pub use self::vrefbuf as sec_vrefbuf;
2155///System window watchdog
2156///
2157///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#WWDG)
2158pub type WWDG = crate::Periph<wwdg::RegisterBlock, 0x4000_2c00>;
2159impl core::fmt::Debug for WWDG {
2160    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2161        f.debug_struct("WWDG").finish()
2162    }
2163}
2164///System window watchdog
2165pub mod wwdg;
2166///System window watchdog
2167///
2168///See peripheral [structure](https://stm32-rs.github.io/stm32-rs/STM32L562.html#WWDG)
2169pub type SEC_WWDG = crate::Periph<wwdg::RegisterBlock, 0x5000_2c00>;
2170impl core::fmt::Debug for SEC_WWDG {
2171    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2172        f.debug_struct("SEC_WWDG").finish()
2173    }
2174}
2175///System window watchdog
2176pub use self::wwdg as sec_wwdg;
2177#[no_mangle]
2178static mut DEVICE_PERIPHERALS: bool = false;
2179/// All the peripherals.
2180#[allow(non_snake_case)]
2181pub struct Peripherals {
2182    ///ADC1
2183    pub ADC1: ADC1,
2184    ///SEC_ADC1
2185    pub SEC_ADC1: SEC_ADC1,
2186    ///ADC2
2187    pub ADC2: ADC2,
2188    ///SEC_ADC2
2189    pub SEC_ADC2: SEC_ADC2,
2190    ///ADC_Common
2191    pub ADC_COMMON: ADC_COMMON,
2192    ///SEC_ADC_Common
2193    pub SEC_ADC_COMMON: SEC_ADC_COMMON,
2194    ///AES
2195    pub AES: AES,
2196    ///SEC_AES
2197    pub SEC_AES: SEC_AES,
2198    ///COMP
2199    pub COMP: COMP,
2200    ///SEC_COMP
2201    pub SEC_COMP: SEC_COMP,
2202    ///CRC
2203    pub CRC: CRC,
2204    ///SEC_CRC
2205    pub SEC_CRC: SEC_CRC,
2206    ///CRS
2207    pub CRS: CRS,
2208    ///SEC_CRS
2209    pub SEC_CRS: SEC_CRS,
2210    ///DAC
2211    pub DAC: DAC,
2212    ///SEC_DAC
2213    pub SEC_DAC: SEC_DAC,
2214    ///DBGMCU
2215    pub DBGMCU: DBGMCU,
2216    ///DMA1
2217    pub DMA1: DMA1,
2218    ///SEC_DMA1
2219    pub SEC_DMA1: SEC_DMA1,
2220    ///DMA2
2221    pub DMA2: DMA2,
2222    ///SEC_DMA2
2223    pub SEC_DMA2: SEC_DMA2,
2224    ///DFSDM1
2225    pub DFSDM1: DFSDM1,
2226    ///SEC_DFSDM1
2227    pub SEC_DFSDM1: SEC_DFSDM1,
2228    ///DMAMUX1
2229    pub DMAMUX1: DMAMUX1,
2230    ///SEC_DMAMUX1
2231    pub SEC_DMAMUX1: SEC_DMAMUX1,
2232    ///EXTI
2233    pub EXTI: EXTI,
2234    ///SEC_EXTI
2235    pub SEC_EXTI: SEC_EXTI,
2236    ///FDCAN1
2237    pub FDCAN1: FDCAN1,
2238    ///SEC_FDCAN1
2239    pub SEC_FDCAN1: SEC_FDCAN1,
2240    ///FLASH
2241    pub FLASH: FLASH,
2242    ///SEC_FLASH
2243    pub SEC_FLASH: SEC_FLASH,
2244    ///FMC
2245    pub FMC: FMC,
2246    ///SEC_FMC
2247    pub SEC_FMC: SEC_FMC,
2248    ///GPIOA
2249    pub GPIOA: GPIOA,
2250    ///SEC_GPIOA
2251    pub SEC_GPIOA: SEC_GPIOA,
2252    ///GPIOB
2253    pub GPIOB: GPIOB,
2254    ///SEC_GPIOB
2255    pub SEC_GPIOB: SEC_GPIOB,
2256    ///GPIOC
2257    pub GPIOC: GPIOC,
2258    ///GPIOD
2259    pub GPIOD: GPIOD,
2260    ///GPIOE
2261    pub GPIOE: GPIOE,
2262    ///GPIOF
2263    pub GPIOF: GPIOF,
2264    ///GPIOG
2265    pub GPIOG: GPIOG,
2266    ///SEC_GPIOC
2267    pub SEC_GPIOC: SEC_GPIOC,
2268    ///SEC_GPIOD
2269    pub SEC_GPIOD: SEC_GPIOD,
2270    ///SEC_GPIOE
2271    pub SEC_GPIOE: SEC_GPIOE,
2272    ///SEC_GPIOF
2273    pub SEC_GPIOF: SEC_GPIOF,
2274    ///SEC_GPIOG
2275    pub SEC_GPIOG: SEC_GPIOG,
2276    ///GPIOH
2277    pub GPIOH: GPIOH,
2278    ///SEC_GPIOH
2279    pub SEC_GPIOH: SEC_GPIOH,
2280    ///GTZC_MPCBB1
2281    pub GTZC_MPCBB1: GTZC_MPCBB1,
2282    ///SEC_GTZC_MPCBB1
2283    pub SEC_GTZC_MPCBB1: SEC_GTZC_MPCBB1,
2284    ///GTZC_MPCBB2
2285    pub GTZC_MPCBB2: GTZC_MPCBB2,
2286    ///SEC_GTZC_MPCBB2
2287    pub SEC_GTZC_MPCBB2: SEC_GTZC_MPCBB2,
2288    ///GTZC_TZIC
2289    pub GTZC_TZIC: GTZC_TZIC,
2290    ///SEC_GTZC_TZIC
2291    pub SEC_GTZC_TZIC: SEC_GTZC_TZIC,
2292    ///GTZC_TZSC
2293    pub GTZC_TZSC: GTZC_TZSC,
2294    ///SEC_GTZC_TZSC
2295    pub SEC_GTZC_TZSC: SEC_GTZC_TZSC,
2296    ///HASH
2297    pub HASH: HASH,
2298    ///SEC_HASH
2299    pub SEC_HASH: SEC_HASH,
2300    ///I2C1
2301    pub I2C1: I2C1,
2302    ///I2C2
2303    pub I2C2: I2C2,
2304    ///I2C3
2305    pub I2C3: I2C3,
2306    ///I2C4
2307    pub I2C4: I2C4,
2308    ///SEC_I2C1
2309    pub SEC_I2C1: SEC_I2C1,
2310    ///SEC_I2C2
2311    pub SEC_I2C2: SEC_I2C2,
2312    ///SEC_I2C3
2313    pub SEC_I2C3: SEC_I2C3,
2314    ///SEC_I2C4
2315    pub SEC_I2C4: SEC_I2C4,
2316    ///ICACHE
2317    pub ICACHE: ICACHE,
2318    ///SEC_ICache
2319    pub SEC_ICACHE: SEC_ICACHE,
2320    ///IWDG
2321    pub IWDG: IWDG,
2322    ///SEC_IWDG
2323    pub SEC_IWDG: SEC_IWDG,
2324    ///LPTIM1
2325    pub LPTIM1: LPTIM1,
2326    ///LPTIM2
2327    pub LPTIM2: LPTIM2,
2328    ///LPTIM3
2329    pub LPTIM3: LPTIM3,
2330    ///SEC_LPTIM1
2331    pub SEC_LPTIM1: SEC_LPTIM1,
2332    ///SEC_LPTIM2
2333    pub SEC_LPTIM2: SEC_LPTIM2,
2334    ///SEC_LPTIM3
2335    pub SEC_LPTIM3: SEC_LPTIM3,
2336    ///LPUART1
2337    pub LPUART1: LPUART1,
2338    ///SEC_LPUART1
2339    pub SEC_LPUART1: SEC_LPUART1,
2340    ///OCTOSPI1
2341    pub OCTOSPI1: OCTOSPI1,
2342    ///SEC_OCTOSPI1
2343    pub SEC_OCTOSPI1: SEC_OCTOSPI1,
2344    ///OPAMP
2345    pub OPAMP: OPAMP,
2346    ///SEC_OPAMP
2347    pub SEC_OPAMP: SEC_OPAMP,
2348    ///OTFDEC1
2349    pub OTFDEC1: OTFDEC1,
2350    ///SEC_OTFDEC1
2351    pub SEC_OTFDEC1: SEC_OTFDEC1,
2352    ///PKA
2353    pub PKA: PKA,
2354    ///SEC_PKA
2355    pub SEC_PKA: SEC_PKA,
2356    ///PWR
2357    pub PWR: PWR,
2358    ///SEC_PWR
2359    pub SEC_PWR: SEC_PWR,
2360    ///RCC
2361    pub RCC: RCC,
2362    ///SEC_RCC
2363    pub SEC_RCC: SEC_RCC,
2364    ///RNG
2365    pub RNG: RNG,
2366    ///SEC_RNG
2367    pub SEC_RNG: SEC_RNG,
2368    ///RTC
2369    pub RTC: RTC,
2370    ///SEC_RTC
2371    pub SEC_RTC: SEC_RTC,
2372    ///SAI1
2373    pub SAI1: SAI1,
2374    ///SAI2
2375    pub SAI2: SAI2,
2376    ///SEC_SAI1
2377    pub SEC_SAI1: SEC_SAI1,
2378    ///SEC_SAI2
2379    pub SEC_SAI2: SEC_SAI2,
2380    ///SDMMC1
2381    pub SDMMC1: SDMMC1,
2382    ///SEC_SDMMC1
2383    pub SEC_SDMMC1: SEC_SDMMC1,
2384    ///SPI1
2385    pub SPI1: SPI1,
2386    ///SPI2
2387    pub SPI2: SPI2,
2388    ///SPI3
2389    pub SPI3: SPI3,
2390    ///SEC_SPI1
2391    pub SEC_SPI1: SEC_SPI1,
2392    ///SEC_SPI2
2393    pub SEC_SPI2: SEC_SPI2,
2394    ///SEC_SPI3
2395    pub SEC_SPI3: SEC_SPI3,
2396    ///SYSCFG
2397    pub SYSCFG: SYSCFG,
2398    ///SEC_SYSCFG
2399    pub SEC_SYSCFG: SEC_SYSCFG,
2400    ///TAMP
2401    pub TAMP: TAMP,
2402    ///SEC_TAMP
2403    pub SEC_TAMP: SEC_TAMP,
2404    ///TIM1
2405    pub TIM1: TIM1,
2406    ///SEC_TIM1
2407    pub SEC_TIM1: SEC_TIM1,
2408    ///TIM2
2409    pub TIM2: TIM2,
2410    ///SEC_TIM2
2411    pub SEC_TIM2: SEC_TIM2,
2412    ///TIM3
2413    pub TIM3: TIM3,
2414    ///SEC_TIM3
2415    pub SEC_TIM3: SEC_TIM3,
2416    ///TIM4
2417    pub TIM4: TIM4,
2418    ///SEC_TIM4
2419    pub SEC_TIM4: SEC_TIM4,
2420    ///TIM5
2421    pub TIM5: TIM5,
2422    ///SEC_TIM5
2423    pub SEC_TIM5: SEC_TIM5,
2424    ///TIM6
2425    pub TIM6: TIM6,
2426    ///SEC_TIM6
2427    pub SEC_TIM6: SEC_TIM6,
2428    ///TIM7
2429    pub TIM7: TIM7,
2430    ///SEC_TIM7
2431    pub SEC_TIM7: SEC_TIM7,
2432    ///TIM15
2433    pub TIM15: TIM15,
2434    ///SEC_TIM15
2435    pub SEC_TIM15: SEC_TIM15,
2436    ///TIM16
2437    pub TIM16: TIM16,
2438    ///SEC_TIM16
2439    pub SEC_TIM16: SEC_TIM16,
2440    ///TIM17
2441    pub TIM17: TIM17,
2442    ///SEC_TIM17
2443    pub SEC_TIM17: SEC_TIM17,
2444    ///TIM8
2445    pub TIM8: TIM8,
2446    ///SEC_TIM8
2447    pub SEC_TIM8: SEC_TIM8,
2448    ///TSC
2449    pub TSC: TSC,
2450    ///SEC_TSC
2451    pub SEC_TSC: SEC_TSC,
2452    ///USB
2453    pub USB: USB,
2454    ///SEC_USB
2455    pub SEC_USB: SEC_USB,
2456    ///UCPD1
2457    pub UCPD1: UCPD1,
2458    ///SEC_UCPD1
2459    pub SEC_UCPD1: SEC_UCPD1,
2460    ///USART1
2461    pub USART1: USART1,
2462    ///SEC_USART1
2463    pub SEC_USART1: SEC_USART1,
2464    ///USART2
2465    pub USART2: USART2,
2466    ///SEC_USART2
2467    pub SEC_USART2: SEC_USART2,
2468    ///USART3
2469    pub USART3: USART3,
2470    ///SEC_USART3
2471    pub SEC_USART3: SEC_USART3,
2472    ///UART4
2473    pub UART4: UART4,
2474    ///UART5
2475    pub UART5: UART5,
2476    ///SEC_UART4
2477    pub SEC_UART4: SEC_UART4,
2478    ///SEC_UART5
2479    pub SEC_UART5: SEC_UART5,
2480    ///VREFBUF
2481    pub VREFBUF: VREFBUF,
2482    ///SEC_VREFBUF
2483    pub SEC_VREFBUF: SEC_VREFBUF,
2484    ///WWDG
2485    pub WWDG: WWDG,
2486    ///SEC_WWDG
2487    pub SEC_WWDG: SEC_WWDG,
2488}
2489impl Peripherals {
2490    /// Returns all the peripherals *once*.
2491    #[cfg(feature = "critical-section")]
2492    #[inline]
2493    pub fn take() -> Option<Self> {
2494        critical_section::with(|_| {
2495            if unsafe { DEVICE_PERIPHERALS } {
2496                return None;
2497            }
2498            Some(unsafe { Peripherals::steal() })
2499        })
2500    }
2501    /// Unchecked version of `Peripherals::take`.
2502    ///
2503    /// # Safety
2504    ///
2505    /// Each of the returned peripherals must be used at most once.
2506    #[inline]
2507    pub unsafe fn steal() -> Self {
2508        DEVICE_PERIPHERALS = true;
2509        Peripherals {
2510            ADC1: ADC1::steal(),
2511            SEC_ADC1: SEC_ADC1::steal(),
2512            ADC2: ADC2::steal(),
2513            SEC_ADC2: SEC_ADC2::steal(),
2514            ADC_COMMON: ADC_COMMON::steal(),
2515            SEC_ADC_COMMON: SEC_ADC_COMMON::steal(),
2516            AES: AES::steal(),
2517            SEC_AES: SEC_AES::steal(),
2518            COMP: COMP::steal(),
2519            SEC_COMP: SEC_COMP::steal(),
2520            CRC: CRC::steal(),
2521            SEC_CRC: SEC_CRC::steal(),
2522            CRS: CRS::steal(),
2523            SEC_CRS: SEC_CRS::steal(),
2524            DAC: DAC::steal(),
2525            SEC_DAC: SEC_DAC::steal(),
2526            DBGMCU: DBGMCU::steal(),
2527            DMA1: DMA1::steal(),
2528            SEC_DMA1: SEC_DMA1::steal(),
2529            DMA2: DMA2::steal(),
2530            SEC_DMA2: SEC_DMA2::steal(),
2531            DFSDM1: DFSDM1::steal(),
2532            SEC_DFSDM1: SEC_DFSDM1::steal(),
2533            DMAMUX1: DMAMUX1::steal(),
2534            SEC_DMAMUX1: SEC_DMAMUX1::steal(),
2535            EXTI: EXTI::steal(),
2536            SEC_EXTI: SEC_EXTI::steal(),
2537            FDCAN1: FDCAN1::steal(),
2538            SEC_FDCAN1: SEC_FDCAN1::steal(),
2539            FLASH: FLASH::steal(),
2540            SEC_FLASH: SEC_FLASH::steal(),
2541            FMC: FMC::steal(),
2542            SEC_FMC: SEC_FMC::steal(),
2543            GPIOA: GPIOA::steal(),
2544            SEC_GPIOA: SEC_GPIOA::steal(),
2545            GPIOB: GPIOB::steal(),
2546            SEC_GPIOB: SEC_GPIOB::steal(),
2547            GPIOC: GPIOC::steal(),
2548            GPIOD: GPIOD::steal(),
2549            GPIOE: GPIOE::steal(),
2550            GPIOF: GPIOF::steal(),
2551            GPIOG: GPIOG::steal(),
2552            SEC_GPIOC: SEC_GPIOC::steal(),
2553            SEC_GPIOD: SEC_GPIOD::steal(),
2554            SEC_GPIOE: SEC_GPIOE::steal(),
2555            SEC_GPIOF: SEC_GPIOF::steal(),
2556            SEC_GPIOG: SEC_GPIOG::steal(),
2557            GPIOH: GPIOH::steal(),
2558            SEC_GPIOH: SEC_GPIOH::steal(),
2559            GTZC_MPCBB1: GTZC_MPCBB1::steal(),
2560            SEC_GTZC_MPCBB1: SEC_GTZC_MPCBB1::steal(),
2561            GTZC_MPCBB2: GTZC_MPCBB2::steal(),
2562            SEC_GTZC_MPCBB2: SEC_GTZC_MPCBB2::steal(),
2563            GTZC_TZIC: GTZC_TZIC::steal(),
2564            SEC_GTZC_TZIC: SEC_GTZC_TZIC::steal(),
2565            GTZC_TZSC: GTZC_TZSC::steal(),
2566            SEC_GTZC_TZSC: SEC_GTZC_TZSC::steal(),
2567            HASH: HASH::steal(),
2568            SEC_HASH: SEC_HASH::steal(),
2569            I2C1: I2C1::steal(),
2570            I2C2: I2C2::steal(),
2571            I2C3: I2C3::steal(),
2572            I2C4: I2C4::steal(),
2573            SEC_I2C1: SEC_I2C1::steal(),
2574            SEC_I2C2: SEC_I2C2::steal(),
2575            SEC_I2C3: SEC_I2C3::steal(),
2576            SEC_I2C4: SEC_I2C4::steal(),
2577            ICACHE: ICACHE::steal(),
2578            SEC_ICACHE: SEC_ICACHE::steal(),
2579            IWDG: IWDG::steal(),
2580            SEC_IWDG: SEC_IWDG::steal(),
2581            LPTIM1: LPTIM1::steal(),
2582            LPTIM2: LPTIM2::steal(),
2583            LPTIM3: LPTIM3::steal(),
2584            SEC_LPTIM1: SEC_LPTIM1::steal(),
2585            SEC_LPTIM2: SEC_LPTIM2::steal(),
2586            SEC_LPTIM3: SEC_LPTIM3::steal(),
2587            LPUART1: LPUART1::steal(),
2588            SEC_LPUART1: SEC_LPUART1::steal(),
2589            OCTOSPI1: OCTOSPI1::steal(),
2590            SEC_OCTOSPI1: SEC_OCTOSPI1::steal(),
2591            OPAMP: OPAMP::steal(),
2592            SEC_OPAMP: SEC_OPAMP::steal(),
2593            OTFDEC1: OTFDEC1::steal(),
2594            SEC_OTFDEC1: SEC_OTFDEC1::steal(),
2595            PKA: PKA::steal(),
2596            SEC_PKA: SEC_PKA::steal(),
2597            PWR: PWR::steal(),
2598            SEC_PWR: SEC_PWR::steal(),
2599            RCC: RCC::steal(),
2600            SEC_RCC: SEC_RCC::steal(),
2601            RNG: RNG::steal(),
2602            SEC_RNG: SEC_RNG::steal(),
2603            RTC: RTC::steal(),
2604            SEC_RTC: SEC_RTC::steal(),
2605            SAI1: SAI1::steal(),
2606            SAI2: SAI2::steal(),
2607            SEC_SAI1: SEC_SAI1::steal(),
2608            SEC_SAI2: SEC_SAI2::steal(),
2609            SDMMC1: SDMMC1::steal(),
2610            SEC_SDMMC1: SEC_SDMMC1::steal(),
2611            SPI1: SPI1::steal(),
2612            SPI2: SPI2::steal(),
2613            SPI3: SPI3::steal(),
2614            SEC_SPI1: SEC_SPI1::steal(),
2615            SEC_SPI2: SEC_SPI2::steal(),
2616            SEC_SPI3: SEC_SPI3::steal(),
2617            SYSCFG: SYSCFG::steal(),
2618            SEC_SYSCFG: SEC_SYSCFG::steal(),
2619            TAMP: TAMP::steal(),
2620            SEC_TAMP: SEC_TAMP::steal(),
2621            TIM1: TIM1::steal(),
2622            SEC_TIM1: SEC_TIM1::steal(),
2623            TIM2: TIM2::steal(),
2624            SEC_TIM2: SEC_TIM2::steal(),
2625            TIM3: TIM3::steal(),
2626            SEC_TIM3: SEC_TIM3::steal(),
2627            TIM4: TIM4::steal(),
2628            SEC_TIM4: SEC_TIM4::steal(),
2629            TIM5: TIM5::steal(),
2630            SEC_TIM5: SEC_TIM5::steal(),
2631            TIM6: TIM6::steal(),
2632            SEC_TIM6: SEC_TIM6::steal(),
2633            TIM7: TIM7::steal(),
2634            SEC_TIM7: SEC_TIM7::steal(),
2635            TIM15: TIM15::steal(),
2636            SEC_TIM15: SEC_TIM15::steal(),
2637            TIM16: TIM16::steal(),
2638            SEC_TIM16: SEC_TIM16::steal(),
2639            TIM17: TIM17::steal(),
2640            SEC_TIM17: SEC_TIM17::steal(),
2641            TIM8: TIM8::steal(),
2642            SEC_TIM8: SEC_TIM8::steal(),
2643            TSC: TSC::steal(),
2644            SEC_TSC: SEC_TSC::steal(),
2645            USB: USB::steal(),
2646            SEC_USB: SEC_USB::steal(),
2647            UCPD1: UCPD1::steal(),
2648            SEC_UCPD1: SEC_UCPD1::steal(),
2649            USART1: USART1::steal(),
2650            SEC_USART1: SEC_USART1::steal(),
2651            USART2: USART2::steal(),
2652            SEC_USART2: SEC_USART2::steal(),
2653            USART3: USART3::steal(),
2654            SEC_USART3: SEC_USART3::steal(),
2655            UART4: UART4::steal(),
2656            UART5: UART5::steal(),
2657            SEC_UART4: SEC_UART4::steal(),
2658            SEC_UART5: SEC_UART5::steal(),
2659            VREFBUF: VREFBUF::steal(),
2660            SEC_VREFBUF: SEC_VREFBUF::steal(),
2661            WWDG: WWDG::steal(),
2662            SEC_WWDG: SEC_WWDG::steal(),
2663        }
2664    }
2665}
stm32l5/stm32l562/mod.rs

stm32l5/stm32l562/
mod.rs
