Module cr2

Module cr2 

Source
Expand description

Control register 2

Structs§

ABREN_R
Field ABREN reader - Auto baud rate enable
ABREN_W
Field ABREN writer - Auto baud rate enable
ABRMOD_R
Field ABRMOD reader - Auto baud rate mode
ABRMOD_W
Field ABRMOD writer - Auto baud rate mode
ADDM7_R
Field ADDM7 reader - 7-bit Address Detection/4-bit Address Detection
ADDM7_W
Field ADDM7 writer - 7-bit Address Detection/4-bit Address Detection
ADD_R
Field ADD reader - Address of the USART node
ADD_W
Field ADD writer - Address of the USART node
CLKEN_R
Field CLKEN reader - Clock enable
CLKEN_W
Field CLKEN writer - Clock enable
CPHA_R
Field CPHA reader - Clock phase
CPHA_W
Field CPHA writer - Clock phase
CPOL_R
Field CPOL reader - Clock polarity
CPOL_W
Field CPOL writer - Clock polarity
CR2_SPEC
Control register 2
DATAINV_R
Field DATAINV reader - Binary data inversion
DATAINV_W
Field DATAINV writer - Binary data inversion
LBCL_R
Field LBCL reader - Last bit clock pulse
LBCL_W
Field LBCL writer - Last bit clock pulse
LBDIE_R
Field LBDIE reader - LIN break detection interrupt enable
LBDIE_W
Field LBDIE writer - LIN break detection interrupt enable
LBDL_R
Field LBDL reader - LIN break detection length
LBDL_W
Field LBDL writer - LIN break detection length
LINEN_R
Field LINEN reader - LIN mode enable
LINEN_W
Field LINEN writer - LIN mode enable
MSBFIRST_R
Field MSBFIRST reader - Most significant bit first
MSBFIRST_W
Field MSBFIRST writer - Most significant bit first
R
Register CR2 reader
RTOEN_R
Field RTOEN reader - Receiver timeout enable
RTOEN_W
Field RTOEN writer - Receiver timeout enable
RXINV_R
Field RXINV reader - RX pin active level inversion
RXINV_W
Field RXINV writer - RX pin active level inversion
STOP_R
Field STOP reader - STOP bits
STOP_W
Field STOP writer - STOP bits
SWAP_R
Field SWAP reader - Swap TX/RX pins
SWAP_W
Field SWAP writer - Swap TX/RX pins
TXINV_R
Field TXINV reader - TX pin active level inversion
TXINV_W
Field TXINV writer - TX pin active level inversion
W
Register CR2 writer

Enums§

ABREN_A
Auto baud rate enable
ABRMOD_A
Auto baud rate mode
ADDM7_A
7-bit Address Detection/4-bit Address Detection
CLKEN_A
Clock enable
CPHA_A
Clock phase
CPOL_A
Clock polarity
DATAINV_A
Binary data inversion
LBCL_A
Last bit clock pulse
LBDIE_A
LIN break detection interrupt enable
LBDL_A
LIN break detection length
LINEN_A
LIN mode enable
MSBFIRST_A
Most significant bit first
RTOEN_A
Receiver timeout enable
RXINV_A
RX pin active level inversion
STOP_A
STOP bits
SWAP_A
Swap TX/RX pins
TXINV_A
TX pin active level inversion