Struct stm32l4xx_hal::pac::dac1::RegisterBlock
source · [−]#[repr(C)]pub struct RegisterBlock {Show 20 fields
pub cr: Reg<CR_SPEC>,
pub swtrigr: Reg<SWTRIGR_SPEC>,
pub dhr12r1: Reg<DHR12R1_SPEC>,
pub dhr12l1: Reg<DHR12L1_SPEC>,
pub dhr8r1: Reg<DHR8R1_SPEC>,
pub dhr12r2: Reg<DHR12R2_SPEC>,
pub dhr12l2: Reg<DHR12L2_SPEC>,
pub dhr8r2: Reg<DHR8R2_SPEC>,
pub dhr12rd: Reg<DHR12RD_SPEC>,
pub dhr12ld: Reg<DHR12LD_SPEC>,
pub dhr8rd: Reg<DHR8RD_SPEC>,
pub dor1: Reg<DOR1_SPEC>,
pub dor2: Reg<DOR2_SPEC>,
pub sr: Reg<SR_SPEC>,
pub ccr: Reg<CCR_SPEC>,
pub mcr: Reg<MCR_SPEC>,
pub shsr1: Reg<SHSR1_SPEC>,
pub shsr2: Reg<SHSR2_SPEC>,
pub shhr: Reg<SHHR_SPEC>,
pub shrr: Reg<SHRR_SPEC>,
}
Expand description
Register block
Fields
cr: Reg<CR_SPEC>
0x00 - control register
swtrigr: Reg<SWTRIGR_SPEC>
0x04 - software trigger register
dhr12r1: Reg<DHR12R1_SPEC>
0x08 - channel1 12-bit right-aligned data holding register
dhr12l1: Reg<DHR12L1_SPEC>
0x0c - channel1 12-bit left-aligned data holding register
dhr8r1: Reg<DHR8R1_SPEC>
0x10 - channel1 8-bit right-aligned data holding register
dhr12r2: Reg<DHR12R2_SPEC>
0x14 - channel2 12-bit right aligned data holding register
dhr12l2: Reg<DHR12L2_SPEC>
0x18 - channel2 12-bit left aligned data holding register
dhr8r2: Reg<DHR8R2_SPEC>
0x1c - channel2 8-bit right-aligned data holding register
dhr12rd: Reg<DHR12RD_SPEC>
0x20 - Dual DAC 12-bit right-aligned data holding register
dhr12ld: Reg<DHR12LD_SPEC>
0x24 - DUAL DAC 12-bit left aligned data holding register
dhr8rd: Reg<DHR8RD_SPEC>
0x28 - DUAL DAC 8-bit right aligned data holding register
dor1: Reg<DOR1_SPEC>
0x2c - channel1 data output register
dor2: Reg<DOR2_SPEC>
0x30 - channel2 data output register
sr: Reg<SR_SPEC>
0x34 - status register
ccr: Reg<CCR_SPEC>
0x38 - calibration control register
mcr: Reg<MCR_SPEC>
0x3c - mode control register
shsr1: Reg<SHSR1_SPEC>
0x40 - Sample and Hold sample time register 1
shsr2: Reg<SHSR2_SPEC>
0x44 - Sample and Hold sample time register 2
shhr: Reg<SHHR_SPEC>
0x48 - Sample and Hold hold time register
shrr: Reg<SHRR_SPEC>
0x4c - Sample and Hold refresh time register
Auto Trait Implementations
impl !RefUnwindSafe for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl Unpin for RegisterBlock
impl UnwindSafe for RegisterBlock
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more