stm32l4x2_pac/wwdg/
sr.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::SR {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = "Possible values of the field `EWIF`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum EWIFR {
48    #[doc = "The EWI Interrupt Service Routine has been triggered"]
49    PENDING,
50    #[doc = "The EWI Interrupt Service Routine has been serviced"]
51    FINISHED,
52}
53impl EWIFR {
54    #[doc = r" Returns `true` if the bit is clear (0)"]
55    #[inline]
56    pub fn bit_is_clear(&self) -> bool {
57        !self.bit()
58    }
59    #[doc = r" Returns `true` if the bit is set (1)"]
60    #[inline]
61    pub fn bit_is_set(&self) -> bool {
62        self.bit()
63    }
64    #[doc = r" Value of the field as raw bits"]
65    #[inline]
66    pub fn bit(&self) -> bool {
67        match *self {
68            EWIFR::PENDING => true,
69            EWIFR::FINISHED => false,
70        }
71    }
72    #[allow(missing_docs)]
73    #[doc(hidden)]
74    #[inline]
75    pub fn _from(value: bool) -> EWIFR {
76        match value {
77            true => EWIFR::PENDING,
78            false => EWIFR::FINISHED,
79        }
80    }
81    #[doc = "Checks if the value of the field is `PENDING`"]
82    #[inline]
83    pub fn is_pending(&self) -> bool {
84        *self == EWIFR::PENDING
85    }
86    #[doc = "Checks if the value of the field is `FINISHED`"]
87    #[inline]
88    pub fn is_finished(&self) -> bool {
89        *self == EWIFR::FINISHED
90    }
91}
92#[doc = "Values that can be written to the field `EWIF`"]
93pub enum EWIFW {
94    #[doc = "The EWI Interrupt Service Routine has been serviced"]
95    FINISHED,
96}
97impl EWIFW {
98    #[allow(missing_docs)]
99    #[doc(hidden)]
100    #[inline]
101    pub fn _bits(&self) -> bool {
102        match *self {
103            EWIFW::FINISHED => false,
104        }
105    }
106}
107#[doc = r" Proxy"]
108pub struct _EWIFW<'a> {
109    w: &'a mut W,
110}
111impl<'a> _EWIFW<'a> {
112    #[doc = r" Writes `variant` to the field"]
113    #[inline]
114    pub fn variant(self, variant: EWIFW) -> &'a mut W {
115        {
116            self.bit(variant._bits())
117        }
118    }
119    #[doc = "The EWI Interrupt Service Routine has been serviced"]
120    #[inline]
121    pub fn finished(self) -> &'a mut W {
122        self.variant(EWIFW::FINISHED)
123    }
124    #[doc = r" Sets the field bit"]
125    pub fn set_bit(self) -> &'a mut W {
126        self.bit(true)
127    }
128    #[doc = r" Clears the field bit"]
129    pub fn clear_bit(self) -> &'a mut W {
130        self.bit(false)
131    }
132    #[doc = r" Writes raw bits to the field"]
133    #[inline]
134    pub fn bit(self, value: bool) -> &'a mut W {
135        const MASK: bool = true;
136        const OFFSET: u8 = 0;
137        self.w.bits &= !((MASK as u32) << OFFSET);
138        self.w.bits |= ((value & MASK) as u32) << OFFSET;
139        self.w
140    }
141}
142impl R {
143    #[doc = r" Value of the register as raw bits"]
144    #[inline]
145    pub fn bits(&self) -> u32 {
146        self.bits
147    }
148    #[doc = "Bit 0 - Early wakeup interrupt flag"]
149    #[inline]
150    pub fn ewif(&self) -> EWIFR {
151        EWIFR::_from({
152            const MASK: bool = true;
153            const OFFSET: u8 = 0;
154            ((self.bits >> OFFSET) & MASK as u32) != 0
155        })
156    }
157}
158impl W {
159    #[doc = r" Reset value of the register"]
160    #[inline]
161    pub fn reset_value() -> W {
162        W { bits: 0 }
163    }
164    #[doc = r" Writes raw bits to the register"]
165    #[inline]
166    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
167        self.bits = bits;
168        self
169    }
170    #[doc = "Bit 0 - Early wakeup interrupt flag"]
171    #[inline]
172    pub fn ewif(&mut self) -> _EWIFW {
173        _EWIFW { w: self }
174    }
175}
stm32l4x2_pac/wwdg/sr.rs

stm32l4x2_pac/wwdg/
sr.rs
