stm32l4x2_pac/tim16/
ccmr1_input.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CCMR1_INPUT {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct IC1FR {
47    bits: u8,
48}
49impl IC1FR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bits(&self) -> u8 {
53        self.bits
54    }
55}
56#[doc = r" Value of the field"]
57pub struct IC1PSCR {
58    bits: u8,
59}
60impl IC1PSCR {
61    #[doc = r" Value of the field as raw bits"]
62    #[inline]
63    pub fn bits(&self) -> u8 {
64        self.bits
65    }
66}
67#[doc = r" Value of the field"]
68pub struct CC1SR {
69    bits: u8,
70}
71impl CC1SR {
72    #[doc = r" Value of the field as raw bits"]
73    #[inline]
74    pub fn bits(&self) -> u8 {
75        self.bits
76    }
77}
78#[doc = r" Proxy"]
79pub struct _IC1FW<'a> {
80    w: &'a mut W,
81}
82impl<'a> _IC1FW<'a> {
83    #[doc = r" Writes raw bits to the field"]
84    #[inline]
85    pub unsafe fn bits(self, value: u8) -> &'a mut W {
86        const MASK: u8 = 15;
87        const OFFSET: u8 = 4;
88        self.w.bits &= !((MASK as u32) << OFFSET);
89        self.w.bits |= ((value & MASK) as u32) << OFFSET;
90        self.w
91    }
92}
93#[doc = r" Proxy"]
94pub struct _IC1PSCW<'a> {
95    w: &'a mut W,
96}
97impl<'a> _IC1PSCW<'a> {
98    #[doc = r" Writes raw bits to the field"]
99    #[inline]
100    pub unsafe fn bits(self, value: u8) -> &'a mut W {
101        const MASK: u8 = 3;
102        const OFFSET: u8 = 2;
103        self.w.bits &= !((MASK as u32) << OFFSET);
104        self.w.bits |= ((value & MASK) as u32) << OFFSET;
105        self.w
106    }
107}
108#[doc = r" Proxy"]
109pub struct _CC1SW<'a> {
110    w: &'a mut W,
111}
112impl<'a> _CC1SW<'a> {
113    #[doc = r" Writes raw bits to the field"]
114    #[inline]
115    pub unsafe fn bits(self, value: u8) -> &'a mut W {
116        const MASK: u8 = 3;
117        const OFFSET: u8 = 0;
118        self.w.bits &= !((MASK as u32) << OFFSET);
119        self.w.bits |= ((value & MASK) as u32) << OFFSET;
120        self.w
121    }
122}
123impl R {
124    #[doc = r" Value of the register as raw bits"]
125    #[inline]
126    pub fn bits(&self) -> u32 {
127        self.bits
128    }
129    #[doc = "Bits 4:7 - Input capture 1 filter"]
130    #[inline]
131    pub fn ic1f(&self) -> IC1FR {
132        let bits = {
133            const MASK: u8 = 15;
134            const OFFSET: u8 = 4;
135            ((self.bits >> OFFSET) & MASK as u32) as u8
136        };
137        IC1FR { bits }
138    }
139    #[doc = "Bits 2:3 - Input capture 1 prescaler"]
140    #[inline]
141    pub fn ic1psc(&self) -> IC1PSCR {
142        let bits = {
143            const MASK: u8 = 3;
144            const OFFSET: u8 = 2;
145            ((self.bits >> OFFSET) & MASK as u32) as u8
146        };
147        IC1PSCR { bits }
148    }
149    #[doc = "Bits 0:1 - Capture/Compare 1 selection"]
150    #[inline]
151    pub fn cc1s(&self) -> CC1SR {
152        let bits = {
153            const MASK: u8 = 3;
154            const OFFSET: u8 = 0;
155            ((self.bits >> OFFSET) & MASK as u32) as u8
156        };
157        CC1SR { bits }
158    }
159}
160impl W {
161    #[doc = r" Reset value of the register"]
162    #[inline]
163    pub fn reset_value() -> W {
164        W { bits: 0 }
165    }
166    #[doc = r" Writes raw bits to the register"]
167    #[inline]
168    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
169        self.bits = bits;
170        self
171    }
172    #[doc = "Bits 4:7 - Input capture 1 filter"]
173    #[inline]
174    pub fn ic1f(&mut self) -> _IC1FW {
175        _IC1FW { w: self }
176    }
177    #[doc = "Bits 2:3 - Input capture 1 prescaler"]
178    #[inline]
179    pub fn ic1psc(&mut self) -> _IC1PSCW {
180        _IC1PSCW { w: self }
181    }
182    #[doc = "Bits 0:1 - Capture/Compare 1 selection"]
183    #[inline]
184    pub fn cc1s(&mut self) -> _CC1SW {
185        _CC1SW { w: self }
186    }
187}
stm32l4x2_pac/tim16/ccmr1_input.rs

stm32l4x2_pac/tim16/
ccmr1_input.rs
