stm32l4x2_pac/rtc/
shiftr.rs

1#[doc = r" Value to write to the register"]
2pub struct W {
3    bits: u32,
4}
5impl super::SHIFTR {
6    #[doc = r" Writes to the register"]
7    #[inline]
8    pub fn write<F>(&self, f: F)
9    where
10        F: FnOnce(&mut W) -> &mut W,
11    {
12        let mut w = W::reset_value();
13        f(&mut w);
14        self.register.set(w.bits);
15    }
16}
17#[doc = r" Proxy"]
18pub struct _ADD1SW<'a> {
19    w: &'a mut W,
20}
21impl<'a> _ADD1SW<'a> {
22    #[doc = r" Sets the field bit"]
23    pub fn set_bit(self) -> &'a mut W {
24        self.bit(true)
25    }
26    #[doc = r" Clears the field bit"]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r" Writes raw bits to the field"]
31    #[inline]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        const MASK: bool = true;
34        const OFFSET: u8 = 31;
35        self.w.bits &= !((MASK as u32) << OFFSET);
36        self.w.bits |= ((value & MASK) as u32) << OFFSET;
37        self.w
38    }
39}
40#[doc = r" Proxy"]
41pub struct _SUBFSW<'a> {
42    w: &'a mut W,
43}
44impl<'a> _SUBFSW<'a> {
45    #[doc = r" Writes raw bits to the field"]
46    #[inline]
47    pub unsafe fn bits(self, value: u16) -> &'a mut W {
48        const MASK: u16 = 32767;
49        const OFFSET: u8 = 0;
50        self.w.bits &= !((MASK as u32) << OFFSET);
51        self.w.bits |= ((value & MASK) as u32) << OFFSET;
52        self.w
53    }
54}
55impl W {
56    #[doc = r" Reset value of the register"]
57    #[inline]
58    pub fn reset_value() -> W {
59        W { bits: 0 }
60    }
61    #[doc = r" Writes raw bits to the register"]
62    #[inline]
63    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
64        self.bits = bits;
65        self
66    }
67    #[doc = "Bit 31 - Add one second"]
68    #[inline]
69    pub fn add1s(&mut self) -> _ADD1SW {
70        _ADD1SW { w: self }
71    }
72    #[doc = "Bits 0:14 - Subtract a fraction of a second"]
73    #[inline]
74    pub fn subfs(&mut self) -> _SUBFSW {
75        _SUBFSW { w: self }
76    }
77}
stm32l4x2_pac/rtc/shiftr.rs

stm32l4x2_pac/rtc/
shiftr.rs
