stm32l4x2_pac/rtc/
prer.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::PRER {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct PREDIV_AR {
47    bits: u8,
48}
49impl PREDIV_AR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bits(&self) -> u8 {
53        self.bits
54    }
55}
56#[doc = r" Value of the field"]
57pub struct PREDIV_SR {
58    bits: u16,
59}
60impl PREDIV_SR {
61    #[doc = r" Value of the field as raw bits"]
62    #[inline]
63    pub fn bits(&self) -> u16 {
64        self.bits
65    }
66}
67#[doc = r" Proxy"]
68pub struct _PREDIV_AW<'a> {
69    w: &'a mut W,
70}
71impl<'a> _PREDIV_AW<'a> {
72    #[doc = r" Writes raw bits to the field"]
73    #[inline]
74    pub unsafe fn bits(self, value: u8) -> &'a mut W {
75        const MASK: u8 = 127;
76        const OFFSET: u8 = 16;
77        self.w.bits &= !((MASK as u32) << OFFSET);
78        self.w.bits |= ((value & MASK) as u32) << OFFSET;
79        self.w
80    }
81}
82#[doc = r" Proxy"]
83pub struct _PREDIV_SW<'a> {
84    w: &'a mut W,
85}
86impl<'a> _PREDIV_SW<'a> {
87    #[doc = r" Writes raw bits to the field"]
88    #[inline]
89    pub unsafe fn bits(self, value: u16) -> &'a mut W {
90        const MASK: u16 = 32767;
91        const OFFSET: u8 = 0;
92        self.w.bits &= !((MASK as u32) << OFFSET);
93        self.w.bits |= ((value & MASK) as u32) << OFFSET;
94        self.w
95    }
96}
97impl R {
98    #[doc = r" Value of the register as raw bits"]
99    #[inline]
100    pub fn bits(&self) -> u32 {
101        self.bits
102    }
103    #[doc = "Bits 16:22 - Asynchronous prescaler factor"]
104    #[inline]
105    pub fn prediv_a(&self) -> PREDIV_AR {
106        let bits = {
107            const MASK: u8 = 127;
108            const OFFSET: u8 = 16;
109            ((self.bits >> OFFSET) & MASK as u32) as u8
110        };
111        PREDIV_AR { bits }
112    }
113    #[doc = "Bits 0:14 - Synchronous prescaler factor"]
114    #[inline]
115    pub fn prediv_s(&self) -> PREDIV_SR {
116        let bits = {
117            const MASK: u16 = 32767;
118            const OFFSET: u8 = 0;
119            ((self.bits >> OFFSET) & MASK as u32) as u16
120        };
121        PREDIV_SR { bits }
122    }
123}
124impl W {
125    #[doc = r" Reset value of the register"]
126    #[inline]
127    pub fn reset_value() -> W {
128        W { bits: 8323327 }
129    }
130    #[doc = r" Writes raw bits to the register"]
131    #[inline]
132    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
133        self.bits = bits;
134        self
135    }
136    #[doc = "Bits 16:22 - Asynchronous prescaler factor"]
137    #[inline]
138    pub fn prediv_a(&mut self) -> _PREDIV_AW {
139        _PREDIV_AW { w: self }
140    }
141    #[doc = "Bits 0:14 - Synchronous prescaler factor"]
142    #[inline]
143    pub fn prediv_s(&mut self) -> _PREDIV_SW {
144        _PREDIV_SW { w: self }
145    }
146}
stm32l4x2_pac/rtc/prer.rs

stm32l4x2_pac/rtc/
prer.rs
