stm32l4x2_pac/tim16/
cr2.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CR2 {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = "Possible values of the field `OIS1N`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum OIS1NR {
48    #[doc = "OC1N=0 after a dead-time when MOE=0"]
49    LOW,
50    #[doc = "OC1N=1 after a dead-time when MOE=0"]
51    HIGH,
52}
53impl OIS1NR {
54    #[doc = r" Returns `true` if the bit is clear (0)"]
55    #[inline]
56    pub fn bit_is_clear(&self) -> bool {
57        !self.bit()
58    }
59    #[doc = r" Returns `true` if the bit is set (1)"]
60    #[inline]
61    pub fn bit_is_set(&self) -> bool {
62        self.bit()
63    }
64    #[doc = r" Value of the field as raw bits"]
65    #[inline]
66    pub fn bit(&self) -> bool {
67        match *self {
68            OIS1NR::LOW => false,
69            OIS1NR::HIGH => true,
70        }
71    }
72    #[allow(missing_docs)]
73    #[doc(hidden)]
74    #[inline]
75    pub fn _from(value: bool) -> OIS1NR {
76        match value {
77            false => OIS1NR::LOW,
78            true => OIS1NR::HIGH,
79        }
80    }
81    #[doc = "Checks if the value of the field is `LOW`"]
82    #[inline]
83    pub fn is_low(&self) -> bool {
84        *self == OIS1NR::LOW
85    }
86    #[doc = "Checks if the value of the field is `HIGH`"]
87    #[inline]
88    pub fn is_high(&self) -> bool {
89        *self == OIS1NR::HIGH
90    }
91}
92#[doc = "Possible values of the field `OIS1`"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum OIS1R {
95    #[doc = "OC1=0 (after a dead-time if OC1N is implemented) when MOE=0"]
96    LOW,
97    #[doc = "OC1=1 (after a dead-time if OC1N is implemented) when MOE=0"]
98    HIGH,
99}
100impl OIS1R {
101    #[doc = r" Returns `true` if the bit is clear (0)"]
102    #[inline]
103    pub fn bit_is_clear(&self) -> bool {
104        !self.bit()
105    }
106    #[doc = r" Returns `true` if the bit is set (1)"]
107    #[inline]
108    pub fn bit_is_set(&self) -> bool {
109        self.bit()
110    }
111    #[doc = r" Value of the field as raw bits"]
112    #[inline]
113    pub fn bit(&self) -> bool {
114        match *self {
115            OIS1R::LOW => false,
116            OIS1R::HIGH => true,
117        }
118    }
119    #[allow(missing_docs)]
120    #[doc(hidden)]
121    #[inline]
122    pub fn _from(value: bool) -> OIS1R {
123        match value {
124            false => OIS1R::LOW,
125            true => OIS1R::HIGH,
126        }
127    }
128    #[doc = "Checks if the value of the field is `LOW`"]
129    #[inline]
130    pub fn is_low(&self) -> bool {
131        *self == OIS1R::LOW
132    }
133    #[doc = "Checks if the value of the field is `HIGH`"]
134    #[inline]
135    pub fn is_high(&self) -> bool {
136        *self == OIS1R::HIGH
137    }
138}
139#[doc = "Possible values of the field `CCDS`"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum CCDSR {
142    #[doc = "CCx DMA request sent when CCx event occurs"]
143    ONCOMPARE,
144    #[doc = "CCx DMA request sent when update event occurs"]
145    ONUPDATE,
146}
147impl CCDSR {
148    #[doc = r" Returns `true` if the bit is clear (0)"]
149    #[inline]
150    pub fn bit_is_clear(&self) -> bool {
151        !self.bit()
152    }
153    #[doc = r" Returns `true` if the bit is set (1)"]
154    #[inline]
155    pub fn bit_is_set(&self) -> bool {
156        self.bit()
157    }
158    #[doc = r" Value of the field as raw bits"]
159    #[inline]
160    pub fn bit(&self) -> bool {
161        match *self {
162            CCDSR::ONCOMPARE => false,
163            CCDSR::ONUPDATE => true,
164        }
165    }
166    #[allow(missing_docs)]
167    #[doc(hidden)]
168    #[inline]
169    pub fn _from(value: bool) -> CCDSR {
170        match value {
171            false => CCDSR::ONCOMPARE,
172            true => CCDSR::ONUPDATE,
173        }
174    }
175    #[doc = "Checks if the value of the field is `ONCOMPARE`"]
176    #[inline]
177    pub fn is_on_compare(&self) -> bool {
178        *self == CCDSR::ONCOMPARE
179    }
180    #[doc = "Checks if the value of the field is `ONUPDATE`"]
181    #[inline]
182    pub fn is_on_update(&self) -> bool {
183        *self == CCDSR::ONUPDATE
184    }
185}
186#[doc = "Possible values of the field `CCUS`"]
187#[derive(Clone, Copy, Debug, PartialEq)]
188pub enum CCUSR {
189    #[doc = "Capture/compare are updated only by setting the COMG bit"]
190    DEFAULT,
191    #[doc = "Capture/compare are updated by setting the COMG bit or when an rising edge occurs on TRGI"]
192    WITHRISINGEDGE,
193}
194impl CCUSR {
195    #[doc = r" Returns `true` if the bit is clear (0)"]
196    #[inline]
197    pub fn bit_is_clear(&self) -> bool {
198        !self.bit()
199    }
200    #[doc = r" Returns `true` if the bit is set (1)"]
201    #[inline]
202    pub fn bit_is_set(&self) -> bool {
203        self.bit()
204    }
205    #[doc = r" Value of the field as raw bits"]
206    #[inline]
207    pub fn bit(&self) -> bool {
208        match *self {
209            CCUSR::DEFAULT => false,
210            CCUSR::WITHRISINGEDGE => true,
211        }
212    }
213    #[allow(missing_docs)]
214    #[doc(hidden)]
215    #[inline]
216    pub fn _from(value: bool) -> CCUSR {
217        match value {
218            false => CCUSR::DEFAULT,
219            true => CCUSR::WITHRISINGEDGE,
220        }
221    }
222    #[doc = "Checks if the value of the field is `DEFAULT`"]
223    #[inline]
224    pub fn is_default(&self) -> bool {
225        *self == CCUSR::DEFAULT
226    }
227    #[doc = "Checks if the value of the field is `WITHRISINGEDGE`"]
228    #[inline]
229    pub fn is_with_rising_edge(&self) -> bool {
230        *self == CCUSR::WITHRISINGEDGE
231    }
232}
233#[doc = "Possible values of the field `CCPC`"]
234#[derive(Clone, Copy, Debug, PartialEq)]
235pub enum CCPCR {
236    #[doc = "CCxE, CCxNE and OCxM bits are not preloaded"]
237    NOTPRELOADED,
238    #[doc = "CCxE, CCxNE and OCxM bits are preloaded"]
239    PRELOADED,
240}
241impl CCPCR {
242    #[doc = r" Returns `true` if the bit is clear (0)"]
243    #[inline]
244    pub fn bit_is_clear(&self) -> bool {
245        !self.bit()
246    }
247    #[doc = r" Returns `true` if the bit is set (1)"]
248    #[inline]
249    pub fn bit_is_set(&self) -> bool {
250        self.bit()
251    }
252    #[doc = r" Value of the field as raw bits"]
253    #[inline]
254    pub fn bit(&self) -> bool {
255        match *self {
256            CCPCR::NOTPRELOADED => false,
257            CCPCR::PRELOADED => true,
258        }
259    }
260    #[allow(missing_docs)]
261    #[doc(hidden)]
262    #[inline]
263    pub fn _from(value: bool) -> CCPCR {
264        match value {
265            false => CCPCR::NOTPRELOADED,
266            true => CCPCR::PRELOADED,
267        }
268    }
269    #[doc = "Checks if the value of the field is `NOTPRELOADED`"]
270    #[inline]
271    pub fn is_not_preloaded(&self) -> bool {
272        *self == CCPCR::NOTPRELOADED
273    }
274    #[doc = "Checks if the value of the field is `PRELOADED`"]
275    #[inline]
276    pub fn is_preloaded(&self) -> bool {
277        *self == CCPCR::PRELOADED
278    }
279}
280#[doc = "Values that can be written to the field `OIS1N`"]
281pub enum OIS1NW {
282    #[doc = "OC1N=0 after a dead-time when MOE=0"]
283    LOW,
284    #[doc = "OC1N=1 after a dead-time when MOE=0"]
285    HIGH,
286}
287impl OIS1NW {
288    #[allow(missing_docs)]
289    #[doc(hidden)]
290    #[inline]
291    pub fn _bits(&self) -> bool {
292        match *self {
293            OIS1NW::LOW => false,
294            OIS1NW::HIGH => true,
295        }
296    }
297}
298#[doc = r" Proxy"]
299pub struct _OIS1NW<'a> {
300    w: &'a mut W,
301}
302impl<'a> _OIS1NW<'a> {
303    #[doc = r" Writes `variant` to the field"]
304    #[inline]
305    pub fn variant(self, variant: OIS1NW) -> &'a mut W {
306        {
307            self.bit(variant._bits())
308        }
309    }
310    #[doc = "OC1N=0 after a dead-time when MOE=0"]
311    #[inline]
312    pub fn low(self) -> &'a mut W {
313        self.variant(OIS1NW::LOW)
314    }
315    #[doc = "OC1N=1 after a dead-time when MOE=0"]
316    #[inline]
317    pub fn high(self) -> &'a mut W {
318        self.variant(OIS1NW::HIGH)
319    }
320    #[doc = r" Sets the field bit"]
321    pub fn set_bit(self) -> &'a mut W {
322        self.bit(true)
323    }
324    #[doc = r" Clears the field bit"]
325    pub fn clear_bit(self) -> &'a mut W {
326        self.bit(false)
327    }
328    #[doc = r" Writes raw bits to the field"]
329    #[inline]
330    pub fn bit(self, value: bool) -> &'a mut W {
331        const MASK: bool = true;
332        const OFFSET: u8 = 9;
333        self.w.bits &= !((MASK as u32) << OFFSET);
334        self.w.bits |= ((value & MASK) as u32) << OFFSET;
335        self.w
336    }
337}
338#[doc = "Values that can be written to the field `OIS1`"]
339pub enum OIS1W {
340    #[doc = "OC1=0 (after a dead-time if OC1N is implemented) when MOE=0"]
341    LOW,
342    #[doc = "OC1=1 (after a dead-time if OC1N is implemented) when MOE=0"]
343    HIGH,
344}
345impl OIS1W {
346    #[allow(missing_docs)]
347    #[doc(hidden)]
348    #[inline]
349    pub fn _bits(&self) -> bool {
350        match *self {
351            OIS1W::LOW => false,
352            OIS1W::HIGH => true,
353        }
354    }
355}
356#[doc = r" Proxy"]
357pub struct _OIS1W<'a> {
358    w: &'a mut W,
359}
360impl<'a> _OIS1W<'a> {
361    #[doc = r" Writes `variant` to the field"]
362    #[inline]
363    pub fn variant(self, variant: OIS1W) -> &'a mut W {
364        {
365            self.bit(variant._bits())
366        }
367    }
368    #[doc = "OC1=0 (after a dead-time if OC1N is implemented) when MOE=0"]
369    #[inline]
370    pub fn low(self) -> &'a mut W {
371        self.variant(OIS1W::LOW)
372    }
373    #[doc = "OC1=1 (after a dead-time if OC1N is implemented) when MOE=0"]
374    #[inline]
375    pub fn high(self) -> &'a mut W {
376        self.variant(OIS1W::HIGH)
377    }
378    #[doc = r" Sets the field bit"]
379    pub fn set_bit(self) -> &'a mut W {
380        self.bit(true)
381    }
382    #[doc = r" Clears the field bit"]
383    pub fn clear_bit(self) -> &'a mut W {
384        self.bit(false)
385    }
386    #[doc = r" Writes raw bits to the field"]
387    #[inline]
388    pub fn bit(self, value: bool) -> &'a mut W {
389        const MASK: bool = true;
390        const OFFSET: u8 = 8;
391        self.w.bits &= !((MASK as u32) << OFFSET);
392        self.w.bits |= ((value & MASK) as u32) << OFFSET;
393        self.w
394    }
395}
396#[doc = "Values that can be written to the field `CCDS`"]
397pub enum CCDSW {
398    #[doc = "CCx DMA request sent when CCx event occurs"]
399    ONCOMPARE,
400    #[doc = "CCx DMA request sent when update event occurs"]
401    ONUPDATE,
402}
403impl CCDSW {
404    #[allow(missing_docs)]
405    #[doc(hidden)]
406    #[inline]
407    pub fn _bits(&self) -> bool {
408        match *self {
409            CCDSW::ONCOMPARE => false,
410            CCDSW::ONUPDATE => true,
411        }
412    }
413}
414#[doc = r" Proxy"]
415pub struct _CCDSW<'a> {
416    w: &'a mut W,
417}
418impl<'a> _CCDSW<'a> {
419    #[doc = r" Writes `variant` to the field"]
420    #[inline]
421    pub fn variant(self, variant: CCDSW) -> &'a mut W {
422        {
423            self.bit(variant._bits())
424        }
425    }
426    #[doc = "CCx DMA request sent when CCx event occurs"]
427    #[inline]
428    pub fn on_compare(self) -> &'a mut W {
429        self.variant(CCDSW::ONCOMPARE)
430    }
431    #[doc = "CCx DMA request sent when update event occurs"]
432    #[inline]
433    pub fn on_update(self) -> &'a mut W {
434        self.variant(CCDSW::ONUPDATE)
435    }
436    #[doc = r" Sets the field bit"]
437    pub fn set_bit(self) -> &'a mut W {
438        self.bit(true)
439    }
440    #[doc = r" Clears the field bit"]
441    pub fn clear_bit(self) -> &'a mut W {
442        self.bit(false)
443    }
444    #[doc = r" Writes raw bits to the field"]
445    #[inline]
446    pub fn bit(self, value: bool) -> &'a mut W {
447        const MASK: bool = true;
448        const OFFSET: u8 = 3;
449        self.w.bits &= !((MASK as u32) << OFFSET);
450        self.w.bits |= ((value & MASK) as u32) << OFFSET;
451        self.w
452    }
453}
454#[doc = "Values that can be written to the field `CCUS`"]
455pub enum CCUSW {
456    #[doc = "Capture/compare are updated only by setting the COMG bit"]
457    DEFAULT,
458    #[doc = "Capture/compare are updated by setting the COMG bit or when an rising edge occurs on TRGI"]
459    WITHRISINGEDGE,
460}
461impl CCUSW {
462    #[allow(missing_docs)]
463    #[doc(hidden)]
464    #[inline]
465    pub fn _bits(&self) -> bool {
466        match *self {
467            CCUSW::DEFAULT => false,
468            CCUSW::WITHRISINGEDGE => true,
469        }
470    }
471}
472#[doc = r" Proxy"]
473pub struct _CCUSW<'a> {
474    w: &'a mut W,
475}
476impl<'a> _CCUSW<'a> {
477    #[doc = r" Writes `variant` to the field"]
478    #[inline]
479    pub fn variant(self, variant: CCUSW) -> &'a mut W {
480        {
481            self.bit(variant._bits())
482        }
483    }
484    #[doc = "Capture/compare are updated only by setting the COMG bit"]
485    #[inline]
486    pub fn default(self) -> &'a mut W {
487        self.variant(CCUSW::DEFAULT)
488    }
489    #[doc = "Capture/compare are updated by setting the COMG bit or when an rising edge occurs on TRGI"]
490    #[inline]
491    pub fn with_rising_edge(self) -> &'a mut W {
492        self.variant(CCUSW::WITHRISINGEDGE)
493    }
494    #[doc = r" Sets the field bit"]
495    pub fn set_bit(self) -> &'a mut W {
496        self.bit(true)
497    }
498    #[doc = r" Clears the field bit"]
499    pub fn clear_bit(self) -> &'a mut W {
500        self.bit(false)
501    }
502    #[doc = r" Writes raw bits to the field"]
503    #[inline]
504    pub fn bit(self, value: bool) -> &'a mut W {
505        const MASK: bool = true;
506        const OFFSET: u8 = 2;
507        self.w.bits &= !((MASK as u32) << OFFSET);
508        self.w.bits |= ((value & MASK) as u32) << OFFSET;
509        self.w
510    }
511}
512#[doc = "Values that can be written to the field `CCPC`"]
513pub enum CCPCW {
514    #[doc = "CCxE, CCxNE and OCxM bits are not preloaded"]
515    NOTPRELOADED,
516    #[doc = "CCxE, CCxNE and OCxM bits are preloaded"]
517    PRELOADED,
518}
519impl CCPCW {
520    #[allow(missing_docs)]
521    #[doc(hidden)]
522    #[inline]
523    pub fn _bits(&self) -> bool {
524        match *self {
525            CCPCW::NOTPRELOADED => false,
526            CCPCW::PRELOADED => true,
527        }
528    }
529}
530#[doc = r" Proxy"]
531pub struct _CCPCW<'a> {
532    w: &'a mut W,
533}
534impl<'a> _CCPCW<'a> {
535    #[doc = r" Writes `variant` to the field"]
536    #[inline]
537    pub fn variant(self, variant: CCPCW) -> &'a mut W {
538        {
539            self.bit(variant._bits())
540        }
541    }
542    #[doc = "CCxE, CCxNE and OCxM bits are not preloaded"]
543    #[inline]
544    pub fn not_preloaded(self) -> &'a mut W {
545        self.variant(CCPCW::NOTPRELOADED)
546    }
547    #[doc = "CCxE, CCxNE and OCxM bits are preloaded"]
548    #[inline]
549    pub fn preloaded(self) -> &'a mut W {
550        self.variant(CCPCW::PRELOADED)
551    }
552    #[doc = r" Sets the field bit"]
553    pub fn set_bit(self) -> &'a mut W {
554        self.bit(true)
555    }
556    #[doc = r" Clears the field bit"]
557    pub fn clear_bit(self) -> &'a mut W {
558        self.bit(false)
559    }
560    #[doc = r" Writes raw bits to the field"]
561    #[inline]
562    pub fn bit(self, value: bool) -> &'a mut W {
563        const MASK: bool = true;
564        const OFFSET: u8 = 0;
565        self.w.bits &= !((MASK as u32) << OFFSET);
566        self.w.bits |= ((value & MASK) as u32) << OFFSET;
567        self.w
568    }
569}
570impl R {
571    #[doc = r" Value of the register as raw bits"]
572    #[inline]
573    pub fn bits(&self) -> u32 {
574        self.bits
575    }
576    #[doc = "Bit 9 - Output Idle state 1"]
577    #[inline]
578    pub fn ois1n(&self) -> OIS1NR {
579        OIS1NR::_from({
580            const MASK: bool = true;
581            const OFFSET: u8 = 9;
582            ((self.bits >> OFFSET) & MASK as u32) != 0
583        })
584    }
585    #[doc = "Bit 8 - Output Idle state 1"]
586    #[inline]
587    pub fn ois1(&self) -> OIS1R {
588        OIS1R::_from({
589            const MASK: bool = true;
590            const OFFSET: u8 = 8;
591            ((self.bits >> OFFSET) & MASK as u32) != 0
592        })
593    }
594    #[doc = "Bit 3 - Capture/compare DMA selection"]
595    #[inline]
596    pub fn ccds(&self) -> CCDSR {
597        CCDSR::_from({
598            const MASK: bool = true;
599            const OFFSET: u8 = 3;
600            ((self.bits >> OFFSET) & MASK as u32) != 0
601        })
602    }
603    #[doc = "Bit 2 - Capture/compare control update selection"]
604    #[inline]
605    pub fn ccus(&self) -> CCUSR {
606        CCUSR::_from({
607            const MASK: bool = true;
608            const OFFSET: u8 = 2;
609            ((self.bits >> OFFSET) & MASK as u32) != 0
610        })
611    }
612    #[doc = "Bit 0 - Capture/compare preloaded control"]
613    #[inline]
614    pub fn ccpc(&self) -> CCPCR {
615        CCPCR::_from({
616            const MASK: bool = true;
617            const OFFSET: u8 = 0;
618            ((self.bits >> OFFSET) & MASK as u32) != 0
619        })
620    }
621}
622impl W {
623    #[doc = r" Reset value of the register"]
624    #[inline]
625    pub fn reset_value() -> W {
626        W { bits: 0 }
627    }
628    #[doc = r" Writes raw bits to the register"]
629    #[inline]
630    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
631        self.bits = bits;
632        self
633    }
634    #[doc = "Bit 9 - Output Idle state 1"]
635    #[inline]
636    pub fn ois1n(&mut self) -> _OIS1NW {
637        _OIS1NW { w: self }
638    }
639    #[doc = "Bit 8 - Output Idle state 1"]
640    #[inline]
641    pub fn ois1(&mut self) -> _OIS1W {
642        _OIS1W { w: self }
643    }
644    #[doc = "Bit 3 - Capture/compare DMA selection"]
645    #[inline]
646    pub fn ccds(&mut self) -> _CCDSW {
647        _CCDSW { w: self }
648    }
649    #[doc = "Bit 2 - Capture/compare control update selection"]
650    #[inline]
651    pub fn ccus(&mut self) -> _CCUSW {
652        _CCUSW { w: self }
653    }
654    #[doc = "Bit 0 - Capture/compare preloaded control"]
655    #[inline]
656    pub fn ccpc(&mut self) -> _CCPCW {
657        _CCPCW { w: self }
658    }
659}