1#[doc = r" Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - control register 1"]
5 pub cr1: CR1,
6 #[doc = "0x04 - control register 2"]
7 pub cr2: CR2,
8 _reserved0: [u8; 4usize],
9 #[doc = "0x0c - DMA/Interrupt enable register"]
10 pub dier: DIER,
11 #[doc = "0x10 - status register"]
12 pub sr: SR,
13 #[doc = "0x14 - event generation register"]
14 pub egr: EGR,
15 #[doc = "0x18 - capture/compare mode register (output mode)"]
16 pub ccmr1_output: CCMR1_OUTPUT,
17 _reserved1: [u8; 4usize],
18 #[doc = "0x20 - capture/compare enable register"]
19 pub ccer: CCER,
20 #[doc = "0x24 - counter"]
21 pub cnt: CNT,
22 #[doc = "0x28 - prescaler"]
23 pub psc: PSC,
24 #[doc = "0x2c - auto-reload register"]
25 pub arr: ARR,
26 #[doc = "0x30 - repetition counter register"]
27 pub rcr: RCR,
28 #[doc = "0x34 - capture/compare register 1"]
29 pub ccr1: CCR1,
30 _reserved2: [u8; 12usize],
31 #[doc = "0x44 - break and dead-time register"]
32 pub bdtr: BDTR,
33 #[doc = "0x48 - DMA control register"]
34 pub dcr: DCR,
35 #[doc = "0x4c - DMA address for full transfer"]
36 pub dmar: DMAR,
37 #[doc = "0x50 - TIM16 option register 1"]
38 pub or1: OR1,
39 _reserved3: [u8; 12usize],
40 #[doc = "0x60 - TIM17 option register 1"]
41 pub or2: OR2,
42}
43#[doc = "control register 1"]
44pub struct CR1 {
45 register: ::vcell::VolatileCell<u32>,
46}
47#[doc = "control register 1"]
48pub mod cr1;
49#[doc = "control register 2"]
50pub struct CR2 {
51 register: ::vcell::VolatileCell<u32>,
52}
53#[doc = "control register 2"]
54pub mod cr2;
55#[doc = "DMA/Interrupt enable register"]
56pub struct DIER {
57 register: ::vcell::VolatileCell<u32>,
58}
59#[doc = "DMA/Interrupt enable register"]
60pub mod dier;
61#[doc = "status register"]
62pub struct SR {
63 register: ::vcell::VolatileCell<u32>,
64}
65#[doc = "status register"]
66pub mod sr;
67#[doc = "event generation register"]
68pub struct EGR {
69 register: ::vcell::VolatileCell<u32>,
70}
71#[doc = "event generation register"]
72pub mod egr;
73#[doc = "capture/compare mode register (output mode)"]
74pub struct CCMR1_OUTPUT {
75 register: ::vcell::VolatileCell<u32>,
76}
77#[doc = "capture/compare mode register (output mode)"]
78pub mod ccmr1_output;
79#[doc = "capture/compare mode register 1 (input mode)"]
80pub struct CCMR1_INPUT {
81 register: ::vcell::VolatileCell<u32>,
82}
83#[doc = "capture/compare mode register 1 (input mode)"]
84pub mod ccmr1_input;
85#[doc = "capture/compare enable register"]
86pub struct CCER {
87 register: ::vcell::VolatileCell<u32>,
88}
89#[doc = "capture/compare enable register"]
90pub mod ccer;
91#[doc = "counter"]
92pub struct CNT {
93 register: ::vcell::VolatileCell<u32>,
94}
95#[doc = "counter"]
96pub mod cnt;
97#[doc = "prescaler"]
98pub struct PSC {
99 register: ::vcell::VolatileCell<u32>,
100}
101#[doc = "prescaler"]
102pub mod psc;
103#[doc = "auto-reload register"]
104pub struct ARR {
105 register: ::vcell::VolatileCell<u32>,
106}
107#[doc = "auto-reload register"]
108pub mod arr;
109#[doc = "repetition counter register"]
110pub struct RCR {
111 register: ::vcell::VolatileCell<u32>,
112}
113#[doc = "repetition counter register"]
114pub mod rcr;
115#[doc = "capture/compare register 1"]
116pub struct CCR1 {
117 register: ::vcell::VolatileCell<u32>,
118}
119#[doc = "capture/compare register 1"]
120pub mod ccr1;
121#[doc = "break and dead-time register"]
122pub struct BDTR {
123 register: ::vcell::VolatileCell<u32>,
124}
125#[doc = "break and dead-time register"]
126pub mod bdtr;
127#[doc = "DMA control register"]
128pub struct DCR {
129 register: ::vcell::VolatileCell<u32>,
130}
131#[doc = "DMA control register"]
132pub mod dcr;
133#[doc = "DMA address for full transfer"]
134pub struct DMAR {
135 register: ::vcell::VolatileCell<u32>,
136}
137#[doc = "DMA address for full transfer"]
138pub mod dmar;
139#[doc = "TIM16 option register 1"]
140pub struct OR1 {
141 register: ::vcell::VolatileCell<u32>,
142}
143#[doc = "TIM16 option register 1"]
144pub mod or1;
145#[doc = "TIM17 option register 1"]
146pub struct OR2 {
147 register: ::vcell::VolatileCell<u32>,
148}
149#[doc = "TIM17 option register 1"]
150pub mod or2;