stm32l4x2_pac/quadspi/
ccr.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CCR {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct DDRMR {
47    bits: bool,
48}
49impl DDRMR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct DHHCR {
68    bits: bool,
69}
70impl DHHCR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = r" Value of the field"]
88pub struct SIOOR {
89    bits: bool,
90}
91impl SIOOR {
92    #[doc = r" Value of the field as raw bits"]
93    #[inline]
94    pub fn bit(&self) -> bool {
95        self.bits
96    }
97    #[doc = r" Returns `true` if the bit is clear (0)"]
98    #[inline]
99    pub fn bit_is_clear(&self) -> bool {
100        !self.bit()
101    }
102    #[doc = r" Returns `true` if the bit is set (1)"]
103    #[inline]
104    pub fn bit_is_set(&self) -> bool {
105        self.bit()
106    }
107}
108#[doc = r" Value of the field"]
109pub struct FMODER {
110    bits: u8,
111}
112impl FMODER {
113    #[doc = r" Value of the field as raw bits"]
114    #[inline]
115    pub fn bits(&self) -> u8 {
116        self.bits
117    }
118}
119#[doc = r" Value of the field"]
120pub struct DMODER {
121    bits: u8,
122}
123impl DMODER {
124    #[doc = r" Value of the field as raw bits"]
125    #[inline]
126    pub fn bits(&self) -> u8 {
127        self.bits
128    }
129}
130#[doc = r" Value of the field"]
131pub struct DCYCR {
132    bits: u8,
133}
134impl DCYCR {
135    #[doc = r" Value of the field as raw bits"]
136    #[inline]
137    pub fn bits(&self) -> u8 {
138        self.bits
139    }
140}
141#[doc = r" Value of the field"]
142pub struct ABSIZER {
143    bits: u8,
144}
145impl ABSIZER {
146    #[doc = r" Value of the field as raw bits"]
147    #[inline]
148    pub fn bits(&self) -> u8 {
149        self.bits
150    }
151}
152#[doc = r" Value of the field"]
153pub struct ABMODER {
154    bits: u8,
155}
156impl ABMODER {
157    #[doc = r" Value of the field as raw bits"]
158    #[inline]
159    pub fn bits(&self) -> u8 {
160        self.bits
161    }
162}
163#[doc = r" Value of the field"]
164pub struct ADSIZER {
165    bits: u8,
166}
167impl ADSIZER {
168    #[doc = r" Value of the field as raw bits"]
169    #[inline]
170    pub fn bits(&self) -> u8 {
171        self.bits
172    }
173}
174#[doc = r" Value of the field"]
175pub struct ADMODER {
176    bits: u8,
177}
178impl ADMODER {
179    #[doc = r" Value of the field as raw bits"]
180    #[inline]
181    pub fn bits(&self) -> u8 {
182        self.bits
183    }
184}
185#[doc = r" Value of the field"]
186pub struct IMODER {
187    bits: u8,
188}
189impl IMODER {
190    #[doc = r" Value of the field as raw bits"]
191    #[inline]
192    pub fn bits(&self) -> u8 {
193        self.bits
194    }
195}
196#[doc = r" Value of the field"]
197pub struct INSTRUCTIONR {
198    bits: u8,
199}
200impl INSTRUCTIONR {
201    #[doc = r" Value of the field as raw bits"]
202    #[inline]
203    pub fn bits(&self) -> u8 {
204        self.bits
205    }
206}
207#[doc = r" Proxy"]
208pub struct _DDRMW<'a> {
209    w: &'a mut W,
210}
211impl<'a> _DDRMW<'a> {
212    #[doc = r" Sets the field bit"]
213    pub fn set_bit(self) -> &'a mut W {
214        self.bit(true)
215    }
216    #[doc = r" Clears the field bit"]
217    pub fn clear_bit(self) -> &'a mut W {
218        self.bit(false)
219    }
220    #[doc = r" Writes raw bits to the field"]
221    #[inline]
222    pub fn bit(self, value: bool) -> &'a mut W {
223        const MASK: bool = true;
224        const OFFSET: u8 = 31;
225        self.w.bits &= !((MASK as u32) << OFFSET);
226        self.w.bits |= ((value & MASK) as u32) << OFFSET;
227        self.w
228    }
229}
230#[doc = r" Proxy"]
231pub struct _DHHCW<'a> {
232    w: &'a mut W,
233}
234impl<'a> _DHHCW<'a> {
235    #[doc = r" Sets the field bit"]
236    pub fn set_bit(self) -> &'a mut W {
237        self.bit(true)
238    }
239    #[doc = r" Clears the field bit"]
240    pub fn clear_bit(self) -> &'a mut W {
241        self.bit(false)
242    }
243    #[doc = r" Writes raw bits to the field"]
244    #[inline]
245    pub fn bit(self, value: bool) -> &'a mut W {
246        const MASK: bool = true;
247        const OFFSET: u8 = 30;
248        self.w.bits &= !((MASK as u32) << OFFSET);
249        self.w.bits |= ((value & MASK) as u32) << OFFSET;
250        self.w
251    }
252}
253#[doc = r" Proxy"]
254pub struct _SIOOW<'a> {
255    w: &'a mut W,
256}
257impl<'a> _SIOOW<'a> {
258    #[doc = r" Sets the field bit"]
259    pub fn set_bit(self) -> &'a mut W {
260        self.bit(true)
261    }
262    #[doc = r" Clears the field bit"]
263    pub fn clear_bit(self) -> &'a mut W {
264        self.bit(false)
265    }
266    #[doc = r" Writes raw bits to the field"]
267    #[inline]
268    pub fn bit(self, value: bool) -> &'a mut W {
269        const MASK: bool = true;
270        const OFFSET: u8 = 28;
271        self.w.bits &= !((MASK as u32) << OFFSET);
272        self.w.bits |= ((value & MASK) as u32) << OFFSET;
273        self.w
274    }
275}
276#[doc = r" Proxy"]
277pub struct _FMODEW<'a> {
278    w: &'a mut W,
279}
280impl<'a> _FMODEW<'a> {
281    #[doc = r" Writes raw bits to the field"]
282    #[inline]
283    pub unsafe fn bits(self, value: u8) -> &'a mut W {
284        const MASK: u8 = 3;
285        const OFFSET: u8 = 26;
286        self.w.bits &= !((MASK as u32) << OFFSET);
287        self.w.bits |= ((value & MASK) as u32) << OFFSET;
288        self.w
289    }
290}
291#[doc = r" Proxy"]
292pub struct _DMODEW<'a> {
293    w: &'a mut W,
294}
295impl<'a> _DMODEW<'a> {
296    #[doc = r" Writes raw bits to the field"]
297    #[inline]
298    pub unsafe fn bits(self, value: u8) -> &'a mut W {
299        const MASK: u8 = 3;
300        const OFFSET: u8 = 24;
301        self.w.bits &= !((MASK as u32) << OFFSET);
302        self.w.bits |= ((value & MASK) as u32) << OFFSET;
303        self.w
304    }
305}
306#[doc = r" Proxy"]
307pub struct _DCYCW<'a> {
308    w: &'a mut W,
309}
310impl<'a> _DCYCW<'a> {
311    #[doc = r" Writes raw bits to the field"]
312    #[inline]
313    pub unsafe fn bits(self, value: u8) -> &'a mut W {
314        const MASK: u8 = 31;
315        const OFFSET: u8 = 18;
316        self.w.bits &= !((MASK as u32) << OFFSET);
317        self.w.bits |= ((value & MASK) as u32) << OFFSET;
318        self.w
319    }
320}
321#[doc = r" Proxy"]
322pub struct _ABSIZEW<'a> {
323    w: &'a mut W,
324}
325impl<'a> _ABSIZEW<'a> {
326    #[doc = r" Writes raw bits to the field"]
327    #[inline]
328    pub unsafe fn bits(self, value: u8) -> &'a mut W {
329        const MASK: u8 = 3;
330        const OFFSET: u8 = 16;
331        self.w.bits &= !((MASK as u32) << OFFSET);
332        self.w.bits |= ((value & MASK) as u32) << OFFSET;
333        self.w
334    }
335}
336#[doc = r" Proxy"]
337pub struct _ABMODEW<'a> {
338    w: &'a mut W,
339}
340impl<'a> _ABMODEW<'a> {
341    #[doc = r" Writes raw bits to the field"]
342    #[inline]
343    pub unsafe fn bits(self, value: u8) -> &'a mut W {
344        const MASK: u8 = 3;
345        const OFFSET: u8 = 14;
346        self.w.bits &= !((MASK as u32) << OFFSET);
347        self.w.bits |= ((value & MASK) as u32) << OFFSET;
348        self.w
349    }
350}
351#[doc = r" Proxy"]
352pub struct _ADSIZEW<'a> {
353    w: &'a mut W,
354}
355impl<'a> _ADSIZEW<'a> {
356    #[doc = r" Writes raw bits to the field"]
357    #[inline]
358    pub unsafe fn bits(self, value: u8) -> &'a mut W {
359        const MASK: u8 = 3;
360        const OFFSET: u8 = 12;
361        self.w.bits &= !((MASK as u32) << OFFSET);
362        self.w.bits |= ((value & MASK) as u32) << OFFSET;
363        self.w
364    }
365}
366#[doc = r" Proxy"]
367pub struct _ADMODEW<'a> {
368    w: &'a mut W,
369}
370impl<'a> _ADMODEW<'a> {
371    #[doc = r" Writes raw bits to the field"]
372    #[inline]
373    pub unsafe fn bits(self, value: u8) -> &'a mut W {
374        const MASK: u8 = 3;
375        const OFFSET: u8 = 10;
376        self.w.bits &= !((MASK as u32) << OFFSET);
377        self.w.bits |= ((value & MASK) as u32) << OFFSET;
378        self.w
379    }
380}
381#[doc = r" Proxy"]
382pub struct _IMODEW<'a> {
383    w: &'a mut W,
384}
385impl<'a> _IMODEW<'a> {
386    #[doc = r" Writes raw bits to the field"]
387    #[inline]
388    pub unsafe fn bits(self, value: u8) -> &'a mut W {
389        const MASK: u8 = 3;
390        const OFFSET: u8 = 8;
391        self.w.bits &= !((MASK as u32) << OFFSET);
392        self.w.bits |= ((value & MASK) as u32) << OFFSET;
393        self.w
394    }
395}
396#[doc = r" Proxy"]
397pub struct _INSTRUCTIONW<'a> {
398    w: &'a mut W,
399}
400impl<'a> _INSTRUCTIONW<'a> {
401    #[doc = r" Writes raw bits to the field"]
402    #[inline]
403    pub unsafe fn bits(self, value: u8) -> &'a mut W {
404        const MASK: u8 = 255;
405        const OFFSET: u8 = 0;
406        self.w.bits &= !((MASK as u32) << OFFSET);
407        self.w.bits |= ((value & MASK) as u32) << OFFSET;
408        self.w
409    }
410}
411impl R {
412    #[doc = r" Value of the register as raw bits"]
413    #[inline]
414    pub fn bits(&self) -> u32 {
415        self.bits
416    }
417    #[doc = "Bit 31 - Double data rate mode"]
418    #[inline]
419    pub fn ddrm(&self) -> DDRMR {
420        let bits = {
421            const MASK: bool = true;
422            const OFFSET: u8 = 31;
423            ((self.bits >> OFFSET) & MASK as u32) != 0
424        };
425        DDRMR { bits }
426    }
427    #[doc = "Bit 30 - DDR hold half cycle"]
428    #[inline]
429    pub fn dhhc(&self) -> DHHCR {
430        let bits = {
431            const MASK: bool = true;
432            const OFFSET: u8 = 30;
433            ((self.bits >> OFFSET) & MASK as u32) != 0
434        };
435        DHHCR { bits }
436    }
437    #[doc = "Bit 28 - Send instruction only once mode"]
438    #[inline]
439    pub fn sioo(&self) -> SIOOR {
440        let bits = {
441            const MASK: bool = true;
442            const OFFSET: u8 = 28;
443            ((self.bits >> OFFSET) & MASK as u32) != 0
444        };
445        SIOOR { bits }
446    }
447    #[doc = "Bits 26:27 - Functional mode"]
448    #[inline]
449    pub fn fmode(&self) -> FMODER {
450        let bits = {
451            const MASK: u8 = 3;
452            const OFFSET: u8 = 26;
453            ((self.bits >> OFFSET) & MASK as u32) as u8
454        };
455        FMODER { bits }
456    }
457    #[doc = "Bits 24:25 - Data mode"]
458    #[inline]
459    pub fn dmode(&self) -> DMODER {
460        let bits = {
461            const MASK: u8 = 3;
462            const OFFSET: u8 = 24;
463            ((self.bits >> OFFSET) & MASK as u32) as u8
464        };
465        DMODER { bits }
466    }
467    #[doc = "Bits 18:22 - Number of dummy cycles"]
468    #[inline]
469    pub fn dcyc(&self) -> DCYCR {
470        let bits = {
471            const MASK: u8 = 31;
472            const OFFSET: u8 = 18;
473            ((self.bits >> OFFSET) & MASK as u32) as u8
474        };
475        DCYCR { bits }
476    }
477    #[doc = "Bits 16:17 - Alternate bytes size"]
478    #[inline]
479    pub fn absize(&self) -> ABSIZER {
480        let bits = {
481            const MASK: u8 = 3;
482            const OFFSET: u8 = 16;
483            ((self.bits >> OFFSET) & MASK as u32) as u8
484        };
485        ABSIZER { bits }
486    }
487    #[doc = "Bits 14:15 - Alternate bytes mode"]
488    #[inline]
489    pub fn abmode(&self) -> ABMODER {
490        let bits = {
491            const MASK: u8 = 3;
492            const OFFSET: u8 = 14;
493            ((self.bits >> OFFSET) & MASK as u32) as u8
494        };
495        ABMODER { bits }
496    }
497    #[doc = "Bits 12:13 - Address size"]
498    #[inline]
499    pub fn adsize(&self) -> ADSIZER {
500        let bits = {
501            const MASK: u8 = 3;
502            const OFFSET: u8 = 12;
503            ((self.bits >> OFFSET) & MASK as u32) as u8
504        };
505        ADSIZER { bits }
506    }
507    #[doc = "Bits 10:11 - Address mode"]
508    #[inline]
509    pub fn admode(&self) -> ADMODER {
510        let bits = {
511            const MASK: u8 = 3;
512            const OFFSET: u8 = 10;
513            ((self.bits >> OFFSET) & MASK as u32) as u8
514        };
515        ADMODER { bits }
516    }
517    #[doc = "Bits 8:9 - Instruction mode"]
518    #[inline]
519    pub fn imode(&self) -> IMODER {
520        let bits = {
521            const MASK: u8 = 3;
522            const OFFSET: u8 = 8;
523            ((self.bits >> OFFSET) & MASK as u32) as u8
524        };
525        IMODER { bits }
526    }
527    #[doc = "Bits 0:7 - Instruction"]
528    #[inline]
529    pub fn instruction(&self) -> INSTRUCTIONR {
530        let bits = {
531            const MASK: u8 = 255;
532            const OFFSET: u8 = 0;
533            ((self.bits >> OFFSET) & MASK as u32) as u8
534        };
535        INSTRUCTIONR { bits }
536    }
537}
538impl W {
539    #[doc = r" Reset value of the register"]
540    #[inline]
541    pub fn reset_value() -> W {
542        W { bits: 0 }
543    }
544    #[doc = r" Writes raw bits to the register"]
545    #[inline]
546    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
547        self.bits = bits;
548        self
549    }
550    #[doc = "Bit 31 - Double data rate mode"]
551    #[inline]
552    pub fn ddrm(&mut self) -> _DDRMW {
553        _DDRMW { w: self }
554    }
555    #[doc = "Bit 30 - DDR hold half cycle"]
556    #[inline]
557    pub fn dhhc(&mut self) -> _DHHCW {
558        _DHHCW { w: self }
559    }
560    #[doc = "Bit 28 - Send instruction only once mode"]
561    #[inline]
562    pub fn sioo(&mut self) -> _SIOOW {
563        _SIOOW { w: self }
564    }
565    #[doc = "Bits 26:27 - Functional mode"]
566    #[inline]
567    pub fn fmode(&mut self) -> _FMODEW {
568        _FMODEW { w: self }
569    }
570    #[doc = "Bits 24:25 - Data mode"]
571    #[inline]
572    pub fn dmode(&mut self) -> _DMODEW {
573        _DMODEW { w: self }
574    }
575    #[doc = "Bits 18:22 - Number of dummy cycles"]
576    #[inline]
577    pub fn dcyc(&mut self) -> _DCYCW {
578        _DCYCW { w: self }
579    }
580    #[doc = "Bits 16:17 - Alternate bytes size"]
581    #[inline]
582    pub fn absize(&mut self) -> _ABSIZEW {
583        _ABSIZEW { w: self }
584    }
585    #[doc = "Bits 14:15 - Alternate bytes mode"]
586    #[inline]
587    pub fn abmode(&mut self) -> _ABMODEW {
588        _ABMODEW { w: self }
589    }
590    #[doc = "Bits 12:13 - Address size"]
591    #[inline]
592    pub fn adsize(&mut self) -> _ADSIZEW {
593        _ADSIZEW { w: self }
594    }
595    #[doc = "Bits 10:11 - Address mode"]
596    #[inline]
597    pub fn admode(&mut self) -> _ADMODEW {
598        _ADMODEW { w: self }
599    }
600    #[doc = "Bits 8:9 - Instruction mode"]
601    #[inline]
602    pub fn imode(&mut self) -> _IMODEW {
603        _IMODEW { w: self }
604    }
605    #[doc = "Bits 0:7 - Instruction"]
606    #[inline]
607    pub fn instruction(&mut self) -> _INSTRUCTIONW {
608        _INSTRUCTIONW { w: self }
609    }
610}
stm32l4x2_pac/quadspi/ccr.rs

stm32l4x2_pac/quadspi/
ccr.rs
