1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::LCKR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `LCKK`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum LCKKR {
48 #[doc = "Port configuration lock key not active"]
49 NOTACTIVE,
50 #[doc = "Port configuration lock key active"]
51 ACTIVE,
52}
53impl LCKKR {
54 #[doc = r" Returns `true` if the bit is clear (0)"]
55 #[inline]
56 pub fn bit_is_clear(&self) -> bool {
57 !self.bit()
58 }
59 #[doc = r" Returns `true` if the bit is set (1)"]
60 #[inline]
61 pub fn bit_is_set(&self) -> bool {
62 self.bit()
63 }
64 #[doc = r" Value of the field as raw bits"]
65 #[inline]
66 pub fn bit(&self) -> bool {
67 match *self {
68 LCKKR::NOTACTIVE => false,
69 LCKKR::ACTIVE => true,
70 }
71 }
72 #[allow(missing_docs)]
73 #[doc(hidden)]
74 #[inline]
75 pub fn _from(value: bool) -> LCKKR {
76 match value {
77 false => LCKKR::NOTACTIVE,
78 true => LCKKR::ACTIVE,
79 }
80 }
81 #[doc = "Checks if the value of the field is `NOTACTIVE`"]
82 #[inline]
83 pub fn is_not_active(&self) -> bool {
84 *self == LCKKR::NOTACTIVE
85 }
86 #[doc = "Checks if the value of the field is `ACTIVE`"]
87 #[inline]
88 pub fn is_active(&self) -> bool {
89 *self == LCKKR::ACTIVE
90 }
91}
92#[doc = "Possible values of the field `LCK15`"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum LCK15R {
95 #[doc = "Port configuration not locked"]
96 UNLOCKED,
97 #[doc = "Port configuration locked"]
98 LOCKED,
99}
100impl LCK15R {
101 #[doc = r" Returns `true` if the bit is clear (0)"]
102 #[inline]
103 pub fn bit_is_clear(&self) -> bool {
104 !self.bit()
105 }
106 #[doc = r" Returns `true` if the bit is set (1)"]
107 #[inline]
108 pub fn bit_is_set(&self) -> bool {
109 self.bit()
110 }
111 #[doc = r" Value of the field as raw bits"]
112 #[inline]
113 pub fn bit(&self) -> bool {
114 match *self {
115 LCK15R::UNLOCKED => false,
116 LCK15R::LOCKED => true,
117 }
118 }
119 #[allow(missing_docs)]
120 #[doc(hidden)]
121 #[inline]
122 pub fn _from(value: bool) -> LCK15R {
123 match value {
124 false => LCK15R::UNLOCKED,
125 true => LCK15R::LOCKED,
126 }
127 }
128 #[doc = "Checks if the value of the field is `UNLOCKED`"]
129 #[inline]
130 pub fn is_unlocked(&self) -> bool {
131 *self == LCK15R::UNLOCKED
132 }
133 #[doc = "Checks if the value of the field is `LOCKED`"]
134 #[inline]
135 pub fn is_locked(&self) -> bool {
136 *self == LCK15R::LOCKED
137 }
138}
139#[doc = "Possible values of the field `LCK14`"]
140pub type LCK14R = LCK15R;
141#[doc = "Possible values of the field `LCK13`"]
142pub type LCK13R = LCK15R;
143#[doc = "Possible values of the field `LCK12`"]
144pub type LCK12R = LCK15R;
145#[doc = "Possible values of the field `LCK11`"]
146pub type LCK11R = LCK15R;
147#[doc = "Possible values of the field `LCK10`"]
148pub type LCK10R = LCK15R;
149#[doc = "Possible values of the field `LCK9`"]
150#[derive(Clone, Copy, Debug, PartialEq)]
151pub enum LCK9R {
152 #[doc = "Port configuration not locked"]
153 UNLOCKED,
154 #[doc = "Port configuration locked"]
155 LOCKED,
156}
157impl LCK9R {
158 #[doc = r" Returns `true` if the bit is clear (0)"]
159 #[inline]
160 pub fn bit_is_clear(&self) -> bool {
161 !self.bit()
162 }
163 #[doc = r" Returns `true` if the bit is set (1)"]
164 #[inline]
165 pub fn bit_is_set(&self) -> bool {
166 self.bit()
167 }
168 #[doc = r" Value of the field as raw bits"]
169 #[inline]
170 pub fn bit(&self) -> bool {
171 match *self {
172 LCK9R::UNLOCKED => false,
173 LCK9R::LOCKED => true,
174 }
175 }
176 #[allow(missing_docs)]
177 #[doc(hidden)]
178 #[inline]
179 pub fn _from(value: bool) -> LCK9R {
180 match value {
181 false => LCK9R::UNLOCKED,
182 true => LCK9R::LOCKED,
183 }
184 }
185 #[doc = "Checks if the value of the field is `UNLOCKED`"]
186 #[inline]
187 pub fn is_unlocked(&self) -> bool {
188 *self == LCK9R::UNLOCKED
189 }
190 #[doc = "Checks if the value of the field is `LOCKED`"]
191 #[inline]
192 pub fn is_locked(&self) -> bool {
193 *self == LCK9R::LOCKED
194 }
195}
196#[doc = "Possible values of the field `LCK8`"]
197pub type LCK8R = LCK9R;
198#[doc = "Possible values of the field `LCK7`"]
199pub type LCK7R = LCK9R;
200#[doc = "Possible values of the field `LCK6`"]
201pub type LCK6R = LCK9R;
202#[doc = "Possible values of the field `LCK5`"]
203pub type LCK5R = LCK9R;
204#[doc = "Possible values of the field `LCK4`"]
205pub type LCK4R = LCK9R;
206#[doc = "Possible values of the field `LCK3`"]
207pub type LCK3R = LCK9R;
208#[doc = "Possible values of the field `LCK2`"]
209pub type LCK2R = LCK9R;
210#[doc = "Possible values of the field `LCK1`"]
211pub type LCK1R = LCK9R;
212#[doc = "Possible values of the field `LCK0`"]
213pub type LCK0R = LCK9R;
214#[doc = "Values that can be written to the field `LCKK`"]
215pub enum LCKKW {
216 #[doc = "Port configuration lock key not active"]
217 NOTACTIVE,
218 #[doc = "Port configuration lock key active"]
219 ACTIVE,
220}
221impl LCKKW {
222 #[allow(missing_docs)]
223 #[doc(hidden)]
224 #[inline]
225 pub fn _bits(&self) -> bool {
226 match *self {
227 LCKKW::NOTACTIVE => false,
228 LCKKW::ACTIVE => true,
229 }
230 }
231}
232#[doc = r" Proxy"]
233pub struct _LCKKW<'a> {
234 w: &'a mut W,
235}
236impl<'a> _LCKKW<'a> {
237 #[doc = r" Writes `variant` to the field"]
238 #[inline]
239 pub fn variant(self, variant: LCKKW) -> &'a mut W {
240 {
241 self.bit(variant._bits())
242 }
243 }
244 #[doc = "Port configuration lock key not active"]
245 #[inline]
246 pub fn not_active(self) -> &'a mut W {
247 self.variant(LCKKW::NOTACTIVE)
248 }
249 #[doc = "Port configuration lock key active"]
250 #[inline]
251 pub fn active(self) -> &'a mut W {
252 self.variant(LCKKW::ACTIVE)
253 }
254 #[doc = r" Sets the field bit"]
255 pub fn set_bit(self) -> &'a mut W {
256 self.bit(true)
257 }
258 #[doc = r" Clears the field bit"]
259 pub fn clear_bit(self) -> &'a mut W {
260 self.bit(false)
261 }
262 #[doc = r" Writes raw bits to the field"]
263 #[inline]
264 pub fn bit(self, value: bool) -> &'a mut W {
265 const MASK: bool = true;
266 const OFFSET: u8 = 16;
267 self.w.bits &= !((MASK as u32) << OFFSET);
268 self.w.bits |= ((value & MASK) as u32) << OFFSET;
269 self.w
270 }
271}
272#[doc = "Values that can be written to the field `LCK15`"]
273pub enum LCK15W {
274 #[doc = "Port configuration not locked"]
275 UNLOCKED,
276 #[doc = "Port configuration locked"]
277 LOCKED,
278}
279impl LCK15W {
280 #[allow(missing_docs)]
281 #[doc(hidden)]
282 #[inline]
283 pub fn _bits(&self) -> bool {
284 match *self {
285 LCK15W::UNLOCKED => false,
286 LCK15W::LOCKED => true,
287 }
288 }
289}
290#[doc = r" Proxy"]
291pub struct _LCK15W<'a> {
292 w: &'a mut W,
293}
294impl<'a> _LCK15W<'a> {
295 #[doc = r" Writes `variant` to the field"]
296 #[inline]
297 pub fn variant(self, variant: LCK15W) -> &'a mut W {
298 {
299 self.bit(variant._bits())
300 }
301 }
302 #[doc = "Port configuration not locked"]
303 #[inline]
304 pub fn unlocked(self) -> &'a mut W {
305 self.variant(LCK15W::UNLOCKED)
306 }
307 #[doc = "Port configuration locked"]
308 #[inline]
309 pub fn locked(self) -> &'a mut W {
310 self.variant(LCK15W::LOCKED)
311 }
312 #[doc = r" Sets the field bit"]
313 pub fn set_bit(self) -> &'a mut W {
314 self.bit(true)
315 }
316 #[doc = r" Clears the field bit"]
317 pub fn clear_bit(self) -> &'a mut W {
318 self.bit(false)
319 }
320 #[doc = r" Writes raw bits to the field"]
321 #[inline]
322 pub fn bit(self, value: bool) -> &'a mut W {
323 const MASK: bool = true;
324 const OFFSET: u8 = 15;
325 self.w.bits &= !((MASK as u32) << OFFSET);
326 self.w.bits |= ((value & MASK) as u32) << OFFSET;
327 self.w
328 }
329}
330#[doc = "Values that can be written to the field `LCK14`"]
331pub type LCK14W = LCK15W;
332#[doc = r" Proxy"]
333pub struct _LCK14W<'a> {
334 w: &'a mut W,
335}
336impl<'a> _LCK14W<'a> {
337 #[doc = r" Writes `variant` to the field"]
338 #[inline]
339 pub fn variant(self, variant: LCK14W) -> &'a mut W {
340 {
341 self.bit(variant._bits())
342 }
343 }
344 #[doc = "Port configuration not locked"]
345 #[inline]
346 pub fn unlocked(self) -> &'a mut W {
347 self.variant(LCK15W::UNLOCKED)
348 }
349 #[doc = "Port configuration locked"]
350 #[inline]
351 pub fn locked(self) -> &'a mut W {
352 self.variant(LCK15W::LOCKED)
353 }
354 #[doc = r" Sets the field bit"]
355 pub fn set_bit(self) -> &'a mut W {
356 self.bit(true)
357 }
358 #[doc = r" Clears the field bit"]
359 pub fn clear_bit(self) -> &'a mut W {
360 self.bit(false)
361 }
362 #[doc = r" Writes raw bits to the field"]
363 #[inline]
364 pub fn bit(self, value: bool) -> &'a mut W {
365 const MASK: bool = true;
366 const OFFSET: u8 = 14;
367 self.w.bits &= !((MASK as u32) << OFFSET);
368 self.w.bits |= ((value & MASK) as u32) << OFFSET;
369 self.w
370 }
371}
372#[doc = "Values that can be written to the field `LCK13`"]
373pub type LCK13W = LCK15W;
374#[doc = r" Proxy"]
375pub struct _LCK13W<'a> {
376 w: &'a mut W,
377}
378impl<'a> _LCK13W<'a> {
379 #[doc = r" Writes `variant` to the field"]
380 #[inline]
381 pub fn variant(self, variant: LCK13W) -> &'a mut W {
382 {
383 self.bit(variant._bits())
384 }
385 }
386 #[doc = "Port configuration not locked"]
387 #[inline]
388 pub fn unlocked(self) -> &'a mut W {
389 self.variant(LCK15W::UNLOCKED)
390 }
391 #[doc = "Port configuration locked"]
392 #[inline]
393 pub fn locked(self) -> &'a mut W {
394 self.variant(LCK15W::LOCKED)
395 }
396 #[doc = r" Sets the field bit"]
397 pub fn set_bit(self) -> &'a mut W {
398 self.bit(true)
399 }
400 #[doc = r" Clears the field bit"]
401 pub fn clear_bit(self) -> &'a mut W {
402 self.bit(false)
403 }
404 #[doc = r" Writes raw bits to the field"]
405 #[inline]
406 pub fn bit(self, value: bool) -> &'a mut W {
407 const MASK: bool = true;
408 const OFFSET: u8 = 13;
409 self.w.bits &= !((MASK as u32) << OFFSET);
410 self.w.bits |= ((value & MASK) as u32) << OFFSET;
411 self.w
412 }
413}
414#[doc = "Values that can be written to the field `LCK12`"]
415pub type LCK12W = LCK15W;
416#[doc = r" Proxy"]
417pub struct _LCK12W<'a> {
418 w: &'a mut W,
419}
420impl<'a> _LCK12W<'a> {
421 #[doc = r" Writes `variant` to the field"]
422 #[inline]
423 pub fn variant(self, variant: LCK12W) -> &'a mut W {
424 {
425 self.bit(variant._bits())
426 }
427 }
428 #[doc = "Port configuration not locked"]
429 #[inline]
430 pub fn unlocked(self) -> &'a mut W {
431 self.variant(LCK15W::UNLOCKED)
432 }
433 #[doc = "Port configuration locked"]
434 #[inline]
435 pub fn locked(self) -> &'a mut W {
436 self.variant(LCK15W::LOCKED)
437 }
438 #[doc = r" Sets the field bit"]
439 pub fn set_bit(self) -> &'a mut W {
440 self.bit(true)
441 }
442 #[doc = r" Clears the field bit"]
443 pub fn clear_bit(self) -> &'a mut W {
444 self.bit(false)
445 }
446 #[doc = r" Writes raw bits to the field"]
447 #[inline]
448 pub fn bit(self, value: bool) -> &'a mut W {
449 const MASK: bool = true;
450 const OFFSET: u8 = 12;
451 self.w.bits &= !((MASK as u32) << OFFSET);
452 self.w.bits |= ((value & MASK) as u32) << OFFSET;
453 self.w
454 }
455}
456#[doc = "Values that can be written to the field `LCK11`"]
457pub type LCK11W = LCK15W;
458#[doc = r" Proxy"]
459pub struct _LCK11W<'a> {
460 w: &'a mut W,
461}
462impl<'a> _LCK11W<'a> {
463 #[doc = r" Writes `variant` to the field"]
464 #[inline]
465 pub fn variant(self, variant: LCK11W) -> &'a mut W {
466 {
467 self.bit(variant._bits())
468 }
469 }
470 #[doc = "Port configuration not locked"]
471 #[inline]
472 pub fn unlocked(self) -> &'a mut W {
473 self.variant(LCK15W::UNLOCKED)
474 }
475 #[doc = "Port configuration locked"]
476 #[inline]
477 pub fn locked(self) -> &'a mut W {
478 self.variant(LCK15W::LOCKED)
479 }
480 #[doc = r" Sets the field bit"]
481 pub fn set_bit(self) -> &'a mut W {
482 self.bit(true)
483 }
484 #[doc = r" Clears the field bit"]
485 pub fn clear_bit(self) -> &'a mut W {
486 self.bit(false)
487 }
488 #[doc = r" Writes raw bits to the field"]
489 #[inline]
490 pub fn bit(self, value: bool) -> &'a mut W {
491 const MASK: bool = true;
492 const OFFSET: u8 = 11;
493 self.w.bits &= !((MASK as u32) << OFFSET);
494 self.w.bits |= ((value & MASK) as u32) << OFFSET;
495 self.w
496 }
497}
498#[doc = "Values that can be written to the field `LCK10`"]
499pub type LCK10W = LCK15W;
500#[doc = r" Proxy"]
501pub struct _LCK10W<'a> {
502 w: &'a mut W,
503}
504impl<'a> _LCK10W<'a> {
505 #[doc = r" Writes `variant` to the field"]
506 #[inline]
507 pub fn variant(self, variant: LCK10W) -> &'a mut W {
508 {
509 self.bit(variant._bits())
510 }
511 }
512 #[doc = "Port configuration not locked"]
513 #[inline]
514 pub fn unlocked(self) -> &'a mut W {
515 self.variant(LCK15W::UNLOCKED)
516 }
517 #[doc = "Port configuration locked"]
518 #[inline]
519 pub fn locked(self) -> &'a mut W {
520 self.variant(LCK15W::LOCKED)
521 }
522 #[doc = r" Sets the field bit"]
523 pub fn set_bit(self) -> &'a mut W {
524 self.bit(true)
525 }
526 #[doc = r" Clears the field bit"]
527 pub fn clear_bit(self) -> &'a mut W {
528 self.bit(false)
529 }
530 #[doc = r" Writes raw bits to the field"]
531 #[inline]
532 pub fn bit(self, value: bool) -> &'a mut W {
533 const MASK: bool = true;
534 const OFFSET: u8 = 10;
535 self.w.bits &= !((MASK as u32) << OFFSET);
536 self.w.bits |= ((value & MASK) as u32) << OFFSET;
537 self.w
538 }
539}
540#[doc = "Values that can be written to the field `LCK9`"]
541pub enum LCK9W {
542 #[doc = "Port configuration not locked"]
543 UNLOCKED,
544 #[doc = "Port configuration locked"]
545 LOCKED,
546}
547impl LCK9W {
548 #[allow(missing_docs)]
549 #[doc(hidden)]
550 #[inline]
551 pub fn _bits(&self) -> bool {
552 match *self {
553 LCK9W::UNLOCKED => false,
554 LCK9W::LOCKED => true,
555 }
556 }
557}
558#[doc = r" Proxy"]
559pub struct _LCK9W<'a> {
560 w: &'a mut W,
561}
562impl<'a> _LCK9W<'a> {
563 #[doc = r" Writes `variant` to the field"]
564 #[inline]
565 pub fn variant(self, variant: LCK9W) -> &'a mut W {
566 {
567 self.bit(variant._bits())
568 }
569 }
570 #[doc = "Port configuration not locked"]
571 #[inline]
572 pub fn unlocked(self) -> &'a mut W {
573 self.variant(LCK9W::UNLOCKED)
574 }
575 #[doc = "Port configuration locked"]
576 #[inline]
577 pub fn locked(self) -> &'a mut W {
578 self.variant(LCK9W::LOCKED)
579 }
580 #[doc = r" Sets the field bit"]
581 pub fn set_bit(self) -> &'a mut W {
582 self.bit(true)
583 }
584 #[doc = r" Clears the field bit"]
585 pub fn clear_bit(self) -> &'a mut W {
586 self.bit(false)
587 }
588 #[doc = r" Writes raw bits to the field"]
589 #[inline]
590 pub fn bit(self, value: bool) -> &'a mut W {
591 const MASK: bool = true;
592 const OFFSET: u8 = 9;
593 self.w.bits &= !((MASK as u32) << OFFSET);
594 self.w.bits |= ((value & MASK) as u32) << OFFSET;
595 self.w
596 }
597}
598#[doc = "Values that can be written to the field `LCK8`"]
599pub type LCK8W = LCK9W;
600#[doc = r" Proxy"]
601pub struct _LCK8W<'a> {
602 w: &'a mut W,
603}
604impl<'a> _LCK8W<'a> {
605 #[doc = r" Writes `variant` to the field"]
606 #[inline]
607 pub fn variant(self, variant: LCK8W) -> &'a mut W {
608 {
609 self.bit(variant._bits())
610 }
611 }
612 #[doc = "Port configuration not locked"]
613 #[inline]
614 pub fn unlocked(self) -> &'a mut W {
615 self.variant(LCK9W::UNLOCKED)
616 }
617 #[doc = "Port configuration locked"]
618 #[inline]
619 pub fn locked(self) -> &'a mut W {
620 self.variant(LCK9W::LOCKED)
621 }
622 #[doc = r" Sets the field bit"]
623 pub fn set_bit(self) -> &'a mut W {
624 self.bit(true)
625 }
626 #[doc = r" Clears the field bit"]
627 pub fn clear_bit(self) -> &'a mut W {
628 self.bit(false)
629 }
630 #[doc = r" Writes raw bits to the field"]
631 #[inline]
632 pub fn bit(self, value: bool) -> &'a mut W {
633 const MASK: bool = true;
634 const OFFSET: u8 = 8;
635 self.w.bits &= !((MASK as u32) << OFFSET);
636 self.w.bits |= ((value & MASK) as u32) << OFFSET;
637 self.w
638 }
639}
640#[doc = "Values that can be written to the field `LCK7`"]
641pub type LCK7W = LCK9W;
642#[doc = r" Proxy"]
643pub struct _LCK7W<'a> {
644 w: &'a mut W,
645}
646impl<'a> _LCK7W<'a> {
647 #[doc = r" Writes `variant` to the field"]
648 #[inline]
649 pub fn variant(self, variant: LCK7W) -> &'a mut W {
650 {
651 self.bit(variant._bits())
652 }
653 }
654 #[doc = "Port configuration not locked"]
655 #[inline]
656 pub fn unlocked(self) -> &'a mut W {
657 self.variant(LCK9W::UNLOCKED)
658 }
659 #[doc = "Port configuration locked"]
660 #[inline]
661 pub fn locked(self) -> &'a mut W {
662 self.variant(LCK9W::LOCKED)
663 }
664 #[doc = r" Sets the field bit"]
665 pub fn set_bit(self) -> &'a mut W {
666 self.bit(true)
667 }
668 #[doc = r" Clears the field bit"]
669 pub fn clear_bit(self) -> &'a mut W {
670 self.bit(false)
671 }
672 #[doc = r" Writes raw bits to the field"]
673 #[inline]
674 pub fn bit(self, value: bool) -> &'a mut W {
675 const MASK: bool = true;
676 const OFFSET: u8 = 7;
677 self.w.bits &= !((MASK as u32) << OFFSET);
678 self.w.bits |= ((value & MASK) as u32) << OFFSET;
679 self.w
680 }
681}
682#[doc = "Values that can be written to the field `LCK6`"]
683pub type LCK6W = LCK9W;
684#[doc = r" Proxy"]
685pub struct _LCK6W<'a> {
686 w: &'a mut W,
687}
688impl<'a> _LCK6W<'a> {
689 #[doc = r" Writes `variant` to the field"]
690 #[inline]
691 pub fn variant(self, variant: LCK6W) -> &'a mut W {
692 {
693 self.bit(variant._bits())
694 }
695 }
696 #[doc = "Port configuration not locked"]
697 #[inline]
698 pub fn unlocked(self) -> &'a mut W {
699 self.variant(LCK9W::UNLOCKED)
700 }
701 #[doc = "Port configuration locked"]
702 #[inline]
703 pub fn locked(self) -> &'a mut W {
704 self.variant(LCK9W::LOCKED)
705 }
706 #[doc = r" Sets the field bit"]
707 pub fn set_bit(self) -> &'a mut W {
708 self.bit(true)
709 }
710 #[doc = r" Clears the field bit"]
711 pub fn clear_bit(self) -> &'a mut W {
712 self.bit(false)
713 }
714 #[doc = r" Writes raw bits to the field"]
715 #[inline]
716 pub fn bit(self, value: bool) -> &'a mut W {
717 const MASK: bool = true;
718 const OFFSET: u8 = 6;
719 self.w.bits &= !((MASK as u32) << OFFSET);
720 self.w.bits |= ((value & MASK) as u32) << OFFSET;
721 self.w
722 }
723}
724#[doc = "Values that can be written to the field `LCK5`"]
725pub type LCK5W = LCK9W;
726#[doc = r" Proxy"]
727pub struct _LCK5W<'a> {
728 w: &'a mut W,
729}
730impl<'a> _LCK5W<'a> {
731 #[doc = r" Writes `variant` to the field"]
732 #[inline]
733 pub fn variant(self, variant: LCK5W) -> &'a mut W {
734 {
735 self.bit(variant._bits())
736 }
737 }
738 #[doc = "Port configuration not locked"]
739 #[inline]
740 pub fn unlocked(self) -> &'a mut W {
741 self.variant(LCK9W::UNLOCKED)
742 }
743 #[doc = "Port configuration locked"]
744 #[inline]
745 pub fn locked(self) -> &'a mut W {
746 self.variant(LCK9W::LOCKED)
747 }
748 #[doc = r" Sets the field bit"]
749 pub fn set_bit(self) -> &'a mut W {
750 self.bit(true)
751 }
752 #[doc = r" Clears the field bit"]
753 pub fn clear_bit(self) -> &'a mut W {
754 self.bit(false)
755 }
756 #[doc = r" Writes raw bits to the field"]
757 #[inline]
758 pub fn bit(self, value: bool) -> &'a mut W {
759 const MASK: bool = true;
760 const OFFSET: u8 = 5;
761 self.w.bits &= !((MASK as u32) << OFFSET);
762 self.w.bits |= ((value & MASK) as u32) << OFFSET;
763 self.w
764 }
765}
766#[doc = "Values that can be written to the field `LCK4`"]
767pub type LCK4W = LCK9W;
768#[doc = r" Proxy"]
769pub struct _LCK4W<'a> {
770 w: &'a mut W,
771}
772impl<'a> _LCK4W<'a> {
773 #[doc = r" Writes `variant` to the field"]
774 #[inline]
775 pub fn variant(self, variant: LCK4W) -> &'a mut W {
776 {
777 self.bit(variant._bits())
778 }
779 }
780 #[doc = "Port configuration not locked"]
781 #[inline]
782 pub fn unlocked(self) -> &'a mut W {
783 self.variant(LCK9W::UNLOCKED)
784 }
785 #[doc = "Port configuration locked"]
786 #[inline]
787 pub fn locked(self) -> &'a mut W {
788 self.variant(LCK9W::LOCKED)
789 }
790 #[doc = r" Sets the field bit"]
791 pub fn set_bit(self) -> &'a mut W {
792 self.bit(true)
793 }
794 #[doc = r" Clears the field bit"]
795 pub fn clear_bit(self) -> &'a mut W {
796 self.bit(false)
797 }
798 #[doc = r" Writes raw bits to the field"]
799 #[inline]
800 pub fn bit(self, value: bool) -> &'a mut W {
801 const MASK: bool = true;
802 const OFFSET: u8 = 4;
803 self.w.bits &= !((MASK as u32) << OFFSET);
804 self.w.bits |= ((value & MASK) as u32) << OFFSET;
805 self.w
806 }
807}
808#[doc = "Values that can be written to the field `LCK3`"]
809pub type LCK3W = LCK9W;
810#[doc = r" Proxy"]
811pub struct _LCK3W<'a> {
812 w: &'a mut W,
813}
814impl<'a> _LCK3W<'a> {
815 #[doc = r" Writes `variant` to the field"]
816 #[inline]
817 pub fn variant(self, variant: LCK3W) -> &'a mut W {
818 {
819 self.bit(variant._bits())
820 }
821 }
822 #[doc = "Port configuration not locked"]
823 #[inline]
824 pub fn unlocked(self) -> &'a mut W {
825 self.variant(LCK9W::UNLOCKED)
826 }
827 #[doc = "Port configuration locked"]
828 #[inline]
829 pub fn locked(self) -> &'a mut W {
830 self.variant(LCK9W::LOCKED)
831 }
832 #[doc = r" Sets the field bit"]
833 pub fn set_bit(self) -> &'a mut W {
834 self.bit(true)
835 }
836 #[doc = r" Clears the field bit"]
837 pub fn clear_bit(self) -> &'a mut W {
838 self.bit(false)
839 }
840 #[doc = r" Writes raw bits to the field"]
841 #[inline]
842 pub fn bit(self, value: bool) -> &'a mut W {
843 const MASK: bool = true;
844 const OFFSET: u8 = 3;
845 self.w.bits &= !((MASK as u32) << OFFSET);
846 self.w.bits |= ((value & MASK) as u32) << OFFSET;
847 self.w
848 }
849}
850#[doc = "Values that can be written to the field `LCK2`"]
851pub type LCK2W = LCK9W;
852#[doc = r" Proxy"]
853pub struct _LCK2W<'a> {
854 w: &'a mut W,
855}
856impl<'a> _LCK2W<'a> {
857 #[doc = r" Writes `variant` to the field"]
858 #[inline]
859 pub fn variant(self, variant: LCK2W) -> &'a mut W {
860 {
861 self.bit(variant._bits())
862 }
863 }
864 #[doc = "Port configuration not locked"]
865 #[inline]
866 pub fn unlocked(self) -> &'a mut W {
867 self.variant(LCK9W::UNLOCKED)
868 }
869 #[doc = "Port configuration locked"]
870 #[inline]
871 pub fn locked(self) -> &'a mut W {
872 self.variant(LCK9W::LOCKED)
873 }
874 #[doc = r" Sets the field bit"]
875 pub fn set_bit(self) -> &'a mut W {
876 self.bit(true)
877 }
878 #[doc = r" Clears the field bit"]
879 pub fn clear_bit(self) -> &'a mut W {
880 self.bit(false)
881 }
882 #[doc = r" Writes raw bits to the field"]
883 #[inline]
884 pub fn bit(self, value: bool) -> &'a mut W {
885 const MASK: bool = true;
886 const OFFSET: u8 = 2;
887 self.w.bits &= !((MASK as u32) << OFFSET);
888 self.w.bits |= ((value & MASK) as u32) << OFFSET;
889 self.w
890 }
891}
892#[doc = "Values that can be written to the field `LCK1`"]
893pub type LCK1W = LCK9W;
894#[doc = r" Proxy"]
895pub struct _LCK1W<'a> {
896 w: &'a mut W,
897}
898impl<'a> _LCK1W<'a> {
899 #[doc = r" Writes `variant` to the field"]
900 #[inline]
901 pub fn variant(self, variant: LCK1W) -> &'a mut W {
902 {
903 self.bit(variant._bits())
904 }
905 }
906 #[doc = "Port configuration not locked"]
907 #[inline]
908 pub fn unlocked(self) -> &'a mut W {
909 self.variant(LCK9W::UNLOCKED)
910 }
911 #[doc = "Port configuration locked"]
912 #[inline]
913 pub fn locked(self) -> &'a mut W {
914 self.variant(LCK9W::LOCKED)
915 }
916 #[doc = r" Sets the field bit"]
917 pub fn set_bit(self) -> &'a mut W {
918 self.bit(true)
919 }
920 #[doc = r" Clears the field bit"]
921 pub fn clear_bit(self) -> &'a mut W {
922 self.bit(false)
923 }
924 #[doc = r" Writes raw bits to the field"]
925 #[inline]
926 pub fn bit(self, value: bool) -> &'a mut W {
927 const MASK: bool = true;
928 const OFFSET: u8 = 1;
929 self.w.bits &= !((MASK as u32) << OFFSET);
930 self.w.bits |= ((value & MASK) as u32) << OFFSET;
931 self.w
932 }
933}
934#[doc = "Values that can be written to the field `LCK0`"]
935pub type LCK0W = LCK9W;
936#[doc = r" Proxy"]
937pub struct _LCK0W<'a> {
938 w: &'a mut W,
939}
940impl<'a> _LCK0W<'a> {
941 #[doc = r" Writes `variant` to the field"]
942 #[inline]
943 pub fn variant(self, variant: LCK0W) -> &'a mut W {
944 {
945 self.bit(variant._bits())
946 }
947 }
948 #[doc = "Port configuration not locked"]
949 #[inline]
950 pub fn unlocked(self) -> &'a mut W {
951 self.variant(LCK9W::UNLOCKED)
952 }
953 #[doc = "Port configuration locked"]
954 #[inline]
955 pub fn locked(self) -> &'a mut W {
956 self.variant(LCK9W::LOCKED)
957 }
958 #[doc = r" Sets the field bit"]
959 pub fn set_bit(self) -> &'a mut W {
960 self.bit(true)
961 }
962 #[doc = r" Clears the field bit"]
963 pub fn clear_bit(self) -> &'a mut W {
964 self.bit(false)
965 }
966 #[doc = r" Writes raw bits to the field"]
967 #[inline]
968 pub fn bit(self, value: bool) -> &'a mut W {
969 const MASK: bool = true;
970 const OFFSET: u8 = 0;
971 self.w.bits &= !((MASK as u32) << OFFSET);
972 self.w.bits |= ((value & MASK) as u32) << OFFSET;
973 self.w
974 }
975}
976impl R {
977 #[doc = r" Value of the register as raw bits"]
978 #[inline]
979 pub fn bits(&self) -> u32 {
980 self.bits
981 }
982 #[doc = "Bit 16 - Port x lock bit y (y= 0..15)"]
983 #[inline]
984 pub fn lckk(&self) -> LCKKR {
985 LCKKR::_from({
986 const MASK: bool = true;
987 const OFFSET: u8 = 16;
988 ((self.bits >> OFFSET) & MASK as u32) != 0
989 })
990 }
991 #[doc = "Bit 15 - Port x lock bit y (y= 0..15)"]
992 #[inline]
993 pub fn lck15(&self) -> LCK15R {
994 LCK15R::_from({
995 const MASK: bool = true;
996 const OFFSET: u8 = 15;
997 ((self.bits >> OFFSET) & MASK as u32) != 0
998 })
999 }
1000 #[doc = "Bit 14 - Port x lock bit y (y= 0..15)"]
1001 #[inline]
1002 pub fn lck14(&self) -> LCK14R {
1003 LCK14R::_from({
1004 const MASK: bool = true;
1005 const OFFSET: u8 = 14;
1006 ((self.bits >> OFFSET) & MASK as u32) != 0
1007 })
1008 }
1009 #[doc = "Bit 13 - Port x lock bit y (y= 0..15)"]
1010 #[inline]
1011 pub fn lck13(&self) -> LCK13R {
1012 LCK13R::_from({
1013 const MASK: bool = true;
1014 const OFFSET: u8 = 13;
1015 ((self.bits >> OFFSET) & MASK as u32) != 0
1016 })
1017 }
1018 #[doc = "Bit 12 - Port x lock bit y (y= 0..15)"]
1019 #[inline]
1020 pub fn lck12(&self) -> LCK12R {
1021 LCK12R::_from({
1022 const MASK: bool = true;
1023 const OFFSET: u8 = 12;
1024 ((self.bits >> OFFSET) & MASK as u32) != 0
1025 })
1026 }
1027 #[doc = "Bit 11 - Port x lock bit y (y= 0..15)"]
1028 #[inline]
1029 pub fn lck11(&self) -> LCK11R {
1030 LCK11R::_from({
1031 const MASK: bool = true;
1032 const OFFSET: u8 = 11;
1033 ((self.bits >> OFFSET) & MASK as u32) != 0
1034 })
1035 }
1036 #[doc = "Bit 10 - Port x lock bit y (y= 0..15)"]
1037 #[inline]
1038 pub fn lck10(&self) -> LCK10R {
1039 LCK10R::_from({
1040 const MASK: bool = true;
1041 const OFFSET: u8 = 10;
1042 ((self.bits >> OFFSET) & MASK as u32) != 0
1043 })
1044 }
1045 #[doc = "Bit 9 - Port x lock bit y (y= 0..15)"]
1046 #[inline]
1047 pub fn lck9(&self) -> LCK9R {
1048 LCK9R::_from({
1049 const MASK: bool = true;
1050 const OFFSET: u8 = 9;
1051 ((self.bits >> OFFSET) & MASK as u32) != 0
1052 })
1053 }
1054 #[doc = "Bit 8 - Port x lock bit y (y= 0..15)"]
1055 #[inline]
1056 pub fn lck8(&self) -> LCK8R {
1057 LCK8R::_from({
1058 const MASK: bool = true;
1059 const OFFSET: u8 = 8;
1060 ((self.bits >> OFFSET) & MASK as u32) != 0
1061 })
1062 }
1063 #[doc = "Bit 7 - Port x lock bit y (y= 0..15)"]
1064 #[inline]
1065 pub fn lck7(&self) -> LCK7R {
1066 LCK7R::_from({
1067 const MASK: bool = true;
1068 const OFFSET: u8 = 7;
1069 ((self.bits >> OFFSET) & MASK as u32) != 0
1070 })
1071 }
1072 #[doc = "Bit 6 - Port x lock bit y (y= 0..15)"]
1073 #[inline]
1074 pub fn lck6(&self) -> LCK6R {
1075 LCK6R::_from({
1076 const MASK: bool = true;
1077 const OFFSET: u8 = 6;
1078 ((self.bits >> OFFSET) & MASK as u32) != 0
1079 })
1080 }
1081 #[doc = "Bit 5 - Port x lock bit y (y= 0..15)"]
1082 #[inline]
1083 pub fn lck5(&self) -> LCK5R {
1084 LCK5R::_from({
1085 const MASK: bool = true;
1086 const OFFSET: u8 = 5;
1087 ((self.bits >> OFFSET) & MASK as u32) != 0
1088 })
1089 }
1090 #[doc = "Bit 4 - Port x lock bit y (y= 0..15)"]
1091 #[inline]
1092 pub fn lck4(&self) -> LCK4R {
1093 LCK4R::_from({
1094 const MASK: bool = true;
1095 const OFFSET: u8 = 4;
1096 ((self.bits >> OFFSET) & MASK as u32) != 0
1097 })
1098 }
1099 #[doc = "Bit 3 - Port x lock bit y (y= 0..15)"]
1100 #[inline]
1101 pub fn lck3(&self) -> LCK3R {
1102 LCK3R::_from({
1103 const MASK: bool = true;
1104 const OFFSET: u8 = 3;
1105 ((self.bits >> OFFSET) & MASK as u32) != 0
1106 })
1107 }
1108 #[doc = "Bit 2 - Port x lock bit y (y= 0..15)"]
1109 #[inline]
1110 pub fn lck2(&self) -> LCK2R {
1111 LCK2R::_from({
1112 const MASK: bool = true;
1113 const OFFSET: u8 = 2;
1114 ((self.bits >> OFFSET) & MASK as u32) != 0
1115 })
1116 }
1117 #[doc = "Bit 1 - Port x lock bit y (y= 0..15)"]
1118 #[inline]
1119 pub fn lck1(&self) -> LCK1R {
1120 LCK1R::_from({
1121 const MASK: bool = true;
1122 const OFFSET: u8 = 1;
1123 ((self.bits >> OFFSET) & MASK as u32) != 0
1124 })
1125 }
1126 #[doc = "Bit 0 - Port x lock bit y (y= 0..15)"]
1127 #[inline]
1128 pub fn lck0(&self) -> LCK0R {
1129 LCK0R::_from({
1130 const MASK: bool = true;
1131 const OFFSET: u8 = 0;
1132 ((self.bits >> OFFSET) & MASK as u32) != 0
1133 })
1134 }
1135}
1136impl W {
1137 #[doc = r" Reset value of the register"]
1138 #[inline]
1139 pub fn reset_value() -> W {
1140 W { bits: 0 }
1141 }
1142 #[doc = r" Writes raw bits to the register"]
1143 #[inline]
1144 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1145 self.bits = bits;
1146 self
1147 }
1148 #[doc = "Bit 16 - Port x lock bit y (y= 0..15)"]
1149 #[inline]
1150 pub fn lckk(&mut self) -> _LCKKW {
1151 _LCKKW { w: self }
1152 }
1153 #[doc = "Bit 15 - Port x lock bit y (y= 0..15)"]
1154 #[inline]
1155 pub fn lck15(&mut self) -> _LCK15W {
1156 _LCK15W { w: self }
1157 }
1158 #[doc = "Bit 14 - Port x lock bit y (y= 0..15)"]
1159 #[inline]
1160 pub fn lck14(&mut self) -> _LCK14W {
1161 _LCK14W { w: self }
1162 }
1163 #[doc = "Bit 13 - Port x lock bit y (y= 0..15)"]
1164 #[inline]
1165 pub fn lck13(&mut self) -> _LCK13W {
1166 _LCK13W { w: self }
1167 }
1168 #[doc = "Bit 12 - Port x lock bit y (y= 0..15)"]
1169 #[inline]
1170 pub fn lck12(&mut self) -> _LCK12W {
1171 _LCK12W { w: self }
1172 }
1173 #[doc = "Bit 11 - Port x lock bit y (y= 0..15)"]
1174 #[inline]
1175 pub fn lck11(&mut self) -> _LCK11W {
1176 _LCK11W { w: self }
1177 }
1178 #[doc = "Bit 10 - Port x lock bit y (y= 0..15)"]
1179 #[inline]
1180 pub fn lck10(&mut self) -> _LCK10W {
1181 _LCK10W { w: self }
1182 }
1183 #[doc = "Bit 9 - Port x lock bit y (y= 0..15)"]
1184 #[inline]
1185 pub fn lck9(&mut self) -> _LCK9W {
1186 _LCK9W { w: self }
1187 }
1188 #[doc = "Bit 8 - Port x lock bit y (y= 0..15)"]
1189 #[inline]
1190 pub fn lck8(&mut self) -> _LCK8W {
1191 _LCK8W { w: self }
1192 }
1193 #[doc = "Bit 7 - Port x lock bit y (y= 0..15)"]
1194 #[inline]
1195 pub fn lck7(&mut self) -> _LCK7W {
1196 _LCK7W { w: self }
1197 }
1198 #[doc = "Bit 6 - Port x lock bit y (y= 0..15)"]
1199 #[inline]
1200 pub fn lck6(&mut self) -> _LCK6W {
1201 _LCK6W { w: self }
1202 }
1203 #[doc = "Bit 5 - Port x lock bit y (y= 0..15)"]
1204 #[inline]
1205 pub fn lck5(&mut self) -> _LCK5W {
1206 _LCK5W { w: self }
1207 }
1208 #[doc = "Bit 4 - Port x lock bit y (y= 0..15)"]
1209 #[inline]
1210 pub fn lck4(&mut self) -> _LCK4W {
1211 _LCK4W { w: self }
1212 }
1213 #[doc = "Bit 3 - Port x lock bit y (y= 0..15)"]
1214 #[inline]
1215 pub fn lck3(&mut self) -> _LCK3W {
1216 _LCK3W { w: self }
1217 }
1218 #[doc = "Bit 2 - Port x lock bit y (y= 0..15)"]
1219 #[inline]
1220 pub fn lck2(&mut self) -> _LCK2W {
1221 _LCK2W { w: self }
1222 }
1223 #[doc = "Bit 1 - Port x lock bit y (y= 0..15)"]
1224 #[inline]
1225 pub fn lck1(&mut self) -> _LCK1W {
1226 _LCK1W { w: self }
1227 }
1228 #[doc = "Bit 0 - Port x lock bit y (y= 0..15)"]
1229 #[inline]
1230 pub fn lck0(&mut self) -> _LCK0W {
1231 _LCK0W { w: self }
1232 }
1233}