stm32l4x2_pac/fpu/
fpscr.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::FPSCR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct IOCR {
47 bits: bool,
48}
49impl IOCR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Value of the field"]
67pub struct DZCR {
68 bits: bool,
69}
70impl DZCR {
71 #[doc = r" Value of the field as raw bits"]
72 #[inline]
73 pub fn bit(&self) -> bool {
74 self.bits
75 }
76 #[doc = r" Returns `true` if the bit is clear (0)"]
77 #[inline]
78 pub fn bit_is_clear(&self) -> bool {
79 !self.bit()
80 }
81 #[doc = r" Returns `true` if the bit is set (1)"]
82 #[inline]
83 pub fn bit_is_set(&self) -> bool {
84 self.bit()
85 }
86}
87#[doc = r" Value of the field"]
88pub struct OFCR {
89 bits: bool,
90}
91impl OFCR {
92 #[doc = r" Value of the field as raw bits"]
93 #[inline]
94 pub fn bit(&self) -> bool {
95 self.bits
96 }
97 #[doc = r" Returns `true` if the bit is clear (0)"]
98 #[inline]
99 pub fn bit_is_clear(&self) -> bool {
100 !self.bit()
101 }
102 #[doc = r" Returns `true` if the bit is set (1)"]
103 #[inline]
104 pub fn bit_is_set(&self) -> bool {
105 self.bit()
106 }
107}
108#[doc = r" Value of the field"]
109pub struct UFCR {
110 bits: bool,
111}
112impl UFCR {
113 #[doc = r" Value of the field as raw bits"]
114 #[inline]
115 pub fn bit(&self) -> bool {
116 self.bits
117 }
118 #[doc = r" Returns `true` if the bit is clear (0)"]
119 #[inline]
120 pub fn bit_is_clear(&self) -> bool {
121 !self.bit()
122 }
123 #[doc = r" Returns `true` if the bit is set (1)"]
124 #[inline]
125 pub fn bit_is_set(&self) -> bool {
126 self.bit()
127 }
128}
129#[doc = r" Value of the field"]
130pub struct IXCR {
131 bits: bool,
132}
133impl IXCR {
134 #[doc = r" Value of the field as raw bits"]
135 #[inline]
136 pub fn bit(&self) -> bool {
137 self.bits
138 }
139 #[doc = r" Returns `true` if the bit is clear (0)"]
140 #[inline]
141 pub fn bit_is_clear(&self) -> bool {
142 !self.bit()
143 }
144 #[doc = r" Returns `true` if the bit is set (1)"]
145 #[inline]
146 pub fn bit_is_set(&self) -> bool {
147 self.bit()
148 }
149}
150#[doc = r" Value of the field"]
151pub struct IDCR {
152 bits: bool,
153}
154impl IDCR {
155 #[doc = r" Value of the field as raw bits"]
156 #[inline]
157 pub fn bit(&self) -> bool {
158 self.bits
159 }
160 #[doc = r" Returns `true` if the bit is clear (0)"]
161 #[inline]
162 pub fn bit_is_clear(&self) -> bool {
163 !self.bit()
164 }
165 #[doc = r" Returns `true` if the bit is set (1)"]
166 #[inline]
167 pub fn bit_is_set(&self) -> bool {
168 self.bit()
169 }
170}
171#[doc = r" Value of the field"]
172pub struct RMODER {
173 bits: u8,
174}
175impl RMODER {
176 #[doc = r" Value of the field as raw bits"]
177 #[inline]
178 pub fn bits(&self) -> u8 {
179 self.bits
180 }
181}
182#[doc = r" Value of the field"]
183pub struct FZR {
184 bits: bool,
185}
186impl FZR {
187 #[doc = r" Value of the field as raw bits"]
188 #[inline]
189 pub fn bit(&self) -> bool {
190 self.bits
191 }
192 #[doc = r" Returns `true` if the bit is clear (0)"]
193 #[inline]
194 pub fn bit_is_clear(&self) -> bool {
195 !self.bit()
196 }
197 #[doc = r" Returns `true` if the bit is set (1)"]
198 #[inline]
199 pub fn bit_is_set(&self) -> bool {
200 self.bit()
201 }
202}
203#[doc = r" Value of the field"]
204pub struct DNR {
205 bits: bool,
206}
207impl DNR {
208 #[doc = r" Value of the field as raw bits"]
209 #[inline]
210 pub fn bit(&self) -> bool {
211 self.bits
212 }
213 #[doc = r" Returns `true` if the bit is clear (0)"]
214 #[inline]
215 pub fn bit_is_clear(&self) -> bool {
216 !self.bit()
217 }
218 #[doc = r" Returns `true` if the bit is set (1)"]
219 #[inline]
220 pub fn bit_is_set(&self) -> bool {
221 self.bit()
222 }
223}
224#[doc = r" Value of the field"]
225pub struct AHPR {
226 bits: bool,
227}
228impl AHPR {
229 #[doc = r" Value of the field as raw bits"]
230 #[inline]
231 pub fn bit(&self) -> bool {
232 self.bits
233 }
234 #[doc = r" Returns `true` if the bit is clear (0)"]
235 #[inline]
236 pub fn bit_is_clear(&self) -> bool {
237 !self.bit()
238 }
239 #[doc = r" Returns `true` if the bit is set (1)"]
240 #[inline]
241 pub fn bit_is_set(&self) -> bool {
242 self.bit()
243 }
244}
245#[doc = r" Value of the field"]
246pub struct VR {
247 bits: bool,
248}
249impl VR {
250 #[doc = r" Value of the field as raw bits"]
251 #[inline]
252 pub fn bit(&self) -> bool {
253 self.bits
254 }
255 #[doc = r" Returns `true` if the bit is clear (0)"]
256 #[inline]
257 pub fn bit_is_clear(&self) -> bool {
258 !self.bit()
259 }
260 #[doc = r" Returns `true` if the bit is set (1)"]
261 #[inline]
262 pub fn bit_is_set(&self) -> bool {
263 self.bit()
264 }
265}
266#[doc = r" Value of the field"]
267pub struct CR {
268 bits: bool,
269}
270impl CR {
271 #[doc = r" Value of the field as raw bits"]
272 #[inline]
273 pub fn bit(&self) -> bool {
274 self.bits
275 }
276 #[doc = r" Returns `true` if the bit is clear (0)"]
277 #[inline]
278 pub fn bit_is_clear(&self) -> bool {
279 !self.bit()
280 }
281 #[doc = r" Returns `true` if the bit is set (1)"]
282 #[inline]
283 pub fn bit_is_set(&self) -> bool {
284 self.bit()
285 }
286}
287#[doc = r" Value of the field"]
288pub struct ZR {
289 bits: bool,
290}
291impl ZR {
292 #[doc = r" Value of the field as raw bits"]
293 #[inline]
294 pub fn bit(&self) -> bool {
295 self.bits
296 }
297 #[doc = r" Returns `true` if the bit is clear (0)"]
298 #[inline]
299 pub fn bit_is_clear(&self) -> bool {
300 !self.bit()
301 }
302 #[doc = r" Returns `true` if the bit is set (1)"]
303 #[inline]
304 pub fn bit_is_set(&self) -> bool {
305 self.bit()
306 }
307}
308#[doc = r" Value of the field"]
309pub struct NR {
310 bits: bool,
311}
312impl NR {
313 #[doc = r" Value of the field as raw bits"]
314 #[inline]
315 pub fn bit(&self) -> bool {
316 self.bits
317 }
318 #[doc = r" Returns `true` if the bit is clear (0)"]
319 #[inline]
320 pub fn bit_is_clear(&self) -> bool {
321 !self.bit()
322 }
323 #[doc = r" Returns `true` if the bit is set (1)"]
324 #[inline]
325 pub fn bit_is_set(&self) -> bool {
326 self.bit()
327 }
328}
329#[doc = r" Proxy"]
330pub struct _IOCW<'a> {
331 w: &'a mut W,
332}
333impl<'a> _IOCW<'a> {
334 #[doc = r" Sets the field bit"]
335 pub fn set_bit(self) -> &'a mut W {
336 self.bit(true)
337 }
338 #[doc = r" Clears the field bit"]
339 pub fn clear_bit(self) -> &'a mut W {
340 self.bit(false)
341 }
342 #[doc = r" Writes raw bits to the field"]
343 #[inline]
344 pub fn bit(self, value: bool) -> &'a mut W {
345 const MASK: bool = true;
346 const OFFSET: u8 = 0;
347 self.w.bits &= !((MASK as u32) << OFFSET);
348 self.w.bits |= ((value & MASK) as u32) << OFFSET;
349 self.w
350 }
351}
352#[doc = r" Proxy"]
353pub struct _DZCW<'a> {
354 w: &'a mut W,
355}
356impl<'a> _DZCW<'a> {
357 #[doc = r" Sets the field bit"]
358 pub fn set_bit(self) -> &'a mut W {
359 self.bit(true)
360 }
361 #[doc = r" Clears the field bit"]
362 pub fn clear_bit(self) -> &'a mut W {
363 self.bit(false)
364 }
365 #[doc = r" Writes raw bits to the field"]
366 #[inline]
367 pub fn bit(self, value: bool) -> &'a mut W {
368 const MASK: bool = true;
369 const OFFSET: u8 = 1;
370 self.w.bits &= !((MASK as u32) << OFFSET);
371 self.w.bits |= ((value & MASK) as u32) << OFFSET;
372 self.w
373 }
374}
375#[doc = r" Proxy"]
376pub struct _OFCW<'a> {
377 w: &'a mut W,
378}
379impl<'a> _OFCW<'a> {
380 #[doc = r" Sets the field bit"]
381 pub fn set_bit(self) -> &'a mut W {
382 self.bit(true)
383 }
384 #[doc = r" Clears the field bit"]
385 pub fn clear_bit(self) -> &'a mut W {
386 self.bit(false)
387 }
388 #[doc = r" Writes raw bits to the field"]
389 #[inline]
390 pub fn bit(self, value: bool) -> &'a mut W {
391 const MASK: bool = true;
392 const OFFSET: u8 = 2;
393 self.w.bits &= !((MASK as u32) << OFFSET);
394 self.w.bits |= ((value & MASK) as u32) << OFFSET;
395 self.w
396 }
397}
398#[doc = r" Proxy"]
399pub struct _UFCW<'a> {
400 w: &'a mut W,
401}
402impl<'a> _UFCW<'a> {
403 #[doc = r" Sets the field bit"]
404 pub fn set_bit(self) -> &'a mut W {
405 self.bit(true)
406 }
407 #[doc = r" Clears the field bit"]
408 pub fn clear_bit(self) -> &'a mut W {
409 self.bit(false)
410 }
411 #[doc = r" Writes raw bits to the field"]
412 #[inline]
413 pub fn bit(self, value: bool) -> &'a mut W {
414 const MASK: bool = true;
415 const OFFSET: u8 = 3;
416 self.w.bits &= !((MASK as u32) << OFFSET);
417 self.w.bits |= ((value & MASK) as u32) << OFFSET;
418 self.w
419 }
420}
421#[doc = r" Proxy"]
422pub struct _IXCW<'a> {
423 w: &'a mut W,
424}
425impl<'a> _IXCW<'a> {
426 #[doc = r" Sets the field bit"]
427 pub fn set_bit(self) -> &'a mut W {
428 self.bit(true)
429 }
430 #[doc = r" Clears the field bit"]
431 pub fn clear_bit(self) -> &'a mut W {
432 self.bit(false)
433 }
434 #[doc = r" Writes raw bits to the field"]
435 #[inline]
436 pub fn bit(self, value: bool) -> &'a mut W {
437 const MASK: bool = true;
438 const OFFSET: u8 = 4;
439 self.w.bits &= !((MASK as u32) << OFFSET);
440 self.w.bits |= ((value & MASK) as u32) << OFFSET;
441 self.w
442 }
443}
444#[doc = r" Proxy"]
445pub struct _IDCW<'a> {
446 w: &'a mut W,
447}
448impl<'a> _IDCW<'a> {
449 #[doc = r" Sets the field bit"]
450 pub fn set_bit(self) -> &'a mut W {
451 self.bit(true)
452 }
453 #[doc = r" Clears the field bit"]
454 pub fn clear_bit(self) -> &'a mut W {
455 self.bit(false)
456 }
457 #[doc = r" Writes raw bits to the field"]
458 #[inline]
459 pub fn bit(self, value: bool) -> &'a mut W {
460 const MASK: bool = true;
461 const OFFSET: u8 = 7;
462 self.w.bits &= !((MASK as u32) << OFFSET);
463 self.w.bits |= ((value & MASK) as u32) << OFFSET;
464 self.w
465 }
466}
467#[doc = r" Proxy"]
468pub struct _RMODEW<'a> {
469 w: &'a mut W,
470}
471impl<'a> _RMODEW<'a> {
472 #[doc = r" Writes raw bits to the field"]
473 #[inline]
474 pub unsafe fn bits(self, value: u8) -> &'a mut W {
475 const MASK: u8 = 3;
476 const OFFSET: u8 = 22;
477 self.w.bits &= !((MASK as u32) << OFFSET);
478 self.w.bits |= ((value & MASK) as u32) << OFFSET;
479 self.w
480 }
481}
482#[doc = r" Proxy"]
483pub struct _FZW<'a> {
484 w: &'a mut W,
485}
486impl<'a> _FZW<'a> {
487 #[doc = r" Sets the field bit"]
488 pub fn set_bit(self) -> &'a mut W {
489 self.bit(true)
490 }
491 #[doc = r" Clears the field bit"]
492 pub fn clear_bit(self) -> &'a mut W {
493 self.bit(false)
494 }
495 #[doc = r" Writes raw bits to the field"]
496 #[inline]
497 pub fn bit(self, value: bool) -> &'a mut W {
498 const MASK: bool = true;
499 const OFFSET: u8 = 24;
500 self.w.bits &= !((MASK as u32) << OFFSET);
501 self.w.bits |= ((value & MASK) as u32) << OFFSET;
502 self.w
503 }
504}
505#[doc = r" Proxy"]
506pub struct _DNW<'a> {
507 w: &'a mut W,
508}
509impl<'a> _DNW<'a> {
510 #[doc = r" Sets the field bit"]
511 pub fn set_bit(self) -> &'a mut W {
512 self.bit(true)
513 }
514 #[doc = r" Clears the field bit"]
515 pub fn clear_bit(self) -> &'a mut W {
516 self.bit(false)
517 }
518 #[doc = r" Writes raw bits to the field"]
519 #[inline]
520 pub fn bit(self, value: bool) -> &'a mut W {
521 const MASK: bool = true;
522 const OFFSET: u8 = 25;
523 self.w.bits &= !((MASK as u32) << OFFSET);
524 self.w.bits |= ((value & MASK) as u32) << OFFSET;
525 self.w
526 }
527}
528#[doc = r" Proxy"]
529pub struct _AHPW<'a> {
530 w: &'a mut W,
531}
532impl<'a> _AHPW<'a> {
533 #[doc = r" Sets the field bit"]
534 pub fn set_bit(self) -> &'a mut W {
535 self.bit(true)
536 }
537 #[doc = r" Clears the field bit"]
538 pub fn clear_bit(self) -> &'a mut W {
539 self.bit(false)
540 }
541 #[doc = r" Writes raw bits to the field"]
542 #[inline]
543 pub fn bit(self, value: bool) -> &'a mut W {
544 const MASK: bool = true;
545 const OFFSET: u8 = 26;
546 self.w.bits &= !((MASK as u32) << OFFSET);
547 self.w.bits |= ((value & MASK) as u32) << OFFSET;
548 self.w
549 }
550}
551#[doc = r" Proxy"]
552pub struct _VW<'a> {
553 w: &'a mut W,
554}
555impl<'a> _VW<'a> {
556 #[doc = r" Sets the field bit"]
557 pub fn set_bit(self) -> &'a mut W {
558 self.bit(true)
559 }
560 #[doc = r" Clears the field bit"]
561 pub fn clear_bit(self) -> &'a mut W {
562 self.bit(false)
563 }
564 #[doc = r" Writes raw bits to the field"]
565 #[inline]
566 pub fn bit(self, value: bool) -> &'a mut W {
567 const MASK: bool = true;
568 const OFFSET: u8 = 28;
569 self.w.bits &= !((MASK as u32) << OFFSET);
570 self.w.bits |= ((value & MASK) as u32) << OFFSET;
571 self.w
572 }
573}
574#[doc = r" Proxy"]
575pub struct _CW<'a> {
576 w: &'a mut W,
577}
578impl<'a> _CW<'a> {
579 #[doc = r" Sets the field bit"]
580 pub fn set_bit(self) -> &'a mut W {
581 self.bit(true)
582 }
583 #[doc = r" Clears the field bit"]
584 pub fn clear_bit(self) -> &'a mut W {
585 self.bit(false)
586 }
587 #[doc = r" Writes raw bits to the field"]
588 #[inline]
589 pub fn bit(self, value: bool) -> &'a mut W {
590 const MASK: bool = true;
591 const OFFSET: u8 = 29;
592 self.w.bits &= !((MASK as u32) << OFFSET);
593 self.w.bits |= ((value & MASK) as u32) << OFFSET;
594 self.w
595 }
596}
597#[doc = r" Proxy"]
598pub struct _ZW<'a> {
599 w: &'a mut W,
600}
601impl<'a> _ZW<'a> {
602 #[doc = r" Sets the field bit"]
603 pub fn set_bit(self) -> &'a mut W {
604 self.bit(true)
605 }
606 #[doc = r" Clears the field bit"]
607 pub fn clear_bit(self) -> &'a mut W {
608 self.bit(false)
609 }
610 #[doc = r" Writes raw bits to the field"]
611 #[inline]
612 pub fn bit(self, value: bool) -> &'a mut W {
613 const MASK: bool = true;
614 const OFFSET: u8 = 30;
615 self.w.bits &= !((MASK as u32) << OFFSET);
616 self.w.bits |= ((value & MASK) as u32) << OFFSET;
617 self.w
618 }
619}
620#[doc = r" Proxy"]
621pub struct _NW<'a> {
622 w: &'a mut W,
623}
624impl<'a> _NW<'a> {
625 #[doc = r" Sets the field bit"]
626 pub fn set_bit(self) -> &'a mut W {
627 self.bit(true)
628 }
629 #[doc = r" Clears the field bit"]
630 pub fn clear_bit(self) -> &'a mut W {
631 self.bit(false)
632 }
633 #[doc = r" Writes raw bits to the field"]
634 #[inline]
635 pub fn bit(self, value: bool) -> &'a mut W {
636 const MASK: bool = true;
637 const OFFSET: u8 = 31;
638 self.w.bits &= !((MASK as u32) << OFFSET);
639 self.w.bits |= ((value & MASK) as u32) << OFFSET;
640 self.w
641 }
642}
643impl R {
644 #[doc = r" Value of the register as raw bits"]
645 #[inline]
646 pub fn bits(&self) -> u32 {
647 self.bits
648 }
649 #[doc = "Bit 0 - Invalid operation cumulative exception bit"]
650 #[inline]
651 pub fn ioc(&self) -> IOCR {
652 let bits = {
653 const MASK: bool = true;
654 const OFFSET: u8 = 0;
655 ((self.bits >> OFFSET) & MASK as u32) != 0
656 };
657 IOCR { bits }
658 }
659 #[doc = "Bit 1 - Division by zero cumulative exception bit."]
660 #[inline]
661 pub fn dzc(&self) -> DZCR {
662 let bits = {
663 const MASK: bool = true;
664 const OFFSET: u8 = 1;
665 ((self.bits >> OFFSET) & MASK as u32) != 0
666 };
667 DZCR { bits }
668 }
669 #[doc = "Bit 2 - Overflow cumulative exception bit"]
670 #[inline]
671 pub fn ofc(&self) -> OFCR {
672 let bits = {
673 const MASK: bool = true;
674 const OFFSET: u8 = 2;
675 ((self.bits >> OFFSET) & MASK as u32) != 0
676 };
677 OFCR { bits }
678 }
679 #[doc = "Bit 3 - Underflow cumulative exception bit"]
680 #[inline]
681 pub fn ufc(&self) -> UFCR {
682 let bits = {
683 const MASK: bool = true;
684 const OFFSET: u8 = 3;
685 ((self.bits >> OFFSET) & MASK as u32) != 0
686 };
687 UFCR { bits }
688 }
689 #[doc = "Bit 4 - Inexact cumulative exception bit"]
690 #[inline]
691 pub fn ixc(&self) -> IXCR {
692 let bits = {
693 const MASK: bool = true;
694 const OFFSET: u8 = 4;
695 ((self.bits >> OFFSET) & MASK as u32) != 0
696 };
697 IXCR { bits }
698 }
699 #[doc = "Bit 7 - Input denormal cumulative exception bit."]
700 #[inline]
701 pub fn idc(&self) -> IDCR {
702 let bits = {
703 const MASK: bool = true;
704 const OFFSET: u8 = 7;
705 ((self.bits >> OFFSET) & MASK as u32) != 0
706 };
707 IDCR { bits }
708 }
709 #[doc = "Bits 22:23 - Rounding Mode control field"]
710 #[inline]
711 pub fn rmode(&self) -> RMODER {
712 let bits = {
713 const MASK: u8 = 3;
714 const OFFSET: u8 = 22;
715 ((self.bits >> OFFSET) & MASK as u32) as u8
716 };
717 RMODER { bits }
718 }
719 #[doc = "Bit 24 - Flush-to-zero mode control bit:"]
720 #[inline]
721 pub fn fz(&self) -> FZR {
722 let bits = {
723 const MASK: bool = true;
724 const OFFSET: u8 = 24;
725 ((self.bits >> OFFSET) & MASK as u32) != 0
726 };
727 FZR { bits }
728 }
729 #[doc = "Bit 25 - Default NaN mode control bit"]
730 #[inline]
731 pub fn dn(&self) -> DNR {
732 let bits = {
733 const MASK: bool = true;
734 const OFFSET: u8 = 25;
735 ((self.bits >> OFFSET) & MASK as u32) != 0
736 };
737 DNR { bits }
738 }
739 #[doc = "Bit 26 - Alternative half-precision control bit"]
740 #[inline]
741 pub fn ahp(&self) -> AHPR {
742 let bits = {
743 const MASK: bool = true;
744 const OFFSET: u8 = 26;
745 ((self.bits >> OFFSET) & MASK as u32) != 0
746 };
747 AHPR { bits }
748 }
749 #[doc = "Bit 28 - Overflow condition code flag"]
750 #[inline]
751 pub fn v(&self) -> VR {
752 let bits = {
753 const MASK: bool = true;
754 const OFFSET: u8 = 28;
755 ((self.bits >> OFFSET) & MASK as u32) != 0
756 };
757 VR { bits }
758 }
759 #[doc = "Bit 29 - Carry condition code flag"]
760 #[inline]
761 pub fn c(&self) -> CR {
762 let bits = {
763 const MASK: bool = true;
764 const OFFSET: u8 = 29;
765 ((self.bits >> OFFSET) & MASK as u32) != 0
766 };
767 CR { bits }
768 }
769 #[doc = "Bit 30 - Zero condition code flag"]
770 #[inline]
771 pub fn z(&self) -> ZR {
772 let bits = {
773 const MASK: bool = true;
774 const OFFSET: u8 = 30;
775 ((self.bits >> OFFSET) & MASK as u32) != 0
776 };
777 ZR { bits }
778 }
779 #[doc = "Bit 31 - Negative condition code flag"]
780 #[inline]
781 pub fn n(&self) -> NR {
782 let bits = {
783 const MASK: bool = true;
784 const OFFSET: u8 = 31;
785 ((self.bits >> OFFSET) & MASK as u32) != 0
786 };
787 NR { bits }
788 }
789}
790impl W {
791 #[doc = r" Reset value of the register"]
792 #[inline]
793 pub fn reset_value() -> W {
794 W { bits: 0 }
795 }
796 #[doc = r" Writes raw bits to the register"]
797 #[inline]
798 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
799 self.bits = bits;
800 self
801 }
802 #[doc = "Bit 0 - Invalid operation cumulative exception bit"]
803 #[inline]
804 pub fn ioc(&mut self) -> _IOCW {
805 _IOCW { w: self }
806 }
807 #[doc = "Bit 1 - Division by zero cumulative exception bit."]
808 #[inline]
809 pub fn dzc(&mut self) -> _DZCW {
810 _DZCW { w: self }
811 }
812 #[doc = "Bit 2 - Overflow cumulative exception bit"]
813 #[inline]
814 pub fn ofc(&mut self) -> _OFCW {
815 _OFCW { w: self }
816 }
817 #[doc = "Bit 3 - Underflow cumulative exception bit"]
818 #[inline]
819 pub fn ufc(&mut self) -> _UFCW {
820 _UFCW { w: self }
821 }
822 #[doc = "Bit 4 - Inexact cumulative exception bit"]
823 #[inline]
824 pub fn ixc(&mut self) -> _IXCW {
825 _IXCW { w: self }
826 }
827 #[doc = "Bit 7 - Input denormal cumulative exception bit."]
828 #[inline]
829 pub fn idc(&mut self) -> _IDCW {
830 _IDCW { w: self }
831 }
832 #[doc = "Bits 22:23 - Rounding Mode control field"]
833 #[inline]
834 pub fn rmode(&mut self) -> _RMODEW {
835 _RMODEW { w: self }
836 }
837 #[doc = "Bit 24 - Flush-to-zero mode control bit:"]
838 #[inline]
839 pub fn fz(&mut self) -> _FZW {
840 _FZW { w: self }
841 }
842 #[doc = "Bit 25 - Default NaN mode control bit"]
843 #[inline]
844 pub fn dn(&mut self) -> _DNW {
845 _DNW { w: self }
846 }
847 #[doc = "Bit 26 - Alternative half-precision control bit"]
848 #[inline]
849 pub fn ahp(&mut self) -> _AHPW {
850 _AHPW { w: self }
851 }
852 #[doc = "Bit 28 - Overflow condition code flag"]
853 #[inline]
854 pub fn v(&mut self) -> _VW {
855 _VW { w: self }
856 }
857 #[doc = "Bit 29 - Carry condition code flag"]
858 #[inline]
859 pub fn c(&mut self) -> _CW {
860 _CW { w: self }
861 }
862 #[doc = "Bit 30 - Zero condition code flag"]
863 #[inline]
864 pub fn z(&mut self) -> _ZW {
865 _ZW { w: self }
866 }
867 #[doc = "Bit 31 - Negative condition code flag"]
868 #[inline]
869 pub fn n(&mut self) -> _NW {
870 _NW { w: self }
871 }
872}