stm32l4x2_pac/rcc/
ccipr.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CCIPR {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct SWPMI1SELR {
47    bits: bool,
48}
49impl SWPMI1SELR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct ADCSELR {
68    bits: u8,
69}
70impl ADCSELR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bits(&self) -> u8 {
74        self.bits
75    }
76}
77#[doc = r" Value of the field"]
78pub struct CLK48SELR {
79    bits: u8,
80}
81impl CLK48SELR {
82    #[doc = r" Value of the field as raw bits"]
83    #[inline]
84    pub fn bits(&self) -> u8 {
85        self.bits
86    }
87}
88#[doc = r" Value of the field"]
89pub struct SAI1SELR {
90    bits: u8,
91}
92impl SAI1SELR {
93    #[doc = r" Value of the field as raw bits"]
94    #[inline]
95    pub fn bits(&self) -> u8 {
96        self.bits
97    }
98}
99#[doc = r" Value of the field"]
100pub struct LPTIM2SELR {
101    bits: u8,
102}
103impl LPTIM2SELR {
104    #[doc = r" Value of the field as raw bits"]
105    #[inline]
106    pub fn bits(&self) -> u8 {
107        self.bits
108    }
109}
110#[doc = r" Value of the field"]
111pub struct LPTIM1SELR {
112    bits: u8,
113}
114impl LPTIM1SELR {
115    #[doc = r" Value of the field as raw bits"]
116    #[inline]
117    pub fn bits(&self) -> u8 {
118        self.bits
119    }
120}
121#[doc = r" Value of the field"]
122pub struct I2C3SELR {
123    bits: u8,
124}
125impl I2C3SELR {
126    #[doc = r" Value of the field as raw bits"]
127    #[inline]
128    pub fn bits(&self) -> u8 {
129        self.bits
130    }
131}
132#[doc = r" Value of the field"]
133pub struct I2C1SELR {
134    bits: u8,
135}
136impl I2C1SELR {
137    #[doc = r" Value of the field as raw bits"]
138    #[inline]
139    pub fn bits(&self) -> u8 {
140        self.bits
141    }
142}
143#[doc = r" Value of the field"]
144pub struct LPUART1SELR {
145    bits: u8,
146}
147impl LPUART1SELR {
148    #[doc = r" Value of the field as raw bits"]
149    #[inline]
150    pub fn bits(&self) -> u8 {
151        self.bits
152    }
153}
154#[doc = r" Value of the field"]
155pub struct USART2SELR {
156    bits: u8,
157}
158impl USART2SELR {
159    #[doc = r" Value of the field as raw bits"]
160    #[inline]
161    pub fn bits(&self) -> u8 {
162        self.bits
163    }
164}
165#[doc = r" Value of the field"]
166pub struct USART1SELR {
167    bits: u8,
168}
169impl USART1SELR {
170    #[doc = r" Value of the field as raw bits"]
171    #[inline]
172    pub fn bits(&self) -> u8 {
173        self.bits
174    }
175}
176#[doc = r" Value of the field"]
177pub struct USART4SELR {
178    bits: u8,
179}
180impl USART4SELR {
181    #[doc = r" Value of the field as raw bits"]
182    #[inline]
183    pub fn bits(&self) -> u8 {
184        self.bits
185    }
186}
187#[doc = r" Value of the field"]
188pub struct USART3SELR {
189    bits: u8,
190}
191impl USART3SELR {
192    #[doc = r" Value of the field as raw bits"]
193    #[inline]
194    pub fn bits(&self) -> u8 {
195        self.bits
196    }
197}
198#[doc = r" Value of the field"]
199pub struct I2C2SELR {
200    bits: u8,
201}
202impl I2C2SELR {
203    #[doc = r" Value of the field as raw bits"]
204    #[inline]
205    pub fn bits(&self) -> u8 {
206        self.bits
207    }
208}
209#[doc = r" Proxy"]
210pub struct _SWPMI1SELW<'a> {
211    w: &'a mut W,
212}
213impl<'a> _SWPMI1SELW<'a> {
214    #[doc = r" Sets the field bit"]
215    pub fn set_bit(self) -> &'a mut W {
216        self.bit(true)
217    }
218    #[doc = r" Clears the field bit"]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r" Writes raw bits to the field"]
223    #[inline]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        const MASK: bool = true;
226        const OFFSET: u8 = 30;
227        self.w.bits &= !((MASK as u32) << OFFSET);
228        self.w.bits |= ((value & MASK) as u32) << OFFSET;
229        self.w
230    }
231}
232#[doc = r" Proxy"]
233pub struct _ADCSELW<'a> {
234    w: &'a mut W,
235}
236impl<'a> _ADCSELW<'a> {
237    #[doc = r" Writes raw bits to the field"]
238    #[inline]
239    pub unsafe fn bits(self, value: u8) -> &'a mut W {
240        const MASK: u8 = 3;
241        const OFFSET: u8 = 28;
242        self.w.bits &= !((MASK as u32) << OFFSET);
243        self.w.bits |= ((value & MASK) as u32) << OFFSET;
244        self.w
245    }
246}
247#[doc = r" Proxy"]
248pub struct _CLK48SELW<'a> {
249    w: &'a mut W,
250}
251impl<'a> _CLK48SELW<'a> {
252    #[doc = r" Writes raw bits to the field"]
253    #[inline]
254    pub unsafe fn bits(self, value: u8) -> &'a mut W {
255        const MASK: u8 = 3;
256        const OFFSET: u8 = 26;
257        self.w.bits &= !((MASK as u32) << OFFSET);
258        self.w.bits |= ((value & MASK) as u32) << OFFSET;
259        self.w
260    }
261}
262#[doc = r" Proxy"]
263pub struct _SAI1SELW<'a> {
264    w: &'a mut W,
265}
266impl<'a> _SAI1SELW<'a> {
267    #[doc = r" Writes raw bits to the field"]
268    #[inline]
269    pub unsafe fn bits(self, value: u8) -> &'a mut W {
270        const MASK: u8 = 3;
271        const OFFSET: u8 = 22;
272        self.w.bits &= !((MASK as u32) << OFFSET);
273        self.w.bits |= ((value & MASK) as u32) << OFFSET;
274        self.w
275    }
276}
277#[doc = r" Proxy"]
278pub struct _LPTIM2SELW<'a> {
279    w: &'a mut W,
280}
281impl<'a> _LPTIM2SELW<'a> {
282    #[doc = r" Writes raw bits to the field"]
283    #[inline]
284    pub unsafe fn bits(self, value: u8) -> &'a mut W {
285        const MASK: u8 = 3;
286        const OFFSET: u8 = 20;
287        self.w.bits &= !((MASK as u32) << OFFSET);
288        self.w.bits |= ((value & MASK) as u32) << OFFSET;
289        self.w
290    }
291}
292#[doc = r" Proxy"]
293pub struct _LPTIM1SELW<'a> {
294    w: &'a mut W,
295}
296impl<'a> _LPTIM1SELW<'a> {
297    #[doc = r" Writes raw bits to the field"]
298    #[inline]
299    pub unsafe fn bits(self, value: u8) -> &'a mut W {
300        const MASK: u8 = 3;
301        const OFFSET: u8 = 18;
302        self.w.bits &= !((MASK as u32) << OFFSET);
303        self.w.bits |= ((value & MASK) as u32) << OFFSET;
304        self.w
305    }
306}
307#[doc = r" Proxy"]
308pub struct _I2C3SELW<'a> {
309    w: &'a mut W,
310}
311impl<'a> _I2C3SELW<'a> {
312    #[doc = r" Writes raw bits to the field"]
313    #[inline]
314    pub unsafe fn bits(self, value: u8) -> &'a mut W {
315        const MASK: u8 = 3;
316        const OFFSET: u8 = 16;
317        self.w.bits &= !((MASK as u32) << OFFSET);
318        self.w.bits |= ((value & MASK) as u32) << OFFSET;
319        self.w
320    }
321}
322#[doc = r" Proxy"]
323pub struct _I2C1SELW<'a> {
324    w: &'a mut W,
325}
326impl<'a> _I2C1SELW<'a> {
327    #[doc = r" Writes raw bits to the field"]
328    #[inline]
329    pub unsafe fn bits(self, value: u8) -> &'a mut W {
330        const MASK: u8 = 3;
331        const OFFSET: u8 = 12;
332        self.w.bits &= !((MASK as u32) << OFFSET);
333        self.w.bits |= ((value & MASK) as u32) << OFFSET;
334        self.w
335    }
336}
337#[doc = r" Proxy"]
338pub struct _LPUART1SELW<'a> {
339    w: &'a mut W,
340}
341impl<'a> _LPUART1SELW<'a> {
342    #[doc = r" Writes raw bits to the field"]
343    #[inline]
344    pub unsafe fn bits(self, value: u8) -> &'a mut W {
345        const MASK: u8 = 3;
346        const OFFSET: u8 = 10;
347        self.w.bits &= !((MASK as u32) << OFFSET);
348        self.w.bits |= ((value & MASK) as u32) << OFFSET;
349        self.w
350    }
351}
352#[doc = r" Proxy"]
353pub struct _USART2SELW<'a> {
354    w: &'a mut W,
355}
356impl<'a> _USART2SELW<'a> {
357    #[doc = r" Writes raw bits to the field"]
358    #[inline]
359    pub unsafe fn bits(self, value: u8) -> &'a mut W {
360        const MASK: u8 = 3;
361        const OFFSET: u8 = 2;
362        self.w.bits &= !((MASK as u32) << OFFSET);
363        self.w.bits |= ((value & MASK) as u32) << OFFSET;
364        self.w
365    }
366}
367#[doc = r" Proxy"]
368pub struct _USART1SELW<'a> {
369    w: &'a mut W,
370}
371impl<'a> _USART1SELW<'a> {
372    #[doc = r" Writes raw bits to the field"]
373    #[inline]
374    pub unsafe fn bits(self, value: u8) -> &'a mut W {
375        const MASK: u8 = 3;
376        const OFFSET: u8 = 0;
377        self.w.bits &= !((MASK as u32) << OFFSET);
378        self.w.bits |= ((value & MASK) as u32) << OFFSET;
379        self.w
380    }
381}
382#[doc = r" Proxy"]
383pub struct _USART4SELW<'a> {
384    w: &'a mut W,
385}
386impl<'a> _USART4SELW<'a> {
387    #[doc = r" Writes raw bits to the field"]
388    #[inline]
389    pub unsafe fn bits(self, value: u8) -> &'a mut W {
390        const MASK: u8 = 3;
391        const OFFSET: u8 = 6;
392        self.w.bits &= !((MASK as u32) << OFFSET);
393        self.w.bits |= ((value & MASK) as u32) << OFFSET;
394        self.w
395    }
396}
397#[doc = r" Proxy"]
398pub struct _USART3SELW<'a> {
399    w: &'a mut W,
400}
401impl<'a> _USART3SELW<'a> {
402    #[doc = r" Writes raw bits to the field"]
403    #[inline]
404    pub unsafe fn bits(self, value: u8) -> &'a mut W {
405        const MASK: u8 = 3;
406        const OFFSET: u8 = 4;
407        self.w.bits &= !((MASK as u32) << OFFSET);
408        self.w.bits |= ((value & MASK) as u32) << OFFSET;
409        self.w
410    }
411}
412#[doc = r" Proxy"]
413pub struct _I2C2SELW<'a> {
414    w: &'a mut W,
415}
416impl<'a> _I2C2SELW<'a> {
417    #[doc = r" Writes raw bits to the field"]
418    #[inline]
419    pub unsafe fn bits(self, value: u8) -> &'a mut W {
420        const MASK: u8 = 3;
421        const OFFSET: u8 = 14;
422        self.w.bits &= !((MASK as u32) << OFFSET);
423        self.w.bits |= ((value & MASK) as u32) << OFFSET;
424        self.w
425    }
426}
427impl R {
428    #[doc = r" Value of the register as raw bits"]
429    #[inline]
430    pub fn bits(&self) -> u32 {
431        self.bits
432    }
433    #[doc = "Bit 30 - SWPMI1 clock source selection"]
434    #[inline]
435    pub fn swpmi1sel(&self) -> SWPMI1SELR {
436        let bits = {
437            const MASK: bool = true;
438            const OFFSET: u8 = 30;
439            ((self.bits >> OFFSET) & MASK as u32) != 0
440        };
441        SWPMI1SELR { bits }
442    }
443    #[doc = "Bits 28:29 - ADCs clock source selection"]
444    #[inline]
445    pub fn adcsel(&self) -> ADCSELR {
446        let bits = {
447            const MASK: u8 = 3;
448            const OFFSET: u8 = 28;
449            ((self.bits >> OFFSET) & MASK as u32) as u8
450        };
451        ADCSELR { bits }
452    }
453    #[doc = "Bits 26:27 - 48 MHz clock source selection"]
454    #[inline]
455    pub fn clk48sel(&self) -> CLK48SELR {
456        let bits = {
457            const MASK: u8 = 3;
458            const OFFSET: u8 = 26;
459            ((self.bits >> OFFSET) & MASK as u32) as u8
460        };
461        CLK48SELR { bits }
462    }
463    #[doc = "Bits 22:23 - SAI1 clock source selection"]
464    #[inline]
465    pub fn sai1sel(&self) -> SAI1SELR {
466        let bits = {
467            const MASK: u8 = 3;
468            const OFFSET: u8 = 22;
469            ((self.bits >> OFFSET) & MASK as u32) as u8
470        };
471        SAI1SELR { bits }
472    }
473    #[doc = "Bits 20:21 - Low power timer 2 clock source selection"]
474    #[inline]
475    pub fn lptim2sel(&self) -> LPTIM2SELR {
476        let bits = {
477            const MASK: u8 = 3;
478            const OFFSET: u8 = 20;
479            ((self.bits >> OFFSET) & MASK as u32) as u8
480        };
481        LPTIM2SELR { bits }
482    }
483    #[doc = "Bits 18:19 - Low power timer 1 clock source selection"]
484    #[inline]
485    pub fn lptim1sel(&self) -> LPTIM1SELR {
486        let bits = {
487            const MASK: u8 = 3;
488            const OFFSET: u8 = 18;
489            ((self.bits >> OFFSET) & MASK as u32) as u8
490        };
491        LPTIM1SELR { bits }
492    }
493    #[doc = "Bits 16:17 - I2C3 clock source selection"]
494    #[inline]
495    pub fn i2c3sel(&self) -> I2C3SELR {
496        let bits = {
497            const MASK: u8 = 3;
498            const OFFSET: u8 = 16;
499            ((self.bits >> OFFSET) & MASK as u32) as u8
500        };
501        I2C3SELR { bits }
502    }
503    #[doc = "Bits 12:13 - I2C1 clock source selection"]
504    #[inline]
505    pub fn i2c1sel(&self) -> I2C1SELR {
506        let bits = {
507            const MASK: u8 = 3;
508            const OFFSET: u8 = 12;
509            ((self.bits >> OFFSET) & MASK as u32) as u8
510        };
511        I2C1SELR { bits }
512    }
513    #[doc = "Bits 10:11 - LPUART1 clock source selection"]
514    #[inline]
515    pub fn lpuart1sel(&self) -> LPUART1SELR {
516        let bits = {
517            const MASK: u8 = 3;
518            const OFFSET: u8 = 10;
519            ((self.bits >> OFFSET) & MASK as u32) as u8
520        };
521        LPUART1SELR { bits }
522    }
523    #[doc = "Bits 2:3 - USART2 clock source selection"]
524    #[inline]
525    pub fn usart2sel(&self) -> USART2SELR {
526        let bits = {
527            const MASK: u8 = 3;
528            const OFFSET: u8 = 2;
529            ((self.bits >> OFFSET) & MASK as u32) as u8
530        };
531        USART2SELR { bits }
532    }
533    #[doc = "Bits 0:1 - USART1 clock source selection"]
534    #[inline]
535    pub fn usart1sel(&self) -> USART1SELR {
536        let bits = {
537            const MASK: u8 = 3;
538            const OFFSET: u8 = 0;
539            ((self.bits >> OFFSET) & MASK as u32) as u8
540        };
541        USART1SELR { bits }
542    }
543    #[doc = "Bits 6:7 - USART4 clock source selection"]
544    #[inline]
545    pub fn usart4sel(&self) -> USART4SELR {
546        let bits = {
547            const MASK: u8 = 3;
548            const OFFSET: u8 = 6;
549            ((self.bits >> OFFSET) & MASK as u32) as u8
550        };
551        USART4SELR { bits }
552    }
553    #[doc = "Bits 4:5 - USART3 clock source selection"]
554    #[inline]
555    pub fn usart3sel(&self) -> USART3SELR {
556        let bits = {
557            const MASK: u8 = 3;
558            const OFFSET: u8 = 4;
559            ((self.bits >> OFFSET) & MASK as u32) as u8
560        };
561        USART3SELR { bits }
562    }
563    #[doc = "Bits 14:15 - I2C2 clock source selection"]
564    #[inline]
565    pub fn i2c2sel(&self) -> I2C2SELR {
566        let bits = {
567            const MASK: u8 = 3;
568            const OFFSET: u8 = 14;
569            ((self.bits >> OFFSET) & MASK as u32) as u8
570        };
571        I2C2SELR { bits }
572    }
573}
574impl W {
575    #[doc = r" Reset value of the register"]
576    #[inline]
577    pub fn reset_value() -> W {
578        W { bits: 0 }
579    }
580    #[doc = r" Writes raw bits to the register"]
581    #[inline]
582    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
583        self.bits = bits;
584        self
585    }
586    #[doc = "Bit 30 - SWPMI1 clock source selection"]
587    #[inline]
588    pub fn swpmi1sel(&mut self) -> _SWPMI1SELW {
589        _SWPMI1SELW { w: self }
590    }
591    #[doc = "Bits 28:29 - ADCs clock source selection"]
592    #[inline]
593    pub fn adcsel(&mut self) -> _ADCSELW {
594        _ADCSELW { w: self }
595    }
596    #[doc = "Bits 26:27 - 48 MHz clock source selection"]
597    #[inline]
598    pub fn clk48sel(&mut self) -> _CLK48SELW {
599        _CLK48SELW { w: self }
600    }
601    #[doc = "Bits 22:23 - SAI1 clock source selection"]
602    #[inline]
603    pub fn sai1sel(&mut self) -> _SAI1SELW {
604        _SAI1SELW { w: self }
605    }
606    #[doc = "Bits 20:21 - Low power timer 2 clock source selection"]
607    #[inline]
608    pub fn lptim2sel(&mut self) -> _LPTIM2SELW {
609        _LPTIM2SELW { w: self }
610    }
611    #[doc = "Bits 18:19 - Low power timer 1 clock source selection"]
612    #[inline]
613    pub fn lptim1sel(&mut self) -> _LPTIM1SELW {
614        _LPTIM1SELW { w: self }
615    }
616    #[doc = "Bits 16:17 - I2C3 clock source selection"]
617    #[inline]
618    pub fn i2c3sel(&mut self) -> _I2C3SELW {
619        _I2C3SELW { w: self }
620    }
621    #[doc = "Bits 12:13 - I2C1 clock source selection"]
622    #[inline]
623    pub fn i2c1sel(&mut self) -> _I2C1SELW {
624        _I2C1SELW { w: self }
625    }
626    #[doc = "Bits 10:11 - LPUART1 clock source selection"]
627    #[inline]
628    pub fn lpuart1sel(&mut self) -> _LPUART1SELW {
629        _LPUART1SELW { w: self }
630    }
631    #[doc = "Bits 2:3 - USART2 clock source selection"]
632    #[inline]
633    pub fn usart2sel(&mut self) -> _USART2SELW {
634        _USART2SELW { w: self }
635    }
636    #[doc = "Bits 0:1 - USART1 clock source selection"]
637    #[inline]
638    pub fn usart1sel(&mut self) -> _USART1SELW {
639        _USART1SELW { w: self }
640    }
641    #[doc = "Bits 6:7 - USART4 clock source selection"]
642    #[inline]
643    pub fn usart4sel(&mut self) -> _USART4SELW {
644        _USART4SELW { w: self }
645    }
646    #[doc = "Bits 4:5 - USART3 clock source selection"]
647    #[inline]
648    pub fn usart3sel(&mut self) -> _USART3SELW {
649        _USART3SELW { w: self }
650    }
651    #[doc = "Bits 14:15 - I2C2 clock source selection"]
652    #[inline]
653    pub fn i2c2sel(&mut self) -> _I2C2SELW {
654        _I2C2SELW { w: self }
655    }
656}
stm32l4x2_pac/rcc/ccipr.rs

stm32l4x2_pac/rcc/
ccipr.rs
