stm32l4x2_pac/i2c1/
oar1.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::OAR1 {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct OA1R {
47    bits: u16,
48}
49impl OA1R {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bits(&self) -> u16 {
53        self.bits
54    }
55}
56#[doc = "Possible values of the field `OA1MODE`"]
57#[derive(Clone, Copy, Debug, PartialEq)]
58pub enum OA1MODER {
59    #[doc = "Own address 1 is a 7-bit address"]
60    BIT7,
61    #[doc = "Own address 1 is a 10-bit address"]
62    BIT10,
63}
64impl OA1MODER {
65    #[doc = r" Returns `true` if the bit is clear (0)"]
66    #[inline]
67    pub fn bit_is_clear(&self) -> bool {
68        !self.bit()
69    }
70    #[doc = r" Returns `true` if the bit is set (1)"]
71    #[inline]
72    pub fn bit_is_set(&self) -> bool {
73        self.bit()
74    }
75    #[doc = r" Value of the field as raw bits"]
76    #[inline]
77    pub fn bit(&self) -> bool {
78        match *self {
79            OA1MODER::BIT7 => false,
80            OA1MODER::BIT10 => true,
81        }
82    }
83    #[allow(missing_docs)]
84    #[doc(hidden)]
85    #[inline]
86    pub fn _from(value: bool) -> OA1MODER {
87        match value {
88            false => OA1MODER::BIT7,
89            true => OA1MODER::BIT10,
90        }
91    }
92    #[doc = "Checks if the value of the field is `BIT7`"]
93    #[inline]
94    pub fn is_bit7(&self) -> bool {
95        *self == OA1MODER::BIT7
96    }
97    #[doc = "Checks if the value of the field is `BIT10`"]
98    #[inline]
99    pub fn is_bit10(&self) -> bool {
100        *self == OA1MODER::BIT10
101    }
102}
103#[doc = "Possible values of the field `OA1EN`"]
104#[derive(Clone, Copy, Debug, PartialEq)]
105pub enum OA1ENR {
106    #[doc = "Own address 1 disabled. The received slave address OA1 is NACKed"]
107    DIASBLED,
108    #[doc = "Own address 1 enabled. The received slave address OA1 is ACKed"]
109    ENABLED,
110}
111impl OA1ENR {
112    #[doc = r" Returns `true` if the bit is clear (0)"]
113    #[inline]
114    pub fn bit_is_clear(&self) -> bool {
115        !self.bit()
116    }
117    #[doc = r" Returns `true` if the bit is set (1)"]
118    #[inline]
119    pub fn bit_is_set(&self) -> bool {
120        self.bit()
121    }
122    #[doc = r" Value of the field as raw bits"]
123    #[inline]
124    pub fn bit(&self) -> bool {
125        match *self {
126            OA1ENR::DIASBLED => false,
127            OA1ENR::ENABLED => true,
128        }
129    }
130    #[allow(missing_docs)]
131    #[doc(hidden)]
132    #[inline]
133    pub fn _from(value: bool) -> OA1ENR {
134        match value {
135            false => OA1ENR::DIASBLED,
136            true => OA1ENR::ENABLED,
137        }
138    }
139    #[doc = "Checks if the value of the field is `DIASBLED`"]
140    #[inline]
141    pub fn is_diasbled(&self) -> bool {
142        *self == OA1ENR::DIASBLED
143    }
144    #[doc = "Checks if the value of the field is `ENABLED`"]
145    #[inline]
146    pub fn is_enabled(&self) -> bool {
147        *self == OA1ENR::ENABLED
148    }
149}
150#[doc = r" Proxy"]
151pub struct _OA1W<'a> {
152    w: &'a mut W,
153}
154impl<'a> _OA1W<'a> {
155    #[doc = r" Writes raw bits to the field"]
156    #[inline]
157    pub fn bits(self, value: u16) -> &'a mut W {
158        const MASK: u16 = 1023;
159        const OFFSET: u8 = 0;
160        self.w.bits &= !((MASK as u32) << OFFSET);
161        self.w.bits |= ((value & MASK) as u32) << OFFSET;
162        self.w
163    }
164}
165#[doc = "Values that can be written to the field `OA1MODE`"]
166pub enum OA1MODEW {
167    #[doc = "Own address 1 is a 7-bit address"]
168    BIT7,
169    #[doc = "Own address 1 is a 10-bit address"]
170    BIT10,
171}
172impl OA1MODEW {
173    #[allow(missing_docs)]
174    #[doc(hidden)]
175    #[inline]
176    pub fn _bits(&self) -> bool {
177        match *self {
178            OA1MODEW::BIT7 => false,
179            OA1MODEW::BIT10 => true,
180        }
181    }
182}
183#[doc = r" Proxy"]
184pub struct _OA1MODEW<'a> {
185    w: &'a mut W,
186}
187impl<'a> _OA1MODEW<'a> {
188    #[doc = r" Writes `variant` to the field"]
189    #[inline]
190    pub fn variant(self, variant: OA1MODEW) -> &'a mut W {
191        {
192            self.bit(variant._bits())
193        }
194    }
195    #[doc = "Own address 1 is a 7-bit address"]
196    #[inline]
197    pub fn bit7(self) -> &'a mut W {
198        self.variant(OA1MODEW::BIT7)
199    }
200    #[doc = "Own address 1 is a 10-bit address"]
201    #[inline]
202    pub fn bit10(self) -> &'a mut W {
203        self.variant(OA1MODEW::BIT10)
204    }
205    #[doc = r" Sets the field bit"]
206    pub fn set_bit(self) -> &'a mut W {
207        self.bit(true)
208    }
209    #[doc = r" Clears the field bit"]
210    pub fn clear_bit(self) -> &'a mut W {
211        self.bit(false)
212    }
213    #[doc = r" Writes raw bits to the field"]
214    #[inline]
215    pub fn bit(self, value: bool) -> &'a mut W {
216        const MASK: bool = true;
217        const OFFSET: u8 = 10;
218        self.w.bits &= !((MASK as u32) << OFFSET);
219        self.w.bits |= ((value & MASK) as u32) << OFFSET;
220        self.w
221    }
222}
223#[doc = "Values that can be written to the field `OA1EN`"]
224pub enum OA1ENW {
225    #[doc = "Own address 1 disabled. The received slave address OA1 is NACKed"]
226    DIASBLED,
227    #[doc = "Own address 1 enabled. The received slave address OA1 is ACKed"]
228    ENABLED,
229}
230impl OA1ENW {
231    #[allow(missing_docs)]
232    #[doc(hidden)]
233    #[inline]
234    pub fn _bits(&self) -> bool {
235        match *self {
236            OA1ENW::DIASBLED => false,
237            OA1ENW::ENABLED => true,
238        }
239    }
240}
241#[doc = r" Proxy"]
242pub struct _OA1ENW<'a> {
243    w: &'a mut W,
244}
245impl<'a> _OA1ENW<'a> {
246    #[doc = r" Writes `variant` to the field"]
247    #[inline]
248    pub fn variant(self, variant: OA1ENW) -> &'a mut W {
249        {
250            self.bit(variant._bits())
251        }
252    }
253    #[doc = "Own address 1 disabled. The received slave address OA1 is NACKed"]
254    #[inline]
255    pub fn diasbled(self) -> &'a mut W {
256        self.variant(OA1ENW::DIASBLED)
257    }
258    #[doc = "Own address 1 enabled. The received slave address OA1 is ACKed"]
259    #[inline]
260    pub fn enabled(self) -> &'a mut W {
261        self.variant(OA1ENW::ENABLED)
262    }
263    #[doc = r" Sets the field bit"]
264    pub fn set_bit(self) -> &'a mut W {
265        self.bit(true)
266    }
267    #[doc = r" Clears the field bit"]
268    pub fn clear_bit(self) -> &'a mut W {
269        self.bit(false)
270    }
271    #[doc = r" Writes raw bits to the field"]
272    #[inline]
273    pub fn bit(self, value: bool) -> &'a mut W {
274        const MASK: bool = true;
275        const OFFSET: u8 = 15;
276        self.w.bits &= !((MASK as u32) << OFFSET);
277        self.w.bits |= ((value & MASK) as u32) << OFFSET;
278        self.w
279    }
280}
281impl R {
282    #[doc = r" Value of the register as raw bits"]
283    #[inline]
284    pub fn bits(&self) -> u32 {
285        self.bits
286    }
287    #[doc = "Bits 0:9 - Interface address"]
288    #[inline]
289    pub fn oa1(&self) -> OA1R {
290        let bits = {
291            const MASK: u16 = 1023;
292            const OFFSET: u8 = 0;
293            ((self.bits >> OFFSET) & MASK as u32) as u16
294        };
295        OA1R { bits }
296    }
297    #[doc = "Bit 10 - Own Address 1 10-bit mode"]
298    #[inline]
299    pub fn oa1mode(&self) -> OA1MODER {
300        OA1MODER::_from({
301            const MASK: bool = true;
302            const OFFSET: u8 = 10;
303            ((self.bits >> OFFSET) & MASK as u32) != 0
304        })
305    }
306    #[doc = "Bit 15 - Own Address 1 enable"]
307    #[inline]
308    pub fn oa1en(&self) -> OA1ENR {
309        OA1ENR::_from({
310            const MASK: bool = true;
311            const OFFSET: u8 = 15;
312            ((self.bits >> OFFSET) & MASK as u32) != 0
313        })
314    }
315}
316impl W {
317    #[doc = r" Reset value of the register"]
318    #[inline]
319    pub fn reset_value() -> W {
320        W { bits: 0 }
321    }
322    #[doc = r" Writes raw bits to the register"]
323    #[inline]
324    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
325        self.bits = bits;
326        self
327    }
328    #[doc = "Bits 0:9 - Interface address"]
329    #[inline]
330    pub fn oa1(&mut self) -> _OA1W {
331        _OA1W { w: self }
332    }
333    #[doc = "Bit 10 - Own Address 1 10-bit mode"]
334    #[inline]
335    pub fn oa1mode(&mut self) -> _OA1MODEW {
336        _OA1MODEW { w: self }
337    }
338    #[doc = "Bit 15 - Own Address 1 enable"]
339    #[inline]
340    pub fn oa1en(&mut self) -> _OA1ENW {
341        _OA1ENW { w: self }
342    }
343}
stm32l4x2_pac/i2c1/oar1.rs

stm32l4x2_pac/i2c1/
oar1.rs
