stm32l4x2_pac/dfsdm/flt/
exmin.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5impl super::EXMIN {
6    #[doc = r" Reads the contents of the register"]
7    #[inline]
8    pub fn read(&self) -> R {
9        R {
10            bits: self.register.get(),
11        }
12    }
13}
14#[doc = r" Value of the field"]
15pub struct EXMINR {
16    bits: u32,
17}
18impl EXMINR {
19    #[doc = r" Value of the field as raw bits"]
20    #[inline]
21    pub fn bits(&self) -> u32 {
22        self.bits
23    }
24}
25#[doc = r" Value of the field"]
26pub struct EXMINCHR {
27    bits: u8,
28}
29impl EXMINCHR {
30    #[doc = r" Value of the field as raw bits"]
31    #[inline]
32    pub fn bits(&self) -> u8 {
33        self.bits
34    }
35}
36impl R {
37    #[doc = r" Value of the register as raw bits"]
38    #[inline]
39    pub fn bits(&self) -> u32 {
40        self.bits
41    }
42    #[doc = "Bits 8:31 - EXMIN"]
43    #[inline]
44    pub fn exmin(&self) -> EXMINR {
45        let bits = {
46            const MASK: u32 = 16777215;
47            const OFFSET: u8 = 8;
48            ((self.bits >> OFFSET) & MASK as u32) as u32
49        };
50        EXMINR { bits }
51    }
52    #[doc = "Bits 0:2 - Extremes detector minimum data channel"]
53    #[inline]
54    pub fn exminch(&self) -> EXMINCHR {
55        let bits = {
56            const MASK: u8 = 7;
57            const OFFSET: u8 = 0;
58            ((self.bits >> OFFSET) & MASK as u32) as u8
59        };
60        EXMINCHR { bits }
61    }
62}
stm32l4x2_pac/dfsdm/flt/exmin.rs

stm32l4x2_pac/dfsdm/flt/
exmin.rs
