stm32l4x2_pac/dfsdm/flt/
cr2.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CR2 {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct AWFSELR {
47    bits: bool,
48}
49impl AWFSELR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct FASTR {
68    bits: bool,
69}
70impl FASTR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = r" Value of the field"]
88pub struct RCHR {
89    bits: u8,
90}
91impl RCHR {
92    #[doc = r" Value of the field as raw bits"]
93    #[inline]
94    pub fn bits(&self) -> u8 {
95        self.bits
96    }
97}
98#[doc = r" Value of the field"]
99pub struct RDMAENR {
100    bits: bool,
101}
102impl RDMAENR {
103    #[doc = r" Value of the field as raw bits"]
104    #[inline]
105    pub fn bit(&self) -> bool {
106        self.bits
107    }
108    #[doc = r" Returns `true` if the bit is clear (0)"]
109    #[inline]
110    pub fn bit_is_clear(&self) -> bool {
111        !self.bit()
112    }
113    #[doc = r" Returns `true` if the bit is set (1)"]
114    #[inline]
115    pub fn bit_is_set(&self) -> bool {
116        self.bit()
117    }
118}
119#[doc = r" Value of the field"]
120pub struct RSYNCR {
121    bits: bool,
122}
123impl RSYNCR {
124    #[doc = r" Value of the field as raw bits"]
125    #[inline]
126    pub fn bit(&self) -> bool {
127        self.bits
128    }
129    #[doc = r" Returns `true` if the bit is clear (0)"]
130    #[inline]
131    pub fn bit_is_clear(&self) -> bool {
132        !self.bit()
133    }
134    #[doc = r" Returns `true` if the bit is set (1)"]
135    #[inline]
136    pub fn bit_is_set(&self) -> bool {
137        self.bit()
138    }
139}
140#[doc = r" Value of the field"]
141pub struct RCONTR {
142    bits: bool,
143}
144impl RCONTR {
145    #[doc = r" Value of the field as raw bits"]
146    #[inline]
147    pub fn bit(&self) -> bool {
148        self.bits
149    }
150    #[doc = r" Returns `true` if the bit is clear (0)"]
151    #[inline]
152    pub fn bit_is_clear(&self) -> bool {
153        !self.bit()
154    }
155    #[doc = r" Returns `true` if the bit is set (1)"]
156    #[inline]
157    pub fn bit_is_set(&self) -> bool {
158        self.bit()
159    }
160}
161#[doc = r" Value of the field"]
162pub struct RSWSTARTR {
163    bits: bool,
164}
165impl RSWSTARTR {
166    #[doc = r" Value of the field as raw bits"]
167    #[inline]
168    pub fn bit(&self) -> bool {
169        self.bits
170    }
171    #[doc = r" Returns `true` if the bit is clear (0)"]
172    #[inline]
173    pub fn bit_is_clear(&self) -> bool {
174        !self.bit()
175    }
176    #[doc = r" Returns `true` if the bit is set (1)"]
177    #[inline]
178    pub fn bit_is_set(&self) -> bool {
179        self.bit()
180    }
181}
182#[doc = r" Value of the field"]
183pub struct JEXTENR {
184    bits: u8,
185}
186impl JEXTENR {
187    #[doc = r" Value of the field as raw bits"]
188    #[inline]
189    pub fn bits(&self) -> u8 {
190        self.bits
191    }
192}
193#[doc = r" Value of the field"]
194pub struct JEXTSELR {
195    bits: u8,
196}
197impl JEXTSELR {
198    #[doc = r" Value of the field as raw bits"]
199    #[inline]
200    pub fn bits(&self) -> u8 {
201        self.bits
202    }
203}
204#[doc = r" Value of the field"]
205pub struct JDMAENR {
206    bits: bool,
207}
208impl JDMAENR {
209    #[doc = r" Value of the field as raw bits"]
210    #[inline]
211    pub fn bit(&self) -> bool {
212        self.bits
213    }
214    #[doc = r" Returns `true` if the bit is clear (0)"]
215    #[inline]
216    pub fn bit_is_clear(&self) -> bool {
217        !self.bit()
218    }
219    #[doc = r" Returns `true` if the bit is set (1)"]
220    #[inline]
221    pub fn bit_is_set(&self) -> bool {
222        self.bit()
223    }
224}
225#[doc = r" Value of the field"]
226pub struct JSCANR {
227    bits: bool,
228}
229impl JSCANR {
230    #[doc = r" Value of the field as raw bits"]
231    #[inline]
232    pub fn bit(&self) -> bool {
233        self.bits
234    }
235    #[doc = r" Returns `true` if the bit is clear (0)"]
236    #[inline]
237    pub fn bit_is_clear(&self) -> bool {
238        !self.bit()
239    }
240    #[doc = r" Returns `true` if the bit is set (1)"]
241    #[inline]
242    pub fn bit_is_set(&self) -> bool {
243        self.bit()
244    }
245}
246#[doc = r" Value of the field"]
247pub struct JSYNCR {
248    bits: bool,
249}
250impl JSYNCR {
251    #[doc = r" Value of the field as raw bits"]
252    #[inline]
253    pub fn bit(&self) -> bool {
254        self.bits
255    }
256    #[doc = r" Returns `true` if the bit is clear (0)"]
257    #[inline]
258    pub fn bit_is_clear(&self) -> bool {
259        !self.bit()
260    }
261    #[doc = r" Returns `true` if the bit is set (1)"]
262    #[inline]
263    pub fn bit_is_set(&self) -> bool {
264        self.bit()
265    }
266}
267#[doc = r" Value of the field"]
268pub struct JSWSTARTR {
269    bits: bool,
270}
271impl JSWSTARTR {
272    #[doc = r" Value of the field as raw bits"]
273    #[inline]
274    pub fn bit(&self) -> bool {
275        self.bits
276    }
277    #[doc = r" Returns `true` if the bit is clear (0)"]
278    #[inline]
279    pub fn bit_is_clear(&self) -> bool {
280        !self.bit()
281    }
282    #[doc = r" Returns `true` if the bit is set (1)"]
283    #[inline]
284    pub fn bit_is_set(&self) -> bool {
285        self.bit()
286    }
287}
288#[doc = r" Value of the field"]
289pub struct DFENR {
290    bits: bool,
291}
292impl DFENR {
293    #[doc = r" Value of the field as raw bits"]
294    #[inline]
295    pub fn bit(&self) -> bool {
296        self.bits
297    }
298    #[doc = r" Returns `true` if the bit is clear (0)"]
299    #[inline]
300    pub fn bit_is_clear(&self) -> bool {
301        !self.bit()
302    }
303    #[doc = r" Returns `true` if the bit is set (1)"]
304    #[inline]
305    pub fn bit_is_set(&self) -> bool {
306        self.bit()
307    }
308}
309#[doc = r" Proxy"]
310pub struct _AWFSELW<'a> {
311    w: &'a mut W,
312}
313impl<'a> _AWFSELW<'a> {
314    #[doc = r" Sets the field bit"]
315    pub fn set_bit(self) -> &'a mut W {
316        self.bit(true)
317    }
318    #[doc = r" Clears the field bit"]
319    pub fn clear_bit(self) -> &'a mut W {
320        self.bit(false)
321    }
322    #[doc = r" Writes raw bits to the field"]
323    #[inline]
324    pub fn bit(self, value: bool) -> &'a mut W {
325        const MASK: bool = true;
326        const OFFSET: u8 = 30;
327        self.w.bits &= !((MASK as u32) << OFFSET);
328        self.w.bits |= ((value & MASK) as u32) << OFFSET;
329        self.w
330    }
331}
332#[doc = r" Proxy"]
333pub struct _FASTW<'a> {
334    w: &'a mut W,
335}
336impl<'a> _FASTW<'a> {
337    #[doc = r" Sets the field bit"]
338    pub fn set_bit(self) -> &'a mut W {
339        self.bit(true)
340    }
341    #[doc = r" Clears the field bit"]
342    pub fn clear_bit(self) -> &'a mut W {
343        self.bit(false)
344    }
345    #[doc = r" Writes raw bits to the field"]
346    #[inline]
347    pub fn bit(self, value: bool) -> &'a mut W {
348        const MASK: bool = true;
349        const OFFSET: u8 = 29;
350        self.w.bits &= !((MASK as u32) << OFFSET);
351        self.w.bits |= ((value & MASK) as u32) << OFFSET;
352        self.w
353    }
354}
355#[doc = r" Proxy"]
356pub struct _RCHW<'a> {
357    w: &'a mut W,
358}
359impl<'a> _RCHW<'a> {
360    #[doc = r" Writes raw bits to the field"]
361    #[inline]
362    pub unsafe fn bits(self, value: u8) -> &'a mut W {
363        const MASK: u8 = 7;
364        const OFFSET: u8 = 24;
365        self.w.bits &= !((MASK as u32) << OFFSET);
366        self.w.bits |= ((value & MASK) as u32) << OFFSET;
367        self.w
368    }
369}
370#[doc = r" Proxy"]
371pub struct _RDMAENW<'a> {
372    w: &'a mut W,
373}
374impl<'a> _RDMAENW<'a> {
375    #[doc = r" Sets the field bit"]
376    pub fn set_bit(self) -> &'a mut W {
377        self.bit(true)
378    }
379    #[doc = r" Clears the field bit"]
380    pub fn clear_bit(self) -> &'a mut W {
381        self.bit(false)
382    }
383    #[doc = r" Writes raw bits to the field"]
384    #[inline]
385    pub fn bit(self, value: bool) -> &'a mut W {
386        const MASK: bool = true;
387        const OFFSET: u8 = 21;
388        self.w.bits &= !((MASK as u32) << OFFSET);
389        self.w.bits |= ((value & MASK) as u32) << OFFSET;
390        self.w
391    }
392}
393#[doc = r" Proxy"]
394pub struct _RSYNCW<'a> {
395    w: &'a mut W,
396}
397impl<'a> _RSYNCW<'a> {
398    #[doc = r" Sets the field bit"]
399    pub fn set_bit(self) -> &'a mut W {
400        self.bit(true)
401    }
402    #[doc = r" Clears the field bit"]
403    pub fn clear_bit(self) -> &'a mut W {
404        self.bit(false)
405    }
406    #[doc = r" Writes raw bits to the field"]
407    #[inline]
408    pub fn bit(self, value: bool) -> &'a mut W {
409        const MASK: bool = true;
410        const OFFSET: u8 = 19;
411        self.w.bits &= !((MASK as u32) << OFFSET);
412        self.w.bits |= ((value & MASK) as u32) << OFFSET;
413        self.w
414    }
415}
416#[doc = r" Proxy"]
417pub struct _RCONTW<'a> {
418    w: &'a mut W,
419}
420impl<'a> _RCONTW<'a> {
421    #[doc = r" Sets the field bit"]
422    pub fn set_bit(self) -> &'a mut W {
423        self.bit(true)
424    }
425    #[doc = r" Clears the field bit"]
426    pub fn clear_bit(self) -> &'a mut W {
427        self.bit(false)
428    }
429    #[doc = r" Writes raw bits to the field"]
430    #[inline]
431    pub fn bit(self, value: bool) -> &'a mut W {
432        const MASK: bool = true;
433        const OFFSET: u8 = 18;
434        self.w.bits &= !((MASK as u32) << OFFSET);
435        self.w.bits |= ((value & MASK) as u32) << OFFSET;
436        self.w
437    }
438}
439#[doc = r" Proxy"]
440pub struct _RSWSTARTW<'a> {
441    w: &'a mut W,
442}
443impl<'a> _RSWSTARTW<'a> {
444    #[doc = r" Sets the field bit"]
445    pub fn set_bit(self) -> &'a mut W {
446        self.bit(true)
447    }
448    #[doc = r" Clears the field bit"]
449    pub fn clear_bit(self) -> &'a mut W {
450        self.bit(false)
451    }
452    #[doc = r" Writes raw bits to the field"]
453    #[inline]
454    pub fn bit(self, value: bool) -> &'a mut W {
455        const MASK: bool = true;
456        const OFFSET: u8 = 17;
457        self.w.bits &= !((MASK as u32) << OFFSET);
458        self.w.bits |= ((value & MASK) as u32) << OFFSET;
459        self.w
460    }
461}
462#[doc = r" Proxy"]
463pub struct _JEXTENW<'a> {
464    w: &'a mut W,
465}
466impl<'a> _JEXTENW<'a> {
467    #[doc = r" Writes raw bits to the field"]
468    #[inline]
469    pub unsafe fn bits(self, value: u8) -> &'a mut W {
470        const MASK: u8 = 3;
471        const OFFSET: u8 = 13;
472        self.w.bits &= !((MASK as u32) << OFFSET);
473        self.w.bits |= ((value & MASK) as u32) << OFFSET;
474        self.w
475    }
476}
477#[doc = r" Proxy"]
478pub struct _JEXTSELW<'a> {
479    w: &'a mut W,
480}
481impl<'a> _JEXTSELW<'a> {
482    #[doc = r" Writes raw bits to the field"]
483    #[inline]
484    pub unsafe fn bits(self, value: u8) -> &'a mut W {
485        const MASK: u8 = 7;
486        const OFFSET: u8 = 8;
487        self.w.bits &= !((MASK as u32) << OFFSET);
488        self.w.bits |= ((value & MASK) as u32) << OFFSET;
489        self.w
490    }
491}
492#[doc = r" Proxy"]
493pub struct _JDMAENW<'a> {
494    w: &'a mut W,
495}
496impl<'a> _JDMAENW<'a> {
497    #[doc = r" Sets the field bit"]
498    pub fn set_bit(self) -> &'a mut W {
499        self.bit(true)
500    }
501    #[doc = r" Clears the field bit"]
502    pub fn clear_bit(self) -> &'a mut W {
503        self.bit(false)
504    }
505    #[doc = r" Writes raw bits to the field"]
506    #[inline]
507    pub fn bit(self, value: bool) -> &'a mut W {
508        const MASK: bool = true;
509        const OFFSET: u8 = 5;
510        self.w.bits &= !((MASK as u32) << OFFSET);
511        self.w.bits |= ((value & MASK) as u32) << OFFSET;
512        self.w
513    }
514}
515#[doc = r" Proxy"]
516pub struct _JSCANW<'a> {
517    w: &'a mut W,
518}
519impl<'a> _JSCANW<'a> {
520    #[doc = r" Sets the field bit"]
521    pub fn set_bit(self) -> &'a mut W {
522        self.bit(true)
523    }
524    #[doc = r" Clears the field bit"]
525    pub fn clear_bit(self) -> &'a mut W {
526        self.bit(false)
527    }
528    #[doc = r" Writes raw bits to the field"]
529    #[inline]
530    pub fn bit(self, value: bool) -> &'a mut W {
531        const MASK: bool = true;
532        const OFFSET: u8 = 4;
533        self.w.bits &= !((MASK as u32) << OFFSET);
534        self.w.bits |= ((value & MASK) as u32) << OFFSET;
535        self.w
536    }
537}
538#[doc = r" Proxy"]
539pub struct _JSYNCW<'a> {
540    w: &'a mut W,
541}
542impl<'a> _JSYNCW<'a> {
543    #[doc = r" Sets the field bit"]
544    pub fn set_bit(self) -> &'a mut W {
545        self.bit(true)
546    }
547    #[doc = r" Clears the field bit"]
548    pub fn clear_bit(self) -> &'a mut W {
549        self.bit(false)
550    }
551    #[doc = r" Writes raw bits to the field"]
552    #[inline]
553    pub fn bit(self, value: bool) -> &'a mut W {
554        const MASK: bool = true;
555        const OFFSET: u8 = 3;
556        self.w.bits &= !((MASK as u32) << OFFSET);
557        self.w.bits |= ((value & MASK) as u32) << OFFSET;
558        self.w
559    }
560}
561#[doc = r" Proxy"]
562pub struct _JSWSTARTW<'a> {
563    w: &'a mut W,
564}
565impl<'a> _JSWSTARTW<'a> {
566    #[doc = r" Sets the field bit"]
567    pub fn set_bit(self) -> &'a mut W {
568        self.bit(true)
569    }
570    #[doc = r" Clears the field bit"]
571    pub fn clear_bit(self) -> &'a mut W {
572        self.bit(false)
573    }
574    #[doc = r" Writes raw bits to the field"]
575    #[inline]
576    pub fn bit(self, value: bool) -> &'a mut W {
577        const MASK: bool = true;
578        const OFFSET: u8 = 1;
579        self.w.bits &= !((MASK as u32) << OFFSET);
580        self.w.bits |= ((value & MASK) as u32) << OFFSET;
581        self.w
582    }
583}
584#[doc = r" Proxy"]
585pub struct _DFENW<'a> {
586    w: &'a mut W,
587}
588impl<'a> _DFENW<'a> {
589    #[doc = r" Sets the field bit"]
590    pub fn set_bit(self) -> &'a mut W {
591        self.bit(true)
592    }
593    #[doc = r" Clears the field bit"]
594    pub fn clear_bit(self) -> &'a mut W {
595        self.bit(false)
596    }
597    #[doc = r" Writes raw bits to the field"]
598    #[inline]
599    pub fn bit(self, value: bool) -> &'a mut W {
600        const MASK: bool = true;
601        const OFFSET: u8 = 0;
602        self.w.bits &= !((MASK as u32) << OFFSET);
603        self.w.bits |= ((value & MASK) as u32) << OFFSET;
604        self.w
605    }
606}
607impl R {
608    #[doc = r" Value of the register as raw bits"]
609    #[inline]
610    pub fn bits(&self) -> u32 {
611        self.bits
612    }
613    #[doc = "Bit 30 - Analog watchdog fast mode select"]
614    #[inline]
615    pub fn awfsel(&self) -> AWFSELR {
616        let bits = {
617            const MASK: bool = true;
618            const OFFSET: u8 = 30;
619            ((self.bits >> OFFSET) & MASK as u32) != 0
620        };
621        AWFSELR { bits }
622    }
623    #[doc = "Bit 29 - Fast conversion mode selection for regular conversions"]
624    #[inline]
625    pub fn fast(&self) -> FASTR {
626        let bits = {
627            const MASK: bool = true;
628            const OFFSET: u8 = 29;
629            ((self.bits >> OFFSET) & MASK as u32) != 0
630        };
631        FASTR { bits }
632    }
633    #[doc = "Bits 24:26 - Regular channel selection"]
634    #[inline]
635    pub fn rch(&self) -> RCHR {
636        let bits = {
637            const MASK: u8 = 7;
638            const OFFSET: u8 = 24;
639            ((self.bits >> OFFSET) & MASK as u32) as u8
640        };
641        RCHR { bits }
642    }
643    #[doc = "Bit 21 - DMA channel enabled to read data for the regular conversion"]
644    #[inline]
645    pub fn rdmaen(&self) -> RDMAENR {
646        let bits = {
647            const MASK: bool = true;
648            const OFFSET: u8 = 21;
649            ((self.bits >> OFFSET) & MASK as u32) != 0
650        };
651        RDMAENR { bits }
652    }
653    #[doc = "Bit 19 - Launch regular conversion synchronously with DFSDM0"]
654    #[inline]
655    pub fn rsync(&self) -> RSYNCR {
656        let bits = {
657            const MASK: bool = true;
658            const OFFSET: u8 = 19;
659            ((self.bits >> OFFSET) & MASK as u32) != 0
660        };
661        RSYNCR { bits }
662    }
663    #[doc = "Bit 18 - Continuous mode selection for regular conversions"]
664    #[inline]
665    pub fn rcont(&self) -> RCONTR {
666        let bits = {
667            const MASK: bool = true;
668            const OFFSET: u8 = 18;
669            ((self.bits >> OFFSET) & MASK as u32) != 0
670        };
671        RCONTR { bits }
672    }
673    #[doc = "Bit 17 - Software start of a conversion on the regular channel"]
674    #[inline]
675    pub fn rswstart(&self) -> RSWSTARTR {
676        let bits = {
677            const MASK: bool = true;
678            const OFFSET: u8 = 17;
679            ((self.bits >> OFFSET) & MASK as u32) != 0
680        };
681        RSWSTARTR { bits }
682    }
683    #[doc = "Bits 13:14 - Trigger enable and trigger edge selection for injected conversions"]
684    #[inline]
685    pub fn jexten(&self) -> JEXTENR {
686        let bits = {
687            const MASK: u8 = 3;
688            const OFFSET: u8 = 13;
689            ((self.bits >> OFFSET) & MASK as u32) as u8
690        };
691        JEXTENR { bits }
692    }
693    #[doc = "Bits 8:10 - Trigger signal selection for launching injected conversions"]
694    #[inline]
695    pub fn jextsel(&self) -> JEXTSELR {
696        let bits = {
697            const MASK: u8 = 7;
698            const OFFSET: u8 = 8;
699            ((self.bits >> OFFSET) & MASK as u32) as u8
700        };
701        JEXTSELR { bits }
702    }
703    #[doc = "Bit 5 - DMA channel enabled to read data for the injected channel group"]
704    #[inline]
705    pub fn jdmaen(&self) -> JDMAENR {
706        let bits = {
707            const MASK: bool = true;
708            const OFFSET: u8 = 5;
709            ((self.bits >> OFFSET) & MASK as u32) != 0
710        };
711        JDMAENR { bits }
712    }
713    #[doc = "Bit 4 - Scanning conversion mode for injected conversions"]
714    #[inline]
715    pub fn jscan(&self) -> JSCANR {
716        let bits = {
717            const MASK: bool = true;
718            const OFFSET: u8 = 4;
719            ((self.bits >> OFFSET) & MASK as u32) != 0
720        };
721        JSCANR { bits }
722    }
723    #[doc = "Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger"]
724    #[inline]
725    pub fn jsync(&self) -> JSYNCR {
726        let bits = {
727            const MASK: bool = true;
728            const OFFSET: u8 = 3;
729            ((self.bits >> OFFSET) & MASK as u32) != 0
730        };
731        JSYNCR { bits }
732    }
733    #[doc = "Bit 1 - Start a conversion of the injected group of channels"]
734    #[inline]
735    pub fn jswstart(&self) -> JSWSTARTR {
736        let bits = {
737            const MASK: bool = true;
738            const OFFSET: u8 = 1;
739            ((self.bits >> OFFSET) & MASK as u32) != 0
740        };
741        JSWSTARTR { bits }
742    }
743    #[doc = "Bit 0 - DFSDM enable"]
744    #[inline]
745    pub fn dfen(&self) -> DFENR {
746        let bits = {
747            const MASK: bool = true;
748            const OFFSET: u8 = 0;
749            ((self.bits >> OFFSET) & MASK as u32) != 0
750        };
751        DFENR { bits }
752    }
753}
754impl W {
755    #[doc = r" Reset value of the register"]
756    #[inline]
757    pub fn reset_value() -> W {
758        W { bits: 0 }
759    }
760    #[doc = r" Writes raw bits to the register"]
761    #[inline]
762    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
763        self.bits = bits;
764        self
765    }
766    #[doc = "Bit 30 - Analog watchdog fast mode select"]
767    #[inline]
768    pub fn awfsel(&mut self) -> _AWFSELW {
769        _AWFSELW { w: self }
770    }
771    #[doc = "Bit 29 - Fast conversion mode selection for regular conversions"]
772    #[inline]
773    pub fn fast(&mut self) -> _FASTW {
774        _FASTW { w: self }
775    }
776    #[doc = "Bits 24:26 - Regular channel selection"]
777    #[inline]
778    pub fn rch(&mut self) -> _RCHW {
779        _RCHW { w: self }
780    }
781    #[doc = "Bit 21 - DMA channel enabled to read data for the regular conversion"]
782    #[inline]
783    pub fn rdmaen(&mut self) -> _RDMAENW {
784        _RDMAENW { w: self }
785    }
786    #[doc = "Bit 19 - Launch regular conversion synchronously with DFSDM0"]
787    #[inline]
788    pub fn rsync(&mut self) -> _RSYNCW {
789        _RSYNCW { w: self }
790    }
791    #[doc = "Bit 18 - Continuous mode selection for regular conversions"]
792    #[inline]
793    pub fn rcont(&mut self) -> _RCONTW {
794        _RCONTW { w: self }
795    }
796    #[doc = "Bit 17 - Software start of a conversion on the regular channel"]
797    #[inline]
798    pub fn rswstart(&mut self) -> _RSWSTARTW {
799        _RSWSTARTW { w: self }
800    }
801    #[doc = "Bits 13:14 - Trigger enable and trigger edge selection for injected conversions"]
802    #[inline]
803    pub fn jexten(&mut self) -> _JEXTENW {
804        _JEXTENW { w: self }
805    }
806    #[doc = "Bits 8:10 - Trigger signal selection for launching injected conversions"]
807    #[inline]
808    pub fn jextsel(&mut self) -> _JEXTSELW {
809        _JEXTSELW { w: self }
810    }
811    #[doc = "Bit 5 - DMA channel enabled to read data for the injected channel group"]
812    #[inline]
813    pub fn jdmaen(&mut self) -> _JDMAENW {
814        _JDMAENW { w: self }
815    }
816    #[doc = "Bit 4 - Scanning conversion mode for injected conversions"]
817    #[inline]
818    pub fn jscan(&mut self) -> _JSCANW {
819        _JSCANW { w: self }
820    }
821    #[doc = "Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger"]
822    #[inline]
823    pub fn jsync(&mut self) -> _JSYNCW {
824        _JSYNCW { w: self }
825    }
826    #[doc = "Bit 1 - Start a conversion of the injected group of channels"]
827    #[inline]
828    pub fn jswstart(&mut self) -> _JSWSTARTW {
829        _JSWSTARTW { w: self }
830    }
831    #[doc = "Bit 0 - DFSDM enable"]
832    #[inline]
833    pub fn dfen(&mut self) -> _DFENW {
834        _DFENW { w: self }
835    }
836}
stm32l4x2_pac/dfsdm/flt/cr2.rs

stm32l4x2_pac/dfsdm/flt/
cr2.rs
