stm32l4x2_pac/can1/
esr.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::ESR {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct RECR {
47    bits: u8,
48}
49impl RECR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bits(&self) -> u8 {
53        self.bits
54    }
55}
56#[doc = r" Value of the field"]
57pub struct TECR {
58    bits: u8,
59}
60impl TECR {
61    #[doc = r" Value of the field as raw bits"]
62    #[inline]
63    pub fn bits(&self) -> u8 {
64        self.bits
65    }
66}
67#[doc = r" Value of the field"]
68pub struct LECR {
69    bits: u8,
70}
71impl LECR {
72    #[doc = r" Value of the field as raw bits"]
73    #[inline]
74    pub fn bits(&self) -> u8 {
75        self.bits
76    }
77}
78#[doc = r" Value of the field"]
79pub struct BOFFR {
80    bits: bool,
81}
82impl BOFFR {
83    #[doc = r" Value of the field as raw bits"]
84    #[inline]
85    pub fn bit(&self) -> bool {
86        self.bits
87    }
88    #[doc = r" Returns `true` if the bit is clear (0)"]
89    #[inline]
90    pub fn bit_is_clear(&self) -> bool {
91        !self.bit()
92    }
93    #[doc = r" Returns `true` if the bit is set (1)"]
94    #[inline]
95    pub fn bit_is_set(&self) -> bool {
96        self.bit()
97    }
98}
99#[doc = r" Value of the field"]
100pub struct EPVFR {
101    bits: bool,
102}
103impl EPVFR {
104    #[doc = r" Value of the field as raw bits"]
105    #[inline]
106    pub fn bit(&self) -> bool {
107        self.bits
108    }
109    #[doc = r" Returns `true` if the bit is clear (0)"]
110    #[inline]
111    pub fn bit_is_clear(&self) -> bool {
112        !self.bit()
113    }
114    #[doc = r" Returns `true` if the bit is set (1)"]
115    #[inline]
116    pub fn bit_is_set(&self) -> bool {
117        self.bit()
118    }
119}
120#[doc = r" Value of the field"]
121pub struct EWGFR {
122    bits: bool,
123}
124impl EWGFR {
125    #[doc = r" Value of the field as raw bits"]
126    #[inline]
127    pub fn bit(&self) -> bool {
128        self.bits
129    }
130    #[doc = r" Returns `true` if the bit is clear (0)"]
131    #[inline]
132    pub fn bit_is_clear(&self) -> bool {
133        !self.bit()
134    }
135    #[doc = r" Returns `true` if the bit is set (1)"]
136    #[inline]
137    pub fn bit_is_set(&self) -> bool {
138        self.bit()
139    }
140}
141#[doc = r" Proxy"]
142pub struct _LECW<'a> {
143    w: &'a mut W,
144}
145impl<'a> _LECW<'a> {
146    #[doc = r" Writes raw bits to the field"]
147    #[inline]
148    pub unsafe fn bits(self, value: u8) -> &'a mut W {
149        const MASK: u8 = 7;
150        const OFFSET: u8 = 4;
151        self.w.bits &= !((MASK as u32) << OFFSET);
152        self.w.bits |= ((value & MASK) as u32) << OFFSET;
153        self.w
154    }
155}
156impl R {
157    #[doc = r" Value of the register as raw bits"]
158    #[inline]
159    pub fn bits(&self) -> u32 {
160        self.bits
161    }
162    #[doc = "Bits 24:31 - REC"]
163    #[inline]
164    pub fn rec(&self) -> RECR {
165        let bits = {
166            const MASK: u8 = 255;
167            const OFFSET: u8 = 24;
168            ((self.bits >> OFFSET) & MASK as u32) as u8
169        };
170        RECR { bits }
171    }
172    #[doc = "Bits 16:23 - TEC"]
173    #[inline]
174    pub fn tec(&self) -> TECR {
175        let bits = {
176            const MASK: u8 = 255;
177            const OFFSET: u8 = 16;
178            ((self.bits >> OFFSET) & MASK as u32) as u8
179        };
180        TECR { bits }
181    }
182    #[doc = "Bits 4:6 - LEC"]
183    #[inline]
184    pub fn lec(&self) -> LECR {
185        let bits = {
186            const MASK: u8 = 7;
187            const OFFSET: u8 = 4;
188            ((self.bits >> OFFSET) & MASK as u32) as u8
189        };
190        LECR { bits }
191    }
192    #[doc = "Bit 2 - BOFF"]
193    #[inline]
194    pub fn boff(&self) -> BOFFR {
195        let bits = {
196            const MASK: bool = true;
197            const OFFSET: u8 = 2;
198            ((self.bits >> OFFSET) & MASK as u32) != 0
199        };
200        BOFFR { bits }
201    }
202    #[doc = "Bit 1 - EPVF"]
203    #[inline]
204    pub fn epvf(&self) -> EPVFR {
205        let bits = {
206            const MASK: bool = true;
207            const OFFSET: u8 = 1;
208            ((self.bits >> OFFSET) & MASK as u32) != 0
209        };
210        EPVFR { bits }
211    }
212    #[doc = "Bit 0 - EWGF"]
213    #[inline]
214    pub fn ewgf(&self) -> EWGFR {
215        let bits = {
216            const MASK: bool = true;
217            const OFFSET: u8 = 0;
218            ((self.bits >> OFFSET) & MASK as u32) != 0
219        };
220        EWGFR { bits }
221    }
222}
223impl W {
224    #[doc = r" Reset value of the register"]
225    #[inline]
226    pub fn reset_value() -> W {
227        W { bits: 0 }
228    }
229    #[doc = r" Writes raw bits to the register"]
230    #[inline]
231    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
232        self.bits = bits;
233        self
234    }
235    #[doc = "Bits 4:6 - LEC"]
236    #[inline]
237    pub fn lec(&mut self) -> _LECW {
238        _LECW { w: self }
239    }
240}
stm32l4x2_pac/can1/esr.rs

stm32l4x2_pac/can1/
esr.rs
