stm32l4x2_pac/wwdg/
cr.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CR {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = "Possible values of the field `WDGA`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum WDGAR {
48    #[doc = "Watchdog disabled"]
49    DISABLED,
50    #[doc = "Watchdog enabled"]
51    ENABLED,
52}
53impl WDGAR {
54    #[doc = r" Returns `true` if the bit is clear (0)"]
55    #[inline]
56    pub fn bit_is_clear(&self) -> bool {
57        !self.bit()
58    }
59    #[doc = r" Returns `true` if the bit is set (1)"]
60    #[inline]
61    pub fn bit_is_set(&self) -> bool {
62        self.bit()
63    }
64    #[doc = r" Value of the field as raw bits"]
65    #[inline]
66    pub fn bit(&self) -> bool {
67        match *self {
68            WDGAR::DISABLED => false,
69            WDGAR::ENABLED => true,
70        }
71    }
72    #[allow(missing_docs)]
73    #[doc(hidden)]
74    #[inline]
75    pub fn _from(value: bool) -> WDGAR {
76        match value {
77            false => WDGAR::DISABLED,
78            true => WDGAR::ENABLED,
79        }
80    }
81    #[doc = "Checks if the value of the field is `DISABLED`"]
82    #[inline]
83    pub fn is_disabled(&self) -> bool {
84        *self == WDGAR::DISABLED
85    }
86    #[doc = "Checks if the value of the field is `ENABLED`"]
87    #[inline]
88    pub fn is_enabled(&self) -> bool {
89        *self == WDGAR::ENABLED
90    }
91}
92#[doc = r" Value of the field"]
93pub struct TR {
94    bits: u8,
95}
96impl TR {
97    #[doc = r" Value of the field as raw bits"]
98    #[inline]
99    pub fn bits(&self) -> u8 {
100        self.bits
101    }
102}
103#[doc = "Values that can be written to the field `WDGA`"]
104pub enum WDGAW {
105    #[doc = "Watchdog disabled"]
106    DISABLED,
107    #[doc = "Watchdog enabled"]
108    ENABLED,
109}
110impl WDGAW {
111    #[allow(missing_docs)]
112    #[doc(hidden)]
113    #[inline]
114    pub fn _bits(&self) -> bool {
115        match *self {
116            WDGAW::DISABLED => false,
117            WDGAW::ENABLED => true,
118        }
119    }
120}
121#[doc = r" Proxy"]
122pub struct _WDGAW<'a> {
123    w: &'a mut W,
124}
125impl<'a> _WDGAW<'a> {
126    #[doc = r" Writes `variant` to the field"]
127    #[inline]
128    pub fn variant(self, variant: WDGAW) -> &'a mut W {
129        {
130            self.bit(variant._bits())
131        }
132    }
133    #[doc = "Watchdog disabled"]
134    #[inline]
135    pub fn disabled(self) -> &'a mut W {
136        self.variant(WDGAW::DISABLED)
137    }
138    #[doc = "Watchdog enabled"]
139    #[inline]
140    pub fn enabled(self) -> &'a mut W {
141        self.variant(WDGAW::ENABLED)
142    }
143    #[doc = r" Sets the field bit"]
144    pub fn set_bit(self) -> &'a mut W {
145        self.bit(true)
146    }
147    #[doc = r" Clears the field bit"]
148    pub fn clear_bit(self) -> &'a mut W {
149        self.bit(false)
150    }
151    #[doc = r" Writes raw bits to the field"]
152    #[inline]
153    pub fn bit(self, value: bool) -> &'a mut W {
154        const MASK: bool = true;
155        const OFFSET: u8 = 7;
156        self.w.bits &= !((MASK as u32) << OFFSET);
157        self.w.bits |= ((value & MASK) as u32) << OFFSET;
158        self.w
159    }
160}
161#[doc = r" Proxy"]
162pub struct _TW<'a> {
163    w: &'a mut W,
164}
165impl<'a> _TW<'a> {
166    #[doc = r" Writes raw bits to the field"]
167    #[inline]
168    pub fn bits(self, value: u8) -> &'a mut W {
169        const MASK: u8 = 127;
170        const OFFSET: u8 = 0;
171        self.w.bits &= !((MASK as u32) << OFFSET);
172        self.w.bits |= ((value & MASK) as u32) << OFFSET;
173        self.w
174    }
175}
176impl R {
177    #[doc = r" Value of the register as raw bits"]
178    #[inline]
179    pub fn bits(&self) -> u32 {
180        self.bits
181    }
182    #[doc = "Bit 7 - Activation bit"]
183    #[inline]
184    pub fn wdga(&self) -> WDGAR {
185        WDGAR::_from({
186            const MASK: bool = true;
187            const OFFSET: u8 = 7;
188            ((self.bits >> OFFSET) & MASK as u32) != 0
189        })
190    }
191    #[doc = "Bits 0:6 - 7-bit counter (MSB to LSB)"]
192    #[inline]
193    pub fn t(&self) -> TR {
194        let bits = {
195            const MASK: u8 = 127;
196            const OFFSET: u8 = 0;
197            ((self.bits >> OFFSET) & MASK as u32) as u8
198        };
199        TR { bits }
200    }
201}
202impl W {
203    #[doc = r" Reset value of the register"]
204    #[inline]
205    pub fn reset_value() -> W {
206        W { bits: 127 }
207    }
208    #[doc = r" Writes raw bits to the register"]
209    #[inline]
210    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
211        self.bits = bits;
212        self
213    }
214    #[doc = "Bit 7 - Activation bit"]
215    #[inline]
216    pub fn wdga(&mut self) -> _WDGAW {
217        _WDGAW { w: self }
218    }
219    #[doc = "Bits 0:6 - 7-bit counter (MSB to LSB)"]
220    #[inline]
221    pub fn t(&mut self) -> _TW {
222        _TW { w: self }
223    }
224}
stm32l4x2_pac/wwdg/cr.rs

stm32l4x2_pac/wwdg/
cr.rs
